AuroraMiddleware/v8
1
0
Fork 0
Code Issues 2 Pull Requests Releases Wiki Activity

[x64] Move cvtss2sd into macro list

Browse Source 
Bug: v8:11879
Change-Id: I02cfb6ca7cff418dc3e4ab422a1bc3437f0ea778
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3146075
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/main@{#76713}
This commit is contained in:
Ng Zhi An 2021-09-07 15:01:43 -07:00 committed by V8 LUCI CQ
parent c03354b430
commit 8b5173b689
3 changed files with 1 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
src/codegen/x64/assembler-x64.cc
View File

@ -3347,26 +3347,6 @@ void Assembler::cvtqsi2sd(XMMRegister dst, Register src) {
emit_sse_operand(dst, src); emit_sse_operand(dst, src);
} }
void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
DCHECK(!IsEnabled(AVX));
EnsureSpace ensure_space(this);
emit(0xF3);
emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0x5A);
emit_sse_operand(dst, src);
}
void Assembler::cvtss2sd(XMMRegister dst, Operand src) {
DCHECK(!IsEnabled(AVX));
EnsureSpace ensure_space(this);
emit(0xF3);
emit_optional_rex_32(dst, src);
emit(0x0F);
emit(0x5A);
emit_sse_operand(dst, src);
}
void Assembler::cvtsd2si(Register dst, XMMRegister src) { void Assembler::cvtsd2si(Register dst, XMMRegister src) {
DCHECK(!IsEnabled(AVX)); DCHECK(!IsEnabled(AVX));
EnsureSpace ensure_space(this); EnsureSpace ensure_space(this);

9
src/codegen/x64/assembler-x64.h
View File

@ -1242,9 +1242,6 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
void cvtqsi2sd(XMMRegister dst, Operand src); void cvtqsi2sd(XMMRegister dst, Operand src);
void cvtqsi2sd(XMMRegister dst, Register src); void cvtqsi2sd(XMMRegister dst, Register src);
void cvtss2sd(XMMRegister dst, XMMRegister src);
void cvtss2sd(XMMRegister dst, Operand src);
void cvtsd2si(Register dst, XMMRegister src); void cvtsd2si(Register dst, XMMRegister src);
void cvtsd2siq(Register dst, XMMRegister src); void cvtsd2siq(Register dst, XMMRegister src);
@ -1438,12 +1435,6 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
void vcvtdq2pd(XMMRegister dst, XMMRegister src) { void vcvtdq2pd(XMMRegister dst, XMMRegister src) {
vinstr(0xe6, dst, xmm0, src, kF3, k0F, kWIG); vinstr(0xe6, dst, xmm0, src, kF3, k0F, kWIG);
} }
void vcvtss2sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
vinstr(0x5a, dst, src1, src2, kF3, k0F, kWIG);
}
void vcvtss2sd(XMMRegister dst, XMMRegister src1, Operand src2) {
vinstr(0x5a, dst, src1, src2, kF3, k0F, kWIG);
}
void vcvttps2dq(XMMRegister dst, XMMRegister src) { void vcvttps2dq(XMMRegister dst, XMMRegister src) {
vinstr(0x5b, dst, xmm0, src, kF3, k0F, kWIG); vinstr(0x5b, dst, xmm0, src, kF3, k0F, kWIG);
} }

1
src/codegen/x64/sse-instr.h
View File

@ -32,6 +32,7 @@
V(sqrtss, F3, 0F, 51) \ V(sqrtss, F3, 0F, 51) \
V(addss, F3, 0F, 58) \ V(addss, F3, 0F, 58) \
V(mulss, F3, 0F, 59) \ V(mulss, F3, 0F, 59) \
V(cvtss2sd, F3, 0F, 5A) \
V(subss, F3, 0F, 5C) \ V(subss, F3, 0F, 5C) \
V(minss, F3, 0F, 5D) \ V(minss, F3, 0F, 5D) \
V(divss, F3, 0F, 5E) \ V(divss, F3, 0F, 5E) \