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[wasm-relaxed-simd] Prototype relaxed min/max for ARM

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Prototype F32x4Relaxed(Min/Max) and F64x2Relaxed(Min/Max)
operations for ARM. F32x4 variants map directly to vmin/vmax
hardware instructions which are also used for F32x4(Min/Max)
operations. The F64x2 variants are mapped in this implementation
to Pmin/Pmax instructions as detailed in the github issue.
https://github.com/WebAssembly/relaxed-simd/issues/33

Bug: v8:12284
Change-Id: I5ea939385fa0ae97bbdf776fc0b763cabb1b293c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3501347
Reviewed-by: Adam Klein <adamk@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/main@{#79355}
This commit is contained in:
Deepti Gandluri 2022-03-03 11:12:42 -08:00 committed by V8 LUCI CQ
parent aaedd8b788
commit a0b25ebd75
3 changed files with 18 additions and 8 deletions
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10
src/compiler/backend/arm/instruction-selector-arm.cc
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@ -2640,7 +2640,9 @@ void InstructionSelector::VisitWord32AtomicPairCompareExchange(Node* node) {
V(F32x4Sub, kArmF32x4Sub) \
V(F32x4Mul, kArmF32x4Mul) \
V(F32x4Min, kArmF32x4Min) \
V(F32x4RelaxedMin, kArmF32x4Min) \
V(F32x4Max, kArmF32x4Max) \
V(F32x4RelaxedMax, kArmF32x4Max) \
V(F32x4Eq, kArmF32x4Eq) \
V(F32x4Ne, kArmF32x4Ne) \
V(F32x4Lt, kArmF32x4Lt) \
@ -3148,6 +3150,14 @@ void InstructionSelector::VisitF64x2Pmax(Node* node) {
VisitF64x2PminOrPMax(this, kArmF64x2Pmax, node);
}
void InstructionSelector::VisitF64x2RelaxedMin(Node* node) {
VisitF64x2Pmin(node);
}
void InstructionSelector::VisitF64x2RelaxedMax(Node* node) {
VisitF64x2Pmax(node);
}
#define EXT_MUL_LIST(V) \
V(I16x8ExtMulLowI8x16S, kArmVmullLow, NeonS8) \
V(I16x8ExtMulHighI8x16S, kArmVmullHigh, NeonS8) \

8
src/compiler/backend/instruction-selector.cc
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@ -2809,15 +2809,15 @@ void InstructionSelector::VisitI32x4RelaxedLaneSelect(Node* node) {
void InstructionSelector::VisitI64x2RelaxedLaneSelect(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitF32x4RelaxedMin(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitF32x4RelaxedMax(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitF64x2RelaxedMin(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitF64x2RelaxedMax(Node* node) { UNIMPLEMENTED(); }
#endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_IA32 && !V8_TARGET_ARCH_ARM64
// && !V8_TARGET_ARCH_RISCV64 && !V8_TARGET_ARM
#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_IA32 && !V8_TARGET_ARCH_ARM64 && \
!V8_TARGET_ARCH_RISCV64
void InstructionSelector::VisitF32x4RelaxedMin(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitF32x4RelaxedMax(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitF64x2RelaxedMin(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitF64x2RelaxedMax(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitI32x4RelaxedTruncF64x2SZero(Node* node) {
UNIMPLEMENTED();
}

8
test/cctest/wasm/test-run-wasm-relaxed-simd.cc
View File

@ -314,11 +314,7 @@ WASM_RELAXED_SIMD_TEST(I64x2RelaxedLaneSelect) {
RelaxedLaneSelectTest<uint64_t, kElems>(execution_tier, v1, v2, s, expected,
kExprI64x2RelaxedLaneSelect);
}
#endif // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM64 ||
// V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_RISCV64
#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM64 || \
V8_TARGET_ARCH_RISCV64
WASM_RELAXED_SIMD_TEST(F32x4RelaxedMin) {
RunF32x4BinOpTest(execution_tier, kExprF32x4RelaxedMin, Minimum);
}
@ -334,7 +330,11 @@ WASM_RELAXED_SIMD_TEST(F64x2RelaxedMin) {
WASM_RELAXED_SIMD_TEST(F64x2RelaxedMax) {
RunF64x2BinOpTest(execution_tier, kExprF64x2RelaxedMax, Maximum);
}
#endif // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM64 ||
// V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_RISCV64
#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM64 || \
V8_TARGET_ARCH_RISCV64
namespace {
// For relaxed trunc instructions, don't test out of range values.
// FloatType comes later so caller can rely on template argument deduction and