AuroraMiddleware/v8
1
0
Fork 0
Code Issues 2 Pull Requests Releases Wiki Activity

[mips][wasm-simd][liftoff] Prototype load lane

Browse Source 
This CL just allows the compilation to pass.

Port 673be63e2b

Change-Id: I5d66ba6b353f6f94d22e506ff42ce81859ec876d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2619004
Auto-Submit: Liu yu <liuyu@loongson.cn>
Reviewed-by: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#71992}
This commit is contained in:
Liu Yu 2021-01-09 16:26:56 +08:00 committed by Commit Bot
parent ff0b78bbfd
commit b783ec0fe9
2 changed files with 14 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/wasm/baseline/mips/liftoff-assembler-mips.h
View File

@ -1712,6 +1712,13 @@ void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr,
bailout(kSimd, "load extend and load splat unimplemented");
}
void LiftoffAssembler::LoadLane(LiftoffRegister dst, LiftoffRegister src,
Register addr, Register offset_reg,
uintptr_t offset_imm, LoadType type,
uint8_t laneidx, uint32_t* protected_load_pc) {
bailout(kSimd, "loadlane");
}
void LiftoffAssembler::emit_i8x16_shuffle(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs,

7
src/wasm/baseline/mips64/liftoff-assembler-mips64.h
View File

@ -1608,6 +1608,13 @@ void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr,
}
}
void LiftoffAssembler::LoadLane(LiftoffRegister dst, LiftoffRegister src,
Register addr, Register offset_reg,
uintptr_t offset_imm, LoadType type,
uint8_t laneidx, uint32_t* protected_load_pc) {
bailout(kSimd, "loadlane");
}
void LiftoffAssembler::emit_i8x16_shuffle(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs,