PPC64: [turbofan] Fix checked loads/stores.
This refines e7d521fb5f
-- as we still
require clean up of the uint index register.
TEST=mjsunit/asm/float32array-negative-offset
R=joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com
BUG=
Review URL: https://codereview.chromium.org/1919003004
Cr-Commit-Position: refs/heads/master@{#35778}
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@ -525,6 +525,12 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
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DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
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} while (0)
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#if V8_TARGET_ARCH_PPC64
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// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
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#define CleanUInt32(x) __ ClearLeftImm(x, x, Operand(32))
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#else
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#define CleanUInt32(x)
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#endif
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#define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, asm_instrx, width) \
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do { \
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@ -544,13 +550,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
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if (mode == kMode_MRI) { \
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__ asm_instr(result, operand); \
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} else { \
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CleanUInt32(offset); \
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__ asm_instrx(result, operand); \
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} \
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__ bind(ool->exit()); \
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DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
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} while (0)
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#define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr, asm_instrx) \
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do { \
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Register result = i.OutputRegister(); \
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@ -569,13 +575,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
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if (mode == kMode_MRI) { \
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__ asm_instr(result, operand); \
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} else { \
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CleanUInt32(offset); \
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__ asm_instrx(result, operand); \
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} \
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__ bind(ool->exit()); \
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DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
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} while (0)
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#define ASSEMBLE_CHECKED_STORE_FLOAT32() \
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do { \
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Label done; \
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@ -595,13 +601,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
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if (mode == kMode_MRI) { \
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__ stfs(kScratchDoubleReg, operand); \
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} else { \
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CleanUInt32(offset); \
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__ stfsx(kScratchDoubleReg, operand); \
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} \
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__ bind(&done); \
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DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
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} while (0)
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#define ASSEMBLE_CHECKED_STORE_DOUBLE() \
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do { \
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Label done; \
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@ -620,13 +626,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
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if (mode == kMode_MRI) { \
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__ stfd(value, operand); \
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} else { \
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CleanUInt32(offset); \
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__ stfdx(value, operand); \
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} \
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__ bind(&done); \
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DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
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} while (0)
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#define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr, asm_instrx) \
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do { \
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Label done; \
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@ -645,6 +651,7 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
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if (mode == kMode_MRI) { \
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__ asm_instr(value, operand); \
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} else { \
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CleanUInt32(offset); \
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__ asm_instrx(value, operand); \
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} \
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__ bind(&done); \
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