s390x: implement a few binary op variants
Change-Id: I7f1d5e39033957410a8f3601100c7b7c5839271f Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2657475 Reviewed-by: Milad Fa <mfarazma@redhat.com> Commit-Queue: Junliang Yan <junyan@redhat.com> Cr-Commit-Position: refs/heads/master@{#72414}
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@ -2652,6 +2652,10 @@ void TurboAssembler::AddS64(Register dst, const Operand& opnd) {
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agfi(dst, opnd);
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}
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void TurboAssembler::AddS32(Register dst, Register src, int32_t opnd) {
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AddS32(dst, src, Operand(opnd));
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}
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// Add 32-bit (Register dst = Register src + Immediate opnd)
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void TurboAssembler::AddS32(Register dst, Register src, const Operand& opnd) {
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if (dst != src) {
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@ -2664,6 +2668,10 @@ void TurboAssembler::AddS32(Register dst, Register src, const Operand& opnd) {
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AddS32(dst, opnd);
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}
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void TurboAssembler::AddS64(Register dst, Register src, int32_t opnd) {
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AddS64(dst, src, Operand(opnd));
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}
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// Add Pointer Size (Register dst = Register src + Immediate opnd)
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void TurboAssembler::AddS64(Register dst, Register src, const Operand& opnd) {
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if (dst != src) {
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@ -2823,11 +2831,19 @@ void TurboAssembler::SubS64(Register dst, const Operand& imm) {
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AddS64(dst, Operand(-(imm.immediate())));
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}
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void TurboAssembler::SubS32(Register dst, Register src, int32_t imm) {
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SubS32(dst, src, Operand(imm));
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}
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// Subtract 32-bit (Register dst = Register src - Immediate opnd)
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void TurboAssembler::SubS32(Register dst, Register src, const Operand& imm) {
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AddS32(dst, src, Operand(-(imm.immediate())));
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}
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void TurboAssembler::SubS64(Register dst, Register src, int32_t imm) {
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SubS64(dst, src, Operand(imm));
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}
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// Subtract Pointer Sized (Register dst = Register src - Immediate opnd)
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void TurboAssembler::SubS64(Register dst, Register src, const Operand& imm) {
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AddS64(dst, src, Operand(-(imm.immediate())));
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@ -3964,6 +3980,112 @@ void TurboAssembler::StoreV128(Simd128Register src, const MemOperand& mem,
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}
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}
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void TurboAssembler::AddF32(DoubleRegister dst, DoubleRegister lhs,
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DoubleRegister rhs) {
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if (dst == lhs) {
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aebr(dst, rhs);
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} else if (dst == rhs) {
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aebr(dst, lhs);
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} else {
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ler(dst, lhs);
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aebr(dst, rhs);
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}
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}
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void TurboAssembler::SubF32(DoubleRegister dst, DoubleRegister lhs,
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DoubleRegister rhs) {
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if (dst == lhs) {
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sebr(dst, rhs);
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} else if (dst == rhs) {
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sebr(dst, lhs);
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lcebr(dst, dst);
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} else {
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ler(dst, lhs);
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sebr(dst, rhs);
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}
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}
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void TurboAssembler::MulF32(DoubleRegister dst, DoubleRegister lhs,
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DoubleRegister rhs) {
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if (dst == lhs) {
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meebr(dst, rhs);
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} else if (dst == rhs) {
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meebr(dst, lhs);
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} else {
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ler(dst, lhs);
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meebr(dst, rhs);
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}
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}
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void TurboAssembler::DivF32(DoubleRegister dst, DoubleRegister lhs,
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DoubleRegister rhs) {
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if (dst == lhs) {
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debr(dst, rhs);
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} else if (dst == rhs) {
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lay(sp, MemOperand(sp, -kSystemPointerSize));
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StoreF32(dst, MemOperand(sp));
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ler(dst, lhs);
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deb(dst, MemOperand(sp));
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la(sp, MemOperand(sp, kSystemPointerSize));
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} else {
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ler(dst, lhs);
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debr(dst, rhs);
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}
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}
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void TurboAssembler::AddF64(DoubleRegister dst, DoubleRegister lhs,
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DoubleRegister rhs) {
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if (dst == lhs) {
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adbr(dst, rhs);
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} else if (dst == rhs) {
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adbr(dst, lhs);
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} else {
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ldr(dst, lhs);
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adbr(dst, rhs);
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}
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}
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void TurboAssembler::SubF64(DoubleRegister dst, DoubleRegister lhs,
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DoubleRegister rhs) {
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if (dst == lhs) {
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sdbr(dst, rhs);
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} else if (dst == rhs) {
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sdbr(dst, lhs);
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lcdbr(dst, dst);
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} else {
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ldr(dst, lhs);
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sdbr(dst, rhs);
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}
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}
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void TurboAssembler::MulF64(DoubleRegister dst, DoubleRegister lhs,
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DoubleRegister rhs) {
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if (dst == lhs) {
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mdbr(dst, rhs);
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} else if (dst == rhs) {
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mdbr(dst, lhs);
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} else {
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ldr(dst, lhs);
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mdbr(dst, rhs);
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}
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}
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void TurboAssembler::DivF64(DoubleRegister dst, DoubleRegister lhs,
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DoubleRegister rhs) {
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if (dst == lhs) {
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ddbr(dst, rhs);
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} else if (dst == rhs) {
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lay(sp, MemOperand(sp, -kSystemPointerSize));
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StoreF64(dst, MemOperand(sp));
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ldr(dst, lhs);
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ddb(dst, MemOperand(sp));
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la(sp, MemOperand(sp, kSystemPointerSize));
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} else {
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ldr(dst, lhs);
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ddbr(dst, rhs);
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}
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}
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void TurboAssembler::AddFloat32(DoubleRegister dst, const MemOperand& opnd,
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DoubleRegister scratch) {
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if (is_uint12(opnd.offset())) {
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@ -184,6 +184,8 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
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void AddS64(Register dst, const Operand& imm);
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void AddS32(Register dst, Register src, const Operand& imm);
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void AddS64(Register dst, Register src, const Operand& imm);
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void AddS32(Register dst, Register src, int32_t imm);
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void AddS64(Register dst, Register src, int32_t imm);
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// Add (Register - Register)
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void AddS32(Register dst, Register src);
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@ -215,6 +217,8 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
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void SubS64(Register dst, const Operand& imm);
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void SubS32(Register dst, Register src, const Operand& imm);
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void SubS64(Register dst, Register src, const Operand& imm);
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void SubS32(Register dst, Register src, int32_t imm);
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void SubS64(Register dst, Register src, int32_t imm);
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// Subtract (Register - Register)
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void SubS32(Register dst, Register src);
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@ -391,6 +395,16 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
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void StoreV128LE(Simd128Register src, const MemOperand& mem,
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Register scratch1, Register scratch2);
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void AddF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs);
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void SubF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs);
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void MulF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs);
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void DivF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs);
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void AddF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs);
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void SubF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs);
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void MulF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs);
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void DivF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs);
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void AddFloat32(DoubleRegister dst, const MemOperand& opnd,
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DoubleRegister scratch);
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void AddFloat64(DoubleRegister dst, const MemOperand& opnd,
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