Commit Graph

463 Commits

Author SHA1 Message Date
kaznacheev@chromium.org
3ca99e722b Fix BinaryOpIC implementation on ARM.
On a pair of smis HEAP_NUMBERS stub is significantly slower than GENERIC. This slows
down some tests dramatically (crypto-aes from SunSpider).
With this change HEAP_NUMBERS stub switches to GENERIC stub the first time it sees 2 smis
as its operands.

Review URL: http://codereview.chromium.org/1687005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4483 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-23 10:08:24 +00:00
sgjesse@chromium.org
931f0a031a Changed inlined property load detection on ARM
Instaed of having a nop after all non-inlined calls to load IC use a different nop (mov r1, r1 instead of mov r0, r0) to detect an inlined load IC.

Added more infrastructure to the deferred code handling to make it possbile to block constant pool emitting in a deferred code block, including the branch instruction ending the deferred code block.

Addressed a couple of comments to http://codereview.chromium.org/1715003, including adding an assert to make sure that the patching of an ldr instruction is always possible.
Review URL: http://codereview.chromium.org/1758003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4480 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-23 07:42:45 +00:00
erik.corry@gmail.com
8ceb9ad8de Speed up random on ARM. Patch committed for rodolph.perfetta@googlemail.com. See http://codereview.chromium.org/1689007
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4477 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-22 17:25:42 +00:00
erik.corry@gmail.com
5fab20edcd Add checks to the ARM simulator to ensure that we flush the icache all
the places we should.
Review URL: http://codereview.chromium.org/1523030

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4474 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-22 12:41:10 +00:00
ager@chromium.org
0720377a66 Port apply with arguments optimization to ARM. This avoid allocating
the arguments object when not necessary.
Review URL: http://codereview.chromium.org/1738003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4473 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-22 12:20:36 +00:00
sgjesse@chromium.org
49d685684a Minor formatting changes.
Review URL: http://codereview.chromium.org/1766005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4470 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-22 07:35:43 +00:00
sgjesse@chromium.org
5a8d9a4257 Fix ARM debug build breakage caused by r4468
TBR=ager@chromium.org
Review URL: http://codereview.chromium.org/1730005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4469 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-22 07:26:07 +00:00
sgjesse@chromium.org
968a524432 Add inlining of property load on ARM
Generate inlined named property load for in-object properties. This uses the same mechanism as on the Intel platforms with the map check and load instruction of the inlined code being	patched by the inline cache code. The map check is patched through the normal constant pool patching and the load instruction is patched in place.
Review URL: http://codereview.chromium.org/1715003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4468 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-22 07:18:30 +00:00
sgjesse@chromium.org
e9f818b242 Fix lint errors
TBR=erik.corry@gmail.com
Review URL: http://codereview.chromium.org/1749002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4458 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-21 10:20:55 +00:00
sgjesse@chromium.org
8ced007f5a Update comment to provide the correct usage of the Disassembler class.
TBR=erik.corry@gmail.com
Review URL: http://codereview.chromium.org/1755001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4457 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-21 09:45:06 +00:00
sgjesse@chromium.org
786c213dc6 Use an object to control the blocking of the constant pool
Instead of indicating for how many instructions the constant pool needs to be blocked the constant pool is now blocked while at least one instance of ScopedConstPoolBlocker exists.
Review URL: http://codereview.chromium.org/1673006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4456 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-21 09:43:45 +00:00
sgjesse@chromium.org
5c7ffe9f1c Return the correct statement position.
Whether this was a typo or a deliberate decision at some point I don't know. Anyway it was wrong.

TBR=erik.corry@gmail.com
Review URL: http://codereview.chromium.org/1752001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4452 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-21 07:32:04 +00:00
ager@chromium.org
c678e44805 Add missing smi check in IC for nonexistent properties.
Add regression test.

BUG=v8:681
Review URL: http://codereview.chromium.org/1673005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4446 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-20 10:20:39 +00:00
erik.corry@gmail.com
e1b3b92a2c Make not sucking at regexp the default
(remove V8_NATIVE_REGEXP flag, add
V8_INTERPRETED_REGEXP flag).
Review URL: http://codereview.chromium.org/1635001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4443 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-19 19:30:11 +00:00
ager@chromium.org
e422cd3291 Fix arm simulator build on Max OS X. For some reason the GCC version
on Mac is more pedantic.

Review URL: http://codereview.chromium.org/1652015

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4442 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-19 16:34:19 +00:00
ager@chromium.org
07db17ce1b Remove some remaining references to boilerplate functions.
Review URL: http://codereview.chromium.org/1605037

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4440 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-19 12:39:07 +00:00
sgjesse@chromium.org
88fc8f1fb5 Add tracking of loop nesting to ARM code.
Review URL: http://codereview.chromium.org/1645008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4429 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-15 14:06:57 +00:00
ager@chromium.org
afc15bb48f Reapply load ICs for nonexistent properties.
We need to be careful to check global property cells for the property
encountered during lookup.  Therefore, the ICs have to be specific to
the name of the property if global objects are involved.  In
principle, this means that we could get a large number of monomorphic
ICs for the same map if there is a global object in the prototype
chain.  However, since this is only done for normal load ICs and not
for keyed load ICs I do not expect this to be a problem.  I will
experiment with it once this goes in.

BUG=675
Review URL: http://codereview.chromium.org/1559033

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4426 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-15 11:25:41 +00:00
sgjesse@chromium.org
09aa20da08 Ensure stack alignment in ARM port
In the CEntryStub keep track of the actual skew from the correct alignment to ensure proper alignment before calling the runtime. Add checks to test the expected skew when running on hardware.

Use the PrepareCallCFunction/CallCFunction in a few other places.

Add check to the ARM simulator for correct alignment.

Add option --sim-stack-alignment to set the stack alignment in the simulator. Currntly only values 4 and 8 makes sense. 8 is the default to make snapshots generated with the simulator work on hardware requiring 8 byte stack alignment.
Review URL: http://codereview.chromium.org/1530043

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4425 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-15 09:34:47 +00:00
sgjesse@chromium.org
9b31f11df6 Avoid warning on ARM reported by newer GCC versions
Review URL: http://codereview.chromium.org/1540038

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4424 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-15 08:45:27 +00:00
vitalyr@chromium.org
1d8ec1e47b One less dependent load in InvokeBuiltin.
Review URL: http://codereview.chromium.org/1638006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4423 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-14 20:16:19 +00:00
antonm@chromium.org
a713b27428 Introduce fast native caches and use it in String.search.
Review URL: http://codereview.chromium.org/1563005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4418 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-14 14:46:15 +00:00
whesse@chromium.org
518481d5e6 Revert change 4401.
Review URL: http://codereview.chromium.org/1589035

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4416 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-14 11:45:03 +00:00
sgjesse@chromium.org
d74a8a8014 Port direct call to native RegExp from JavaScript to ARM
The ia32 version was implemented in r3542 and r3543. The x64 was implementeed in r3740, r3741 and r3742.

Minor tweaks to the is32 and x64 code as well.
Review URL: http://codereview.chromium.org/1575035

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4409 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-14 09:25:33 +00:00
ager@chromium.org
aa8818560d Add inline caches for loading non-existing properties.
Review URL: http://codereview.chromium.org/1539034

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4401 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-14 06:25:11 +00:00
lrn@chromium.org
285d5bc48a Native construction of RegExp result objects, with in-object index and input.
Avoid cloning using CloneRegExpResult for results that are just arrays.
Made a more direct path for string.match with string argument.

Review URL: http://codereview.chromium.org/1645001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4395 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-13 09:31:03 +00:00
sgjesse@chromium.org
2239d42073 Fix presubmit error in previous commit.
TBR=erik.corry@gmail.com
Review URL: http://codereview.chromium.org/1640005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4389 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-12 13:15:39 +00:00
sgjesse@chromium.org
8ebae39893 Add commands stack and mem to ARM simulator debugger
The command "stack" will dump the stack and "mem" will dump memory from a address given either as a register or as a literal. Both commands dump 10 words unless an additional argument with the number of words to dump is given.
  sim> stack
  sim> mem fp
  sim> mem 0xe612a450 100

Also parse address literals in simulator debugger command as unsigned.
Review URL: http://codereview.chromium.org/1596022

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4388 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-12 12:24:14 +00:00
antonm@chromium.org
400b1be449 Faster invocation of custom comparator function.
Review URL: http://codereview.chromium.org/1623004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4381 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-12 07:05:24 +00:00
erik.corry@gmail.com
cfad01282c Make binary op stubs in both r0-r1 and r1-r0 versions to reduce
register churn.
Review URL: http://codereview.chromium.org/1606019

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4380 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-09 18:25:51 +00:00
sgjesse@chromium.org
68a0a108c4 Call to C function support in macro assembler
Implement macro assembler operations PrepareCallCFunction and CallCFunction like on both Intel platforms. Used these for direct calls to C functions.
Review URL: http://codereview.chromium.org/1549031

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4374 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-09 11:25:52 +00:00
erik.corry@gmail.com
fbefa72f81 Simple register allocation for ARM. Only top of expression
stack for now.  Next step is probably fixing the binary
op stubs so they can take swapped registers and fixing
the deferred code so it doesn't insist that all registers
except the two operands are flushed.  Generates slightly
worse code sometimes because the peephole push-pop
elimination gets confused when we don't use the same
register all the time (the old code used r0 always).
Review URL: http://codereview.chromium.org/1604002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4368 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-08 22:30:30 +00:00
kaznacheev@chromium.org
aca9cf1bac Re-submitting binary op ICs for ARM. Does not break debug tests
now.

Review URL: http://codereview.chromium.org/1629008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4365 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-08 15:19:06 +00:00
sgjesse@chromium.org
de69f5beba Add support for bkpt instruction
The bkpt instruction is now supported by both the disassembler and the simulator. In the simulator it breaks to the native debugger if any like int3 on Intel.

Moved the handling of the miscellaneous instructions to a separate part.

Review URL: http://codereview.chromium.org/1576026


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4360 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-08 13:30:48 +00:00
whesse@chromium.org
c33886c9b7 Change Math.random() to return 32 bits of random goodness, instead of 30 random bits. Math.random now allocates a HeapNumber inline, and calls a C funciton directly to put the random bits into it.
Review URL: http://codereview.chromium.org/1599019

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4354 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-07 08:18:51 +00:00
peter.rybin@gmail.com
be5bb26e38 LiveEdit: implement frame dropping
Review URL: http://codereview.chromium.org/1118007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4351 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-06 17:58:28 +00:00
vitalyr@chromium.org
9b54227cc7 Land patch by Pavel Podivilov (podivilov@chromium.org).
Port string stub for keyed loads to x64 and ARM.

BUG=566
TBR=ager@chromium.org
TEST=test/mjsunit/string-index.js

Original code review: http://codereview.chromium.org/1628003

Review URL: http://codereview.chromium.org/1567024

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4348 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-06 14:16:39 +00:00
mikhail.naganov@gmail.com
889f6cce74 C++ profiles processor: wire up to VM.
If 'shell' is compiled with 'cppprofilesprocessor=on' and run
with '--prof' flag, top-down and bottom-up call trees are printed
on shell exit.

Review URL: http://codereview.chromium.org/1582004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4343 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-06 10:36:38 +00:00
vitalyr@chromium.org
f1a47d2bbd Inline %_ArgumentsLength.
This makes usage of cmov unnecessary.

Review URL: http://codereview.chromium.org/1533004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4323 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-30 13:55:03 +00:00
ager@chromium.org
2bcc49740c Port number dictionary probing in generated code to ARM.
Fix bug in ARM pixel array load code and a typo in the x64 number
dictionary load code.

Fix bug in string dictionary probing where we did not bail out if the
object has an interceptor.

BUG=640

Review URL: http://codereview.chromium.org/1332003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4292 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-26 09:05:22 +00:00
ricow@chromium.org
65e099e277 Land http://codereview.chromium.org/1311003/diff/8001/9001 to allows us to push to trunk. Corrected the ASSERT from the review.
Review URL: http://codereview.chromium.org/1404001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4290 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-26 07:55:38 +00:00
vitalyr@chromium.org
6fbad6e230 Simplify passing of AccessorInfo to interceptors:
* Use slots on the native stack when possible instead of Relocatable.
 * Got rid of a gap in AccessorInfo fields.
 * Added test for non-cacheable post-interceptor lookup.

Review URL: http://codereview.chromium.org/1327002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4288 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-25 17:08:22 +00:00
erik.corry@gmail.com
f5523ecc6a Split the virtual frame into heavy and light versions.
The heavy version is for x86 and x64.  The light version
is for ARM and MIPS.  Remove the elements_ array from the
virtual frame in the light version.  More simplifications
to come, followed by light register allocation.
Review URL: http://codereview.chromium.org/1164002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4272 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-25 13:18:00 +00:00
fschneider@chromium.org
0737ec8dcb Rename NumberInfo to TypeInfo.
Since we add more type (StringType, PrimitiveType) the name
NumberInfo does not make sense anymore.

Review URL: http://codereview.chromium.org/1207006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-25 12:44:15 +00:00
sgjesse@chromium.org
6a63910650 Re-apply "Inline floating point compare"
This re-applies r4220 and r4233, which was reverted in r4254 due to a bug. This bug has now been fixed, with the only change being line 2884 changed from

  __ SmiTag(left_side->reg());

to

  __ SmiTag(operand->reg());

Added a regression test.

BUG=http://crbug.com/39160
TEST=test/mjsunit/regress/regress-crbug-39160.js

Review URL: http://codereview.chromium.org/1251009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4261 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-25 12:04:34 +00:00
kmillikin@chromium.org
c0c1ebcaa4 Revert "Inline floating point compare"
This reverts svn revisons r4220 and r4233.

Review URL: http://codereview.chromium.org/1279001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4254 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-24 14:26:14 +00:00
sgjesse@chromium.org
0c6a3f4864 Fix GetName and Print for CompareStub
Review URL: http://codereview.chromium.org/1108006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4233 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-23 14:59:36 +00:00
erik.corry@gmail.com
3672624b45 Fix pop push optimization to work with partial snapshots (correct
registration of external references in Proxy objects).
I moved the declaration of the two functions to stub-cache.h
because with all the types they use it's hard to declare them
anywhere else.  But the actual definition is still in runtime.cc
near to the place where they are used.
Review URL: http://codereview.chromium.org/1079012

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4231 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-23 14:33:42 +00:00
vegorov@chromium.org
b7833cb5f1 Port of optimized ICs for external and pixel arrays from ia32 to ARM.
Review URL: http://codereview.chromium.org/993002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4228 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-23 13:38:04 +00:00
sgjesse@chromium.org
9240342ad6 Inline floating point compare
Inline floating point compare instead of calling the stub when the following conditions are met:
  * Code is in a loop
  * Compare is not a for loop condition
  * Compare is not an equal comparison

This inlined code handles heap number to heap number and heap number to smi compare. It can also handle smi to smi compare, but whenever there is a chance of comparing two smis the smi compare is inlined before the inlined floating point compare. Support for non SSE2 hardware is included.

A new set of variants of the compare stub without the floating point comparison code is called if the inline comapre fails due to the operands not beeing heap numbers or smis.

The virtual frame has been extended with a branch taking two live results to be carried through to the destination. This makes this change much simpler as the inlined code have two live results in registers and a number of bailouts.

CompareStub::GetName needs to be updated as well. I will do that as a separate change.

Also inlined equality check if both operands can't be NaN. This can only provide positive equals if it is the same object.
Review URL: http://codereview.chromium.org/1117011

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4220 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-23 12:36:31 +00:00