erik.corry@gmail.com
4a30e3f58e
* Add missing imul instruction on Intel.
...
* Fix incorrect signedness in disassembly of umull/mull on ARM.
* Fix incorrect register order in disassembly of umull/mull.
* Fix incorrect assembly of umull on ARM.
* Remove retroactively obsoleted restriction on choice of
registers in mul instructions on ARM.
Review URL: http://codereview.chromium.org/150002
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2292 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-29 09:32:06 +00:00
whesse@chromium.org
c19fde4f1c
X64 implementation: Change argument to relocator to take a 64-bit delta. Change maximum relocation info encoding length.
...
Review URL: http://codereview.chromium.org/146021
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2252 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-23 09:50:51 +00:00
kmillikin@chromium.org
73fe551048
Remove the unused support for jump-table switch statements.
...
Review URL: http://codereview.chromium.org/126193
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2183 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-16 09:50:37 +00:00
ager@chromium.org
225a6a82b0
Optimize Math.sin and Math.cos by avoiding runtime calls.
...
Review URL: http://codereview.chromium.org/125121
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2166 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-15 12:06:48 +00:00
whesse@chromium.org
32ce7956ac
Fix formatting of one line.
...
Review URL: http://codereview.chromium.org/119171
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2103 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-04 11:20:03 +00:00
whesse@chromium.org
2852f8d5e2
Declare register names as static constants rather than external globals.
...
Review URL: http://codereview.chromium.org/119082
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2102 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-04 11:09:17 +00:00
kmillikin@chromium.org
9c829fafe9
Change the register allocator so that it no longer tracks references
...
to the platform-specific reserved registers. They are always in use
for their intended purpose, cannot appear in the virtual frame, and
can be freely used without allocation in the code generator.
Review URL: http://codereview.chromium.org/113837
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2061 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-27 07:53:47 +00:00
mikhail.naganov@gmail.com
30a0a7de43
Split nested namespaces declaration in two lines in accordance with C++ Style Guide.
...
This issue was raised by Brett Wilson while reviewing my changelist for readability. Craig Silverstein (one of C++ SG maintainers) confirmed that we should declare one namespace per line. Our way of namespaces closing seems not violating style guides (there is no clear agreement on it), so I left it intact.
Review URL: http://codereview.chromium.org/115756
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2038 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-25 10:05:56 +00:00
whesse@chromium.org
59fab02e3e
Implement constructor and destructor of 64-bit assembler
...
Review URL: http://codereview.chromium.org/113631
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2014 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-20 12:17:23 +00:00
deanm@chromium.org
eb906555fc
Cleanup include guards:
...
- Fix some typos / guards that didn't match the filename.
- Fix some style inconsistencies.
- Add guards to files that were missing them.
- Add the directory name to the guard.
Review URL: http://codereview.chromium.org/99343
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1845 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-04 13:36:43 +00:00
lrn@chromium.org
a4d756a1c8
Move backend specific files to separate directories.
...
Move ia32 and arm specific files to subdirectories to make it easier to add more backends.
Review URL: http://codereview.chromium.org/92068
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1782 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-04-23 12:06:38 +00:00
