Commit Graph

154 Commits

Author SHA1 Message Date
bmeurer@chromium.org
a4c072ed47 Fix a crash when generating forward jumps to labels at very high assembly offsets
The first jump to a specific label was marked as jump to absolute
position -4. This value was stored in the assembly as a branch to a
offset (-4 - (instruction offset + 8)). The offset is only 24 bit
long on ARM. Thus instruction offsets higher than 2^23 - 12 would overflow
the offset.

Fix by denoting the first jump to a label by storing the jump
instruction location as the target. This will result in offset of -8,
which of course always fits in the branch instruction.

BUG=2736
TEST=cctest/test-assembler-arm/17
R=bmeurer@chromium.org, svenpanne@chromium.org

Review URL: https://codereview.chromium.org/17116006

Patch from Kimmo Kinnunen <kkinnunen@nvidia.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@15997 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-08-01 08:13:08 +00:00
m.m.capewell@googlemail.com
cc9398cd42 ARM: Make double registers low/high safe
This patch prevents taking the low/high part of a double-precision VFP register that has no corresponding single-precision VFP registers.

BUG=none
TEST=Added to test-disasm-arm.cc, test-assembler-arm.cc

Review URL: https://codereview.chromium.org/19560003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@15885 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-07-25 15:04:38 +00:00
rodolph.perfetta@gmail.com
762157d697 ARM: Implement memcpy using NEON.
Add support for a few NEON and ARM SIMD instructions and use them for various
memcpy operations.

BUG=none
TEST=none

Review URL: https://chromiumcodereview.appspot.com/17858002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@15602 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-07-10 15:32:39 +00:00
rodolph.perfetta@gmail.com
45ec481659 ARM: Smi refactoring and improvements.
Refactoring:
 * consistent use of SmiTag/Untag
 * added a few Smi macros and helpers
Improvements
 * small optimisations (e.g. merging untag and cmp #0)
 * added fixed point to double conversion instructions for simpler conversions

More on the last point: a Smi can be seen as a fixed point number with the
a one bit fractional part. Fixed to double instructions allow us to convert
a Smi to a double without untagging.

BUG=none
TEST=none

Review URL: https://chromiumcodereview.appspot.com/15085026

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14724 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-05-17 15:38:14 +00:00
rodolph.perfetta@gmail.com
76ed72bd40 ARM: clean up code now that ARMv6 is the baseline.
BUG=none
TEST=none

Review URL: https://chromiumcodereview.appspot.com/14188016

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14325 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-04-18 10:32:18 +00:00
rodolph.perfetta@gmail.com
caa37597ad ARM: Makefile/gyp update allowing better control of ARM specific options.
This patch defines new makefile command line paramaters to better control the
ARM specific options. The new paramters are
 * armfpu      = vfp, vfpv3-d16, vfpv3, neon.
 * armfloatabi = softfp, hard
 * armneon     = on
 * armthumb    = on, off
 * armtest     = on
One existing paratemer has been modified:
 * armv7       = true, false
A number of parameters have been deprecated (but are still working):
 * hardfp      = on, off
 * vfp2        = off
 * vfp3        = off

the armtest paratmer when set to "on" will lock the options used during compile
time at runtime. This allows for example to easily test the ARMv6 build on an
ARMv7 platform without having to worry about features detected at runtime. When
not specified the compiler default will be used meaning it is not necessary
anymore to specify hardfp=on when natively building on an hardfp platform.

The shell help now prints the target options and features detected.

BUG=none
TEST=none

Review URL: https://chromiumcodereview.appspot.com/14263018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14288 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-04-16 14:39:48 +00:00
rodolph.perfetta@gmail.com
ee7bdef143 ARM: Small copy optimization. Copying 64bits at a time.
BUG=none
TEST=none

Review URL: https://chromiumcodereview.appspot.com/14121006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14254 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-04-12 14:46:43 +00:00
danno@chromium.org
ffe7f6a1ba Remove ARM support for VFP2
R=yangguo@chromium.org

Review URL: https://codereview.chromium.org/13560007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14159 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-04-07 04:34:20 +00:00
mvstanton@chromium.org
a2bd4706c2 Make sure that on x86 we don't generate SSE2 code in the snapshot.
BUG=

Review URL: https://codereview.chromium.org/12391033

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13844 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-03-06 16:15:01 +00:00
svenpanne@chromium.org
e4edbb0535 Cleaned up CpuFeature scope handling.
First of all, it has nothing to do with Isolates, it is related to the assembler
at hand. Furthermore, the saving/restoring is platform-independent. Cleaned up
some platform-specific stuff on the way.

Note that there are some things which still need some cleanup, like e.g. using
EnumSet instead of uint64_t, making Probe() more uniform across platforms etc.,
but the CL is already big enough.

BUG=v8:2487

Review URL: https://codereview.chromium.org/12391055

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13823 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-03-05 10:48:16 +00:00
ulan@chromium.org
87265114c4 Emit VMLS for multiply-subtract on ARM.
BUG=none

Review URL: https://chromiumcodereview.appspot.com/12319113
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13748 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-02-27 10:24:40 +00:00
ulan@chromium.org
9ebcfb41e2 ARM: Make DoStoreKeyedFixedDoubleArray faster; don't allow conditional Vmov
This patch makes us generate faster code for DoStoreKeyedFixedDoubleArray,
by using a branch rather than a conditional Vmov instruction.

Conditional VFP instructions are not a great idea in general, and it was
especially bad in this case because Vmov expands to a bunch of instructions.
For this reason, the patch also removes the 'cond' parameter from Vmov.

Thanks to Rodolph for pointing me to this!

BUG=none

Review URL: https://chromiumcodereview.appspot.com/12316096
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13722 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-02-25 16:15:37 +00:00
ulan@chromium.org
250ebdc2be ARM: Change signature for vmov.32 function in the assembler
The assembler has 8 different vmov variants. The one for vmov.32 and for moving
an immediate into a double reg only differs in the type of the second
paremeter: vmov.32 takes an int, the other takes a double.

The situation is dangerous because C++ will happily implicitly convert between
int and double.

This patch changes the signature of the vmov.32 assembler function so that it
cannot be confused with the other vmovs.

BUG=none

Review URL: https://chromiumcodereview.appspot.com/12255031
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13668 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-02-14 12:28:02 +00:00
danno@chromium.org
0c3575c874 Generate the TransitionElementsStub using Crankshaft
This includes:
* Adding support for saving callee-clobbered double registers in Crankshaft code.
* Adding a new "HTrapAllocationMemento" hydrogen instruction to handle AllocationSiteInfo data in crankshafted stubs.
* Adding a new "HAllocate" hydrogen instruction that can allocate raw memory from the GC in crankshafted code.
* Support for manipulation of the hole in HChange instructions for Crankshafted stubs.
* Utility routines to manually build loops and if statements containing hydrogen code.

Review URL: https://codereview.chromium.org/11659022

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13585 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-02-04 12:01:59 +00:00
ulan@chromium.org
bed569b548 ARM: Make use of d16-d31 when available.
Review URL: https://chromiumcodereview.appspot.com/11428137
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13484 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-01-23 16:29:48 +00:00
ulan@chromium.org
0606abbaab Rename RelocInfo::NONE to RelocInfo::NONE32.
This CL only does renaming, nothing else.

Followup to:
https://chromiumcodereview.appspot.com/11695006/

There are now NONE and NONE64 RelocInfo types, but only ARM uses them
both at the same time. They were added in:
https://chromiumcodereview.appspot.com/11191029/

R= ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11744020
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13311 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2013-01-04 10:56:24 +00:00
ulan@chromium.org
a7f9c491dc Use VLDR instead of VMOVs from GPR when a 64-bit double can't be encoded as a VMOV immediate.
This requires constant blinding before it can be enabled. There are other interesting optimizations that can be added later, detailed in a TODO.

BUG=optimization
R=ulan@chromium.org,mstarzinger@chromium.org, hwennborg@google.com

Review URL: https://chromiumcodereview.appspot.com/11191029
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13286 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-12-28 13:34:15 +00:00
danno@chromium.org
1f4b4625ff Re-land Crankshaft-generated KeyedLoad stubs.
R=jkummerow@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11528003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13236 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-12-18 16:25:45 +00:00
danno@chromium.org
64fc1f99cb Revert 13157, 13145 and 13140: Crankshaft code stubs.
R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/11498006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13179 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-12-10 11:09:12 +00:00
danno@chromium.org
f19959cd22 Enable stub generation using Hydrogen/Lithium (again)
This initial implementation generates only KeyedLoadICs using the new Hydrogen stub infrastructure.

Committed: https://code.google.com/p/v8/source/detail?r=13105

Committed: https://code.google.com/p/v8/source/detail?r=13117

Review URL: https://codereview.chromium.org/10701054

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13140 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-12-05 11:04:10 +00:00
danno@chromium.org
66f6a8182c Revert 13117: "Enable stub generation using Hydrogen/Lithium (again)"
TBR=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/11415261

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13120 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-12-03 17:16:51 +00:00
danno@chromium.org
78b09625d5 Enable stub generation using Hydrogen/Lithium (again)
This initial implementation generates only KeyedLoadICs using the new Hydrogen stub infrastructure.

Committed: https://code.google.com/p/v8/source/detail?r=13105

Review URL: https://codereview.chromium.org/10701054

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13117 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-12-03 15:51:05 +00:00
danno@chromium.org
0a3bcc8c05 Revert 13105: "Enable stub generation using Hydrogen/Lithium."
TBR=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/11414262

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13106 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-11-30 17:45:45 +00:00
danno@chromium.org
c115ff4e33 Enable stub generation using Hydrogen/Lithium.
This initial implementation generates only KeyedLoadICs using the new Hydrogen stub infrastructure.

Review URL: https://codereview.chromium.org/10701054

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13105 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-11-30 17:31:30 +00:00
svenpanne@chromium.org
51f5a8e7c7 Moved buffer handling to AssemblerBase.
This removed a lot of copy-n-paste code and is very handy for some upcoming
changes (regarding predictable code size).

Review URL: https://codereview.chromium.org/11416133

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13034 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-11-22 10:28:29 +00:00
ulan@chromium.org
74492ab2d4 Emit VMLA for multiply-add on ARM
Review URL: https://chromiumcodereview.appspot.com/11293061
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12958 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-11-14 11:01:18 +00:00
svenpanne@chromium.org
237684fa45 Refactoring: Make emit_debug_code flag handling architecture-independent.
Review URL: https://codereview.chromium.org/11312165

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12921 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-11-09 13:43:48 +00:00
svenpanne@chromium.org
a28bc2fd97 Refactoring: Make predictable code flag handling architecture-independent.
Review URL: https://codereview.chromium.org/11359127

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12920 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-11-09 13:10:10 +00:00
ulan@chromium.org
d247c5e6c7 Change constant pool marker to be the unconditional, permanently undefined instruction.
The previously-used instruction isn't guaranteed to always be undefined,
and the encoding used was conditional (failing the condition on an
undefined instruction is itself undefined and not guaranteed to
fault!). I would have like to use a more clever encoding (see bug 2963),
but we need the extra bits to encode the size of the constant pool.

BUG=security
R=ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11242002
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12791 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-10-22 15:25:17 +00:00
danno@chromium.org
4431e0c54e Put more constants in movw/movt instructions
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/11185052

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12759 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-10-18 14:37:04 +00:00
danno@chromium.org
43e248d2e5 Use movw/movt instead of constant pool on ARMv7.
Some ARM architectures load 32-bit immediate constants more efficiently using movw/movt pairs rather than constant pool loads. This patch allows the assembler to generate one or the other load form at runtime depending on what is faster.

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/11037023

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12755 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-10-18 12:21:42 +00:00
ulan@chromium.org
86eedc26b5 Allow unaligned accesses for ARMv7.
R=mstarzinger@chromium.org,jfb@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11087047

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12735 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-10-15 15:19:36 +00:00
danno@chromium.org
08747c3a16 Support for SDIV and MLS ARM instructions, and implement DoModI using them.
Also added support for the runtime detection to check if hardware supports SDIV/UDIV
Other new opportunities to exploit SDIV/UDIV will be done in separate issues.

Review URL: https://chromiumcodereview.appspot.com/10977051
Patch from Subrato K De <subratokde@codeaurora.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12646 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-10-01 21:27:33 +00:00
danno@chromium.org
c467b2659f ARM: Small optimisation of VFP immediate creation
Save an instruction in VFP immediate creation by passing a scratch register.

BUG=none
TEST=none

Review URL: https://chromiumcodereview.appspot.com/10990024
Patch from Martyn Capewell <m.m.capewell@googlemail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12605 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-09-25 14:32:07 +00:00
erik.corry@gmail.com
a9f5f3d6f5 Fix the full compiler on ARM to always generate the same code
regardless of the detected CPU.  This is a requirement for the
debugger and the deoptimizer, which both expect that code from
the snapshot (compiled without VFP and ARM7) should have the
same layout as code compiled later.

This is another change to make snapshots more robust with
arbitrary code.
Review URL: https://chromiumcodereview.appspot.com/10824235

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12287 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-08-10 12:24:06 +00:00
svenpanne@chromium.org
b5da7279b1 Introduced TypeFeedbackId and BailoutId types.
This is a refactoring-only CL which improves the typing of IDs associated with
AST nodes. The interesting parts are in utils.h and ast.h, the rest of the CL
basically follows mechanically.

Review URL: https://chromiumcodereview.appspot.com/10831172

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12263 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-08-06 14:13:09 +00:00
erik.corry@gmail.com
1d0f872ef9 Fix full code generator to not use --debug-code if it is in
mksnapshot or a VM that is booted from a snapshot.  --debug-code
can still have an effect on stub and optimized code and it still
works on the full code generator when running without snapshots.

The deoptimizer generates full-code-generator code and relies on it having
the same layout as last time.  This means that the code the full code
generator makes for the snapshot should be the same as the code it makes
later.  This change makes the full code generator create more consistent
code between mksnapshot time and run time.

This is a bug fix and a step towards making the snapshot code more robust.
Review URL: https://chromiumcodereview.appspot.com/10834085

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12239 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-07-31 14:59:32 +00:00
yangguo@chromium.org
59f212e7eb Relax requirement from VFP3 to VFP2 where possible.
BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com/10818026

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12194 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-07-25 15:26:16 +00:00
yangguo@chromium.org
fb81da2e5f ARM: Fix literal pool handling for breakpoints in debugger.
BUG=2177
TEST=none

Review URL: https://chromiumcodereview.appspot.com/10449047
Patch from Martyn Capewell <m.m.capewell@googlemail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11812 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-06-14 11:16:47 +00:00
jkummerow@chromium.org
390f0e6d05 Port count-based profiler to ARM
Review URL: https://chromiumcodereview.appspot.com/9837004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11120 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-03-23 12:16:40 +00:00
erik.corry@gmail.com
bc1eb293cd Enable snapshots on MIPS. This is based on
http://codereview.chromium.org/9372063 by Daniel Kalmar.
Review URL: https://chromiumcodereview.appspot.com/9722020

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11107 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-03-21 14:29:14 +00:00
fschneider@chromium.org
1f7d42efc9 Landing for pliard@chromium.org: Remove static initializers in v8.
This change includes two CLs by pliard@chromium.org:

1. http://codereview.chromium.org/9447052/ (Add CallOnce() and simple LazyInstance implementation):

Note that this implementation of LazyInstance does not handle global destructors (i.e. the lazy instances are never deleted).

This CL was initially reviewed on codereview.appspot.com:
http://codereview.appspot.com/5687064/



2.  http://codereview.chromium.org/9455088/ (Remove static initializers in v8):
This CL depends on CL 9447052 (adding CallOnce and LazyInstance).
It is based on a patch sent by Digit.

With this patch applied, we have only one static initializer left (in atomicops_internals_x86_gcc.cc). This static initializer populates a structure used by x86 atomic operations. It seems that we can hardly remove it. If possible, it will be removed in a next CL. 

This CL also modifies the presubmit script to check the number of static initializers.


BUG=v8:1859
Review URL: https://chromiumcodereview.appspot.com/9666052

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11010 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-03-12 13:56:56 +00:00
jkummerow@chromium.org
6c85119c6a Fix building with clang
BUG=v8:1912

Review URL: https://chromiumcodereview.appspot.com/9285013

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10492 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-01-24 16:36:55 +00:00
kmillikin@chromium.org
32d7dd0409 Fix for an ARM register allocation bug.
An off-by-one in the register allocator could lead to allocating (and
clobbering) the reserved 0.0 double register.  This required a function with
14 or more live double values.

BUG=
TEST=

Review URL: http://codereview.chromium.org/9114038

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10374 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2012-01-10 16:59:55 +00:00
fschneider@chromium.org
171846dbd1 Avoid static initializers in assember-arm.h.
Patch by joth@chromium.org.

BUG=v8:1784
Review URL: http://codereview.chromium.org/8367001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9732 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-10-21 09:55:25 +00:00
vegorov@chromium.org
ac36cb4504 Merge experimental/gc branch to the bleeding_edge.
Review URL: http://codereview.chromium.org/7945009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9328 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-09-19 18:36:47 +00:00
erik.corry@gmail.com
bf4222fb29 Fix ARM build for gcc-4.6.
This is based on Peter Varga's work in http://codereview.chromium.org/7708004/
but with a different solution for the Operand(0) int/pointer ambiguity.
Review URL: http://codereview.chromium.org/7706030

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8998 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-08-23 12:00:09 +00:00
svenpanne@chromium.org
55336b37bd Fixed confusion between AST IDs and condition codes on ARM.
C++'s 'great' idea of implicitly converting an enum to an integral value hit us
again, this time resulting in silly (but currently non-harmful) entries in the
relocation table. Encapsulated the AST ID recording a bit, which helped a lot to
find the culprit.
Review URL: http://codereview.chromium.org/7400016

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8671 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-07-18 10:44:13 +00:00
svenpanne@chromium.org
233a8dc237 Cleaned up calling-related methods in the ARM assembler.
Generalized Call macro instruction to handle AST IDs, too, making things more
similar to the Intel assemblers. Removed unused methods. Minor signature
cleanup. Simplified assertions.
Review URL: http://codereview.chromium.org/7284029

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8482 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-06-30 11:26:15 +00:00
sgjesse@chromium.org
39ed137e10 ARM: Improve register allocation and constraints (try 2).
Gives ~20% boost for Crypto benchmark on A9.

BUG=none
TEST=added to mjsunit/div-mod.js

Review URL: http://codereview.chromium.org//7276034
Patch from Martyn Capewell <m.m.capewell@googlemail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8459 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-06-29 10:51:06 +00:00