AuroraMiddleware/v8
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42 Commits

Author SHA1 Message Date
dusan.simicic
3e3dbdf3e5 MIPS[64]: Support for some SIMD operations (8) 
Add support for S1x4And, S1x4Or, S1x4Xor, S1x4Not, S1x4AnyTrue,
S1x4AllTrue, S1x8And, S1x8Or, S1x8Xor, S1x8Not, S1x8AnyTrue,
S1x8AllTrue, S1x16And, S1x16Or, S1x16Xor, S1x16Not, S1x16AnyTrue,
S1x16AllTrue, SimdLoad, SimdStore operations for mips32 and mips64
architectures.

BUG=

Review-Url: https://codereview.chromium.org/2801683003
Cr-Commit-Position: refs/heads/master@{#45662}
 2017-06-01 13:25:50 +00:00
dusan.simicic
cd5c009569 MIPS[64]: Support for MSA instructions 
This patch adds support for MIPS SIMD (MSA) instructions in Assembler
and Decoder (disassembler) classes. MSA instructions are implemented for
both mips32 and mips64 architectures.

BUG=

Review-Url: https://codereview.chromium.org/2740123004
Cr-Commit-Position: refs/heads/master@{#44148}
 2017-03-27 13:20:35 +00:00
Ilija.Pavlovic
65fd5e1165 MIPS: Implement MADD.S, MSUB, MADDF and MSUBF. 
Implementation MADD.S. MSUB.fmt, MADDF.fmt, MSUBF.fmt and corresponding
tests for assembler and disassembler.

TEST=cctest/test-assembler-mips[64], cctest/test-disasm-mips[64]
BUG=

Review-Url: https://codereview.chromium.org/2313623002
Cr-Commit-Position: refs/heads/master@{#39415}
 2016-09-14 11:37:13 +00:00
ivica.bogosavljevic
e1e50f3fff Implement byte swapping instructions on MIPS32 and MIPS64. 
BUG=

Review-Url: https://codereview.chromium.org/2069933003
Cr-Commit-Position: refs/heads/master@{#37295}
 2016-06-27 14:36:40 +00:00
machenbach
a23222ed32 [build] Fix a clang warning 
For cross-compiler-compatibility and standards compliance %p
requires a void*, rather than any pointer type.

BUG=chromium:474921

Review-Url: https://codereview.chromium.org/2001073002
Cr-Commit-Position: refs/heads/master@{#36466}
 2016-05-24 10:47:24 +00:00
jochen
6f472db65a Disable soon to be deprecated APIs per default for v8 
Embedders still can use those APIs by default

test-api.cc still has an exception to use the old APIs...

BUG=v8:4143
R=vogelheim@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/1505803004

Cr-Commit-Position: refs/heads/master@{#32701}
 2015-12-09 10:35:04 +00:00
alan.li
cfd9beeced MIPS: Adding simulator support for AUI/DAUI/DAHI/DATI. 
BUG=

Review URL: https://codereview.chromium.org/1481493002

Cr-Commit-Position: refs/heads/master@{#32417}
 2015-11-30 20:30:23 +00:00
Djordje.Pesic
b287c74308 MIPS: Fixup disasembler for ctc1 and cfc1 
These instructions now show FCSR in disassembly, instead f31

BUG=

Review URL: https://codereview.chromium.org/1481023002

Cr-Commit-Position: refs/heads/master@{#32366}
 2015-11-27 11:38:18 +00:00
akos.palfi
76af78e412 MIPS: Fix disassembler test failures. 
Don't generate FP64 mode specific instructions in FP32 mode.

TEST=cctest/test-disasm-mips/Type1,
     cctest/test-disasm-mips/CVT_DISSASM

BUG=

Review URL: https://codereview.chromium.org/1462803003

Cr-Commit-Position: refs/heads/master@{#32138}
 2015-11-20 09:43:37 +00:00
jochen
3cf6e040c4 Mark cctests that don't use deprecated APIs as such 
BUG=4134
R=epertoso@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/1451733002

Cr-Commit-Position: refs/heads/master@{#32011}
 2015-11-16 16:45:31 +00:00
balazs.kilvady
6993cd0de5 MIPS: Fix 'MIPS:r6 compact branch optimization.' 
Jic and jialc compact branch ops are fixed as they does not have 'forbidden slot' restriction. Also COP1 branches (CTI instructions) added to IsForbiddenAfterBranchInstr().

TEST=cctest/test-disasm-mips/Type0
BUG=

Review URL: https://codereview.chromium.org/1423493006

Cr-Commit-Position: refs/heads/master@{#31922}
 2015-11-10 17:16:09 +00:00
yangguo
1667c15e37 Debugger: move implementation to a separate folder. 
R=cbruni@chromium.org

Review URL: https://codereview.chromium.org/1265923002

Cr-Commit-Position: refs/heads/master@{#29951}
 2015-07-31 11:08:15 +00:00
Ilija.Pavlovic
2bc5a21211 MIPS: 
Improved checking target ranges for J and JAL instructions.
Adapted disassembler test for J and JAL instructions.

TEST=cctest/test-disasm-mips[64]
BUG=

Review URL: https://codereview.chromium.org/1237083003

Cr-Commit-Position: refs/heads/master@{#29693}
 2015-07-16 08:14:08 +00:00
balazs.kilvady
bb247d4fb4 MIPS: Fix 'Reland Update V8 DEPS.' 
Port c63e50edc9

BUG=
TEST=test-disasm-mips/Type

Review URL: https://codereview.chromium.org/1233323002

Cr-Commit-Position: refs/heads/master@{#29688}
 2015-07-15 18:59:18 +00:00
machenbach
c63e50edc9 Reland Update V8 DEPS. 
Rolling v8/tools/clang to 58128abd44c22255def1163d30bc9bb2cc85e15c

Reland after https://codereview.chromium.org/1241643002/

TBR=jochen@chromium.org, thakis@chromium.org

Review URL: https://codereview.chromium.org/1237793003

Cr-Commit-Position: refs/heads/master@{#29673}
 2015-07-15 10:32:03 +00:00
machenbach
c59fdf929c Revert of Update V8 DEPS. (patchset #3 id:40001 of https://codereview.chromium.org/1232583002/) 
Reason for revert:
[Sheriff] Looks like another clang option got deprecated: http://build.chromium.org/p/client.v8/builders/V8%20Linux%20ASAN%20mipsel%20-%20debug%20builder/builds/326

Original issue's description:
> Update V8 DEPS.
>
> Rolling v8/tools/clang to 58128abd44c22255def1163d30bc9bb2cc85e15c
>
> Original CL: https://codereview.chromium.org/1232043002/
>
> BUG=
>
> Committed: https://crrev.com/6211e1660492f653d30ddd1336bce6f9083ede94
> Cr-Commit-Position: refs/heads/master@{#29598}

TBR=jochen@chromium.org,akos.palfi@imgtec.com
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=

Review URL: https://codereview.chromium.org/1232803003

Cr-Commit-Position: refs/heads/master@{#29600}
 2015-07-13 11:45:28 +00:00
machenbach
6211e16604 Update V8 DEPS. 
Rolling v8/tools/clang to 58128abd44c22255def1163d30bc9bb2cc85e15c

Original CL: https://codereview.chromium.org/1232043002/

BUG=

Review URL: https://codereview.chromium.org/1232583002

Cr-Commit-Position: refs/heads/master@{#29598}
 2015-07-13 10:59:07 +00:00
Ilija.Pavlovic
75e6717591 MIPS: Disassembler enhancement. Disassembled branch instruction displays branch target absolute address. 
TEST=cctest/test-disasm-mips[64]
BUG=

Review URL: https://codereview.chromium.org/1213553004

Cr-Commit-Position: refs/heads/master@{#29462}
 2015-07-03 10:32:03 +00:00
Djordje.Pesic
2604c75eed MIPS: disabling rsqrt and recip for mips32r1 
Disabling rsqrt and recip for mips32r1 in assembler, disassembler and simulator

Review URL: https://codereview.chromium.org/1221663006

Cr-Commit-Position: refs/heads/master@{#29425}
 2015-07-01 16:15:42 +00:00
Ilija.Pavlovic
f0c4edfdc5 MIPS: Implemented PC-relative instructions for R6. 
Added: JIC, BEQZC, JIALC, LDPC, LWPC, ALUIPC, ADDIUPC, ALIGN/DAILGN, LWUPC,
AUIPC, BC, BALC. Additional fixed compact branch offset.

TEST=test-assembler-mips[64]/r6_align, r6_dalign, r6_aluipc, r6_lwpc, r6_jic,
                             r6_beqzc, r6_jialc, r6_addiupc, r6_ldpc, r6_lwupc,
                             r6_auipc, r6_bc, r6_balc
BUG=

Review URL: https://codereview.chromium.org/1195793002

Cr-Commit-Position: refs/heads/master@{#29143}
 2015-06-19 11:06:14 +00:00
Djordje.Pesic
874c54e05e MIPS: Add float instructions and test coverage, part two 
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests.

Review URL: https://codereview.chromium.org/1145223002

Cr-Commit-Position: refs/heads/master@{#28595}
 2015-05-22 13:49:00 +00:00
Djordje.Pesic
0f93a456ec Reland "MIPS: Add float instructions and test coverage, part one" 
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests.

Review URL: https://codereview.chromium.org/1147493002

Cr-Commit-Position: refs/heads/master@{#28472}
 2015-05-19 10:35:07 +00:00
paul.lind
d090469cdd Revert of MIPS: Add float instructions and test coverage, part one 
Reason for revert:
Simulator test failures in RunChangeFloat64ToInt.., RunChangeTaggedToInt32,
div-mul-minus-one

Original issue's description:

> Implement assembler, disassembler tests for all instructions for mips32
> and mips64. Additionally, add missing single precision float instructions
> for r2 and r6 architecture variants in assembler, simulator and disassembler
> with corresponding tests.

BUG=

Review URL: https://codereview.chromium.org/1143473003

Cr-Commit-Position: refs/heads/master@{#28404}
 2015-05-14 18:44:41 +00:00
Djordje.Pesic
2a6a87d71a MIPS: Add float instructions and test coverage, part one 
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests.

Review URL: https://codereview.chromium.org/1119203003

Cr-Commit-Position: refs/heads/master@{#28402}
 2015-05-14 14:02:36 +00:00
dusan.milosavljevic
76ddd58cff MIPS: Add min/max suffixed variants. 
TEST=
BUG=

Review URL: https://codereview.chromium.org/1118693002

Cr-Commit-Position: refs/heads/master@{#28181}
 2015-04-30 16:43:09 +00:00
Djordje.Pesic
9da34c56a1 MIPS: Add rounding support in simulator and RINT instruction. 
Added rounding according to fcsr, CVT_W_D and RINT.D instruction in assembler, dissasembler and simulator and wrote appropiate tests.

BUG=

Review URL: https://codereview.chromium.org/1108583003

Cr-Commit-Position: refs/heads/master@{#28143}
 2015-04-30 06:29:16 +00:00
dusan.milosavljevic
4b5af7b32e MIPS: Major fixes and clean-up in asm. for instruction encoding. 
- Fixed single float register type instruction en[de]coding in assembler and disassembler.
- Added max and min instructions for r6 and corresponding tests.
- Fixed selection instruction for boundary cases in simulator.
- Update assembler tests to be more thorough wrt boundary cases.

TEST=cctest/test-assembler-mips64/MIPS17, MIPS18
     cctest/test-disasm-mips64/Type1
     cctest/test-assembler-mips/MIPS16, MIPS17
     cctest/test-disasm-mips/Type1
BUG=

Review URL: https://codereview.chromium.org/1057323002

Cr-Commit-Position: refs/heads/master@{#27601}
 2015-04-06 11:54:38 +00:00
dusan.milosavljevic
f00b4e94fb MIPS: Refactor simulator and add selection instructions for r6. 
TEST=
BUG=

Review URL: https://codereview.chromium.org/1046873004

Cr-Commit-Position: refs/heads/master@{#27530}
 2015-03-30 17:37:13 +00:00
yangguo
019096f829 Serializer: move to a subfolder and clean up includes. 
R=jochen@chromium.org

Review URL: https://codereview.chromium.org/1041743002

Cr-Commit-Position: refs/heads/master@{#27501}
 2015-03-27 15:29:07 +00:00
dusan.milosavljevic@imgtec.com
8804736ba3 Reland "MIPS: Add support for arch. revision 6 to mips32 port." 
Fixing gclient runhooks failure caused by reverted commit r23050.

TEST=
BUG=
R=jkummerow@chromium.org, paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/467583002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23088 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-12 19:04:15 +00:00
machenbach@chromium.org
f744c68936 Revert "Reland "MIPS: Add support for arch. revision 6 to mips32 port."" 
This reverts commit r23050 for breaking runhooks on chromium.

See e.g.:
http://build.chromium.org/p/client.v8/builders/Chrome%20Linux%20Perf/builds/1438/steps/runhooks/logs/stdio

TBR=jochen@chromium.org

Review URL: https://codereview.chromium.org/458983003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23053 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-11 16:18:49 +00:00
dusan.milosavljevic@imgtec.com
2097fa59b3 Reland "MIPS: Add support for arch. revision 6 to mips32 port." 
Original commit r23028 breaks ARM64 build due to conflicting FP64 symbolic constant definition in src/globals.h and src/arm64/constants-arm64.h.

TEST=
BUG=
R=jkummerow@chromium.org, paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/457313003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23050 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-11 15:46:32 +00:00
jochen@chromium.org
152c3b809c Revert 23028 - "MIPS: Add support for arch. revision 6 to mips32 port." 
Breaks compilation of ARM64.

| Additional summary:
|  - Introduce fp64 fpu mode into mips32 port required for r6.
|  - Implement runtime detections for fpu mode and arch. revision to preserve
|    compatibility with previous architecture revisions.
|
| TEST=
| BUG=
| R=jkummerow@chromium.org, paul.lind@imgtec.com
|
| Review URL: https://codereview.chromium.org/453043002

BUG=none
LOG=n
TBR=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/458193002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23030 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-11 11:01:06 +00:00
dusan.milosavljevic@imgtec.com
6c47bc726c MIPS: Add support for arch. revision 6 to mips32 port. 
Additional summary:
 - Introduce fp64 fpu mode into mips32 port required for r6.
 - Implement runtime detections for fpu mode and arch. revision to preserve
   compatibility with previous architecture revisions.

TEST=
BUG=
R=jkummerow@chromium.org, paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/453043002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23028 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-11 10:40:25 +00:00
jochen@chromium.org
56a486c322 Use full include paths everywhere 
- this avoids using relative include paths which are forbidden by the style guide
- makes the code more readable since it's clear which header is meant
- allows for starting to use checkdeps

BUG=none
R=jkummerow@chromium.org, danno@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/304153016

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21625 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-06-03 08:12:43 +00:00
dcarney@chromium.org
baf6add9f0 bulk replace Isolate::Current in tests 
R=svenpanne@chromium.org
BUG=

Review URL: https://codereview.chromium.org/23534067

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@16817 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-09-19 09:17:13 +00:00
mstarzinger@chromium.org
dd70ce29d1 Unify the way cctest initalizes the VM for each test case. 
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/13483017

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14199 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-04-10 08:29:39 +00:00
svenpanne@chromium.org
53310ac152 Added a version of the v8::HandleScope constructor with an Isolate and use that consistently. 
I tried to limit the use of v8::Isolate::GetCurrent() and v8::internal::Isolate::Current() as much as possible, but sometimes this would have involved restructuring tests quite a bit, which is better left for a separate CL.

BUG=v8:2487

Review URL: https://codereview.chromium.org/12716010

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13953 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-03-15 12:06:53 +00:00
yangguo@chromium.org
754dc79066 MIPS: Added support for Loongson architectures. 
BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com/9692048
Patch from Daniel Kalmar <kalmard@homejinni.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11032 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-03-13 16:18:30 +00:00
erik.corry@gmail.com
b3e0761e38 Cosmetic changes ("set up" is a verb, "setup" is a noun). 
Review URL: http://codereview.chromium.org/9139051

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10399 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-01-13 13:09:52 +00:00
fschneider@chromium.org
d8cec510e4 Landing: MIPS: Fixed some mips32r1-specific test failures. 
Original review: http://codereview.chromium.org/7737019/
Review URL: http://codereview.chromium.org/7739019

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9137 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-09-05 11:50:36 +00:00
sgjesse@chromium.org
67ebabc16e Add cctest/test-disasm-mips which was mistakenly omitted from r7825. 
BUG=
TEST=

Review URL: http://codereview.chromium.org//6994013

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7846 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-05-11 08:26:22 +00:00