bmeurer@chromium.org
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bbd62e4a20
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[turbofan] Improve testability of the InstructionSelector.
Allow to pass the set of supported CPU features to
the InstructionSelector, so it can be tested without
messing with the command line flags.
Also add InstructionSelector sample for ia32.
TEST=cctest/test-instruction-selector,cctest/test-instruction-selector-{arm,ia32}
R=svenpanne@chromium.org
Review URL: https://codereview.chromium.org/441883004
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22876 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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2014-08-05 13:26:55 +00:00 |
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bmeurer@chromium.org
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35f0976895
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[turbofan] Support for combining branches with <Operation>WithOverflow.
Also unify the handling of binops in the InstructionSelector
backends.
TEST=cctest/test-run-machops,cctest/test-instruction-selector-arm
R=svenpanne@chromium.org
Review URL: https://codereview.chromium.org/415403005
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22800 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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2014-08-04 08:18:37 +00:00 |
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bmeurer@chromium.org
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ba12ca16a2
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[turbofan] Add support for Int32SubWithOverflow.
TEST=cctest/test-run-machops,cctest/test-instruction-selector-arm
R=titzer@chromium.org
Review URL: https://codereview.chromium.org/432373002
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22791 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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2014-08-01 12:18:20 +00:00 |
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bmeurer@chromium.org
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6161d4305d
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[arm] Unify instruction selector for Word32Neg.
Previously code generation for Word32Neg (implemented as Word32Xor
with -1) was somewhat adhoc and not complete. Now it's uniform
and supports the full range of operand2's.
TEST=cctest/test-instruction-selector-arm,cctest/test-run-machops
R=titzer@chromium.org
Review URL: https://codereview.chromium.org/434923002
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22789 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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2014-08-01 11:14:47 +00:00 |
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bmeurer@chromium.org
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6ccb8704f2
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[turbofan] Add Int32AddWithOverflow machine operator.
TEST=cctest/test-run-machops,cctest/test-instruction-selector-arm
R=titzer@chromium.org
Review URL: https://codereview.chromium.org/436593002
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22784 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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2014-08-01 09:32:58 +00:00 |
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bmeurer@chromium.org
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0eecf982f9
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[arm] Add support for ROR. Refactor operand2 handling.
This was the last missing bit for full "flexible second operand" /
operand2 support on ARM.
TEST=cctest/test-instruction-selector-arm,cctest/test-run-machops
R=jarin@chromium.org
Review URL: https://codereview.chromium.org/434553002
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22732 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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2014-07-31 07:44:29 +00:00 |
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danno@chromium.org
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a1383e2250
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Land the Fan (disabled)
R=mstarzinger@chromium.org
Review URL: https://codereview.chromium.org/426233002
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22709 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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2014-07-30 13:54:45 +00:00 |
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