Commit Graph

587 Commits

Author SHA1 Message Date
erik.corry@gmail.com
bcfaba24c1 Do integer mod via sum-of-digits technique. This benefits the date
code.
Review URL: http://codereview.chromium.org/2876011

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4964 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-28 11:47:23 +00:00
vitalyr@chromium.org
8ab6832203 Add "has fast elements" bit to maps and use it in inlined keyed loads.
A potential issue with this change is creating lots of maps when
objects flip between fast/slow elements modes.  We could add special
transitions to avoid this.  Yet testing this on our benchmarks, gmail,
and wave seems to indicate that this is not a real problem.

Review URL: http://codereview.chromium.org/2870018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4941 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-24 13:56:35 +00:00
erik.corry@gmail.com
a4a757d74f ARM: Remove spilled scopes.
Review URL: http://codereview.chromium.org/2848023

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4936 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-24 11:05:38 +00:00
erik.corry@gmail.com
251b1c5f93 ARM: Remove a bunch of spilled scopes. Still a lot to go.
Review URL: http://codereview.chromium.org/2828004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4932 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-24 07:54:48 +00:00
erik.corry@gmail.com
ca8298273a ARM: Fix bug introduced in 4783 (2.2.15) that caused the
result of 1 << x to be miscalculated for some inputs.
Review URL: http://codereview.chromium.org/2848021

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4929 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-23 13:44:11 +00:00
kaznacheev@chromium.org
927750571c Remove redundant checks in and around GenerateDictionaryLoad.
Similar or duplicate checks are scattered around the code before doing the dictionary load. 
Also the entire branch in GenerateCallNormal that handles global/builtin receiver is 
guaranteed to bail out from GenerateDictionaryLoad, so there is no point in generating it at all.

The purpose of the patch is:
- making C++ code more compact and transparent,
- not generating dead code. 

There is a tiny performance gain. The patch is ia32 only for now.

Please tell me if I am missing anything.


Review URL: http://codereview.chromium.org/2801007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4926 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-23 09:10:21 +00:00
lrn@chromium.org
41d9d375e3 Lower waste from alignment of deferred code blocks.
Some ARM chips load instructions 8 byte at a time.

Review URL: http://codereview.chromium.org/2809029

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4920 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-23 07:03:34 +00:00
lrn@chromium.org
2bd8d3323b X64: Change strategy for spilling to match ia32. It's just better.
Align deferred code blocks to 16-byte address boundaries.

Review URL: http://codereview.chromium.org/2855018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4914 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-22 10:07:57 +00:00
erik.corry@gmail.com
53340b2624 Add movw and movt support for ARMv7. This includes some code from
Zhang Kun.  For now we only emit movw and movt in places where no
relocation is needed.  Small performance boost (around 0.5%).
Also adds support for turning ALU operations (eor etc.) with
large immediates into mvn or movw followed by a register-based
ALU operation.
Review URL: http://codereview.chromium.org/2821014

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4913 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-22 08:38:32 +00:00
sgjesse@chromium.org
bdbda3b6d0 ARM: Update the generation of the name for GenericBinaryOpStub
Review URL: http://codereview.chromium.org/2840011

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4904 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-21 10:34:25 +00:00
erik.corry@gmail.com
694669926c ARM: Load the heap number map into a register and keep it
there throughout the binary op stub (used for checking and
creating heap numbers).
Review URL: http://codereview.chromium.org/2843010

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4897 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-17 21:51:51 +00:00
vitalyr@chromium.org
3cafa65462 Track ascii-ness of data in externalized strings.
If a two-byte string only contains ascii characters, then we can save
memory when flattening a cons string containing it. Similarly we can
use this in Array.prototype.join implementation. To track this a new
bit is added to instance type. This bit is used as a hint in generated
code and in runtime functions.

To enable testing a new V8 extension is added controlled by
--expose-externalize-string flag.

Review URL: http://codereview.chromium.org/2762008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4894 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-17 16:19:28 +00:00
erik.corry@gmail.com
d1c60571ae ARM: Minor refactoring of RecordWrite, does not require the offset to
be in a register anymore. Code also updated to use the bitfield
instructions when available.  This is a commit of
http://codereview.chromium.org/2845003/show for Rodolph Perfetta.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4889 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-17 10:45:37 +00:00
ager@chromium.org
6702ace935 Move definition of NegateConditon from assembler*-inl.h files to
assembler*.h files to make clang happy. There was no reason for having
the definition in the -inl.h files in the first place.

Review URL: http://codereview.chromium.org/2825008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4888 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-17 08:41:48 +00:00
sgjesse@chromium.org
50a2e15bbd ARM: Special case for modulus of two smis in the generic binary opration stub
When lhs and rhs are positive smis and rhs is a power of two perform modulus by masking.
Review URL: http://codereview.chromium.org/2873001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4884 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-16 20:03:32 +00:00
kaznacheev@chromium.org
b251f14782 Port KeyedCallIC implementation to x64 and ARM.
Also edited ic-ia32.cc for clarity and better formatting.

Review URL: http://codereview.chromium.org/2853003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4873 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-16 10:03:47 +00:00
ager@chromium.org
ed0fc41723 Change hash computation for transcendental cache to use arithmetic
shifts. Leads to fewer collisions.

Review URL: http://codereview.chromium.org/2809012

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4872 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-16 08:29:25 +00:00
sgjesse@chromium.org
1c5a9435ab ARM: Change code generation for function return
Generating code for function return on ARM is now aligned with the other platforms. The first non-shadowed return statement encountered will emit code for function return and all other returns including the fall through at the bottom of a function will jump to that.
Review URL: http://codereview.chromium.org/2815003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4856 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-14 11:37:05 +00:00
erik.corry@gmail.com
142de62819 ARM: Be more smart about switching instructions when immediates
don't fit in the instruction.  Use ubfx and sbfx more.
Review URL: http://codereview.chromium.org/2826001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4855 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-14 11:20:36 +00:00
whesse@chromium.org
317dcabe84 Change tests for string type in RegExpExecStub on all platforms.
Review URL: http://codereview.chromium.org/2772004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4854 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-14 10:21:24 +00:00
ager@chromium.org
a9d252749f Fix thinko in arm transcendental cache probing introduced just before
committing.

Review URL: http://codereview.chromium.org/2764009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4847 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-11 12:26:41 +00:00
ager@chromium.org
c3514589b8 Add missing files accidentally left out on last commit.
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4844 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-11 10:25:34 +00:00
ager@chromium.org
89ffd6c2f2 Implement transcendental cache probing in generated code on ARM.
Fixed hash code computation on ia32 and x64 to match the runtime
system (change arithmetic shift right to logical shift right).

Review URL: http://codereview.chromium.org/2731007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4843 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-11 10:18:44 +00:00
sgjesse@chromium.org
e045ca6898 Better handling of stepping out of a function
With the change in r4820 all return statements are now breakable like any statement, so stepping will stop before the return statement actually returning from a function. With this change the position when breaking in the function return (after executing the return statement) will be the actual end of the function. At this point the return value is available as it saved to the stack by the debug break at return handling. Added information on the actual value returned from the function to the debugger.
Review URL: http://codereview.chromium.org/2783002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4835 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-10 09:02:16 +00:00
sgjesse@chromium.org
4446355c26 ARM: Fix bug in r4820 related to code for additional break positions.
These issues where unly revealed in debug mode
Review URL: http://codereview.chromium.org/2733006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4827 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-09 07:40:35 +00:00
sgjesse@chromium.org
baf100fc48 Add parenthesis around '&&' within '||'
Warning by some gcc versions. Adding the parenthesis made the condition correct.

TBR=ager@chromium.org
Review URL: http://codereview.chromium.org/2725003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4821 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-08 12:20:24 +00:00
sgjesse@chromium.org
634fb9152c More precise break points and stepping when debugging
Added support for more precise break points when debugging and stepping. To achieve that additional nop instructions are inserted where breaking would otherwise be impossible. The number of nop instructions inserted are sufficient to make place for patching with a call to a debug break code stub. On Intel that is 5 nop's for 32-bit and 13 for 64-bit. Om ARM 3 nop instructions (12 bytes) are required.

In order to avoid inserting nop's in to many places a simple ast checker have been added to check whether there are breakable code in a statement or expression. If it is possible to break in an expression no additional break enabeling code is inserted.

Added break locations to the true and false part of a conditional expression.

Added stepping tests to cover more constructs.

These changes are only in the full compiler.

Changed the default value for the option --debugger in teh d8 shell from true to false. The reason for this is that with --debugger turned on the full compiler will be used for all code in when running d8, which can be unexpeceted.

Review URL: http://codereview.chromium.org/2693002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4820 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-08 12:04:49 +00:00
vegorov@chromium.org
53923e9233 Revert r4782. Fix issues 728, 732.
Review URL: http://codereview.chromium.org/2701003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4806 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-07 09:36:30 +00:00
kaznacheev@chromium.org
ff61618c4b Extend CallIC to support non-constant names.
This speeds up constructs like this: 
var zz='replace'; '123'[zz]('3','4');

Review URL: http://codereview.chromium.org/2280007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4804 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-07 08:27:32 +00:00
ager@chromium.org
a40569e5a0 Port fast eval calls to x64 and ARM. For global variables that can
only be shadowed by eval-introduced variables we usually do not need
to do a context lookup in the runtime system.

Review URL: http://codereview.chromium.org/2672001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4803 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-07 07:12:00 +00:00
vitalyr@chromium.org
8689b3bcea Direct load of global function prototype.
As most of call IC code is tied to a context anyway we can save a few dependent loads by having a direct reference to an initial map of a global function.

Review URL: http://codereview.chromium.org/2239009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4802 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-04 16:20:34 +00:00
erik.corry@gmail.com
9fc31e1fed Fix last-minute thinko that I snuck into the last change.
It busted crypto-decrypt.
Review URL: http://codereview.chromium.org/2434005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4784 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-02 10:47:50 +00:00
erik.corry@gmail.com
b600905133 ARM: Track Smis on top 4 stack positions and Smi loop variables.
Improve code generation for known smis and suspected Smis.
Review URL: http://codereview.chromium.org/2452002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4783 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-02 09:37:02 +00:00
sgjesse@chromium.org
33973b7d13 ARM: Add more logic to the generic keyed load stub
The generic keyed load stub was missing converting string keys to numberign keys and lookup in the keyed lookup cache. This is now added together with an additional counter on all platforms.
Review URL: http://codereview.chromium.org/2441002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4773 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-01 21:11:38 +00:00
vitalyr@chromium.org
26be30912d Fix generated code for String.charCodeAt.
Review URL: http://codereview.chromium.org/2468001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4770 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-01 14:08:19 +00:00
dimich@chromium.org
610ad370a3 Fix an occasional crash in Assembler::ldr() for arm.
A peephole optimization can be attempted on a buffer that contains only a single command. The crash happens when running debug on Snow Leopard with --simulator=arm.

Review URL: http://codereview.chromium.org/2454001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4762 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-06-01 08:01:50 +00:00
whesse@chromium.org
019b8c4511 Change the interface of LoadIC on the x64 platform to take its arguments in registers.
Review URL: http://codereview.chromium.org/2330003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4759 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-31 13:26:12 +00:00
erik.corry@gmail.com
44cfbe392c ARM: Remove LoadConditionAndSpill and VisitAndSpill.
Review URL: http://codereview.chromium.org/2414001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4753 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-31 08:52:57 +00:00
erik.corry@gmail.com
7e460811b9 Missing file from last commit.
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4750 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-28 11:27:14 +00:00
erik.corry@gmail.com
8a2637fba9 Get rid of LoadAndSpill on ARM since Load() knows whether it is
in a spilled scope or not.  Also get rid of some spilled scopes
that we don't need any more.  The generators for the %_ functions,
CodeGenerator::Generate*, are now not spilled by default.  Some
of them (IsObject and related) have been converted to register
allocated operation.
Review URL: http://codereview.chromium.org/2368001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4749 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-28 11:23:07 +00:00
whesse@chromium.org
527c7972c7 Refactor GenerateLoadInterceptor, removing LoadInterceptorCompiler class and CompileLoadInterceptor static function.
All platforms (x64, ia32, and ARM) changed.
Review URL: http://codereview.chromium.org/2251003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4747 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-27 14:14:46 +00:00
ager@chromium.org
e840870331 Fix presubmit error. Trailing whitespace.
TBR=erik.corry
Review URL: http://codereview.chromium.org/2224007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4746 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-27 13:57:55 +00:00
erik.corry@gmail.com
73256b05af Fix jump targets on ARM to merge virtual frames (really this time).
Use the jump targets to move the first deferred code to not flush
registers in the inlined case (KeyedLoad).
Review URL: http://codereview.chromium.org/2249002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4745 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-27 13:48:52 +00:00
erik.corry@gmail.com
67c0ec6f17 Update and improve support for ARMv7 bitfield instructions.
This is a commit of http://codereview.chromium.org/2124022
for Rodolph Perfetta.  I changed the test in
test-assembler-arm.cc so it only runs if ARMv7 is supported.


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4744 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-27 13:46:18 +00:00
vegorov@chromium.org
fc7c5f789a Cardmarking writebarrier.
Reapply r4715 with fixes reviewed in http://codereview.chromium.org/2276002.

Review URL: http://codereview.chromium.org/2255004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4743 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-27 12:30:45 +00:00
antonm@chromium.org
0dd031aa01 Move assertions to not take case to check that it's safe to omit CheckPrototypes in this case.
Review URL: http://codereview.chromium.org/2279005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4740 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-27 11:16:04 +00:00
sgjesse@chromium.org
58ea4c20cd ARM: Default to use unaligned accesses in the simulator
Support building with or without unaligned accesses by using scons flag simulatorunalignedaccesses.

$ scons simulator=arm simulatorunalignedaccesses=off
$ scons simulator=arm simulatorunalignedaccesses=on

If simulatorunalignedaccesses is not specified (or specified as default) the default is to use unaligned accesses.
Review URL: http://codereview.chromium.org/2218003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4737 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-27 07:31:10 +00:00
vitalyr@chromium.org
64bc39a726 Fix: make string indexing work with Infinity.
NumberToUint32 that I was trying to use maps -0 to +0 (as desired) but
also maps +/-Infinity to +0, which made +/-Infinity a valid string
index. I fixed it by introducing a new runtime function with the right
semantics.

TEST=LayoutTests/fast/js/char-at.html,mjsunit/string-charat.js

Review URL: http://codereview.chromium.org/2223003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4734 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-26 16:11:30 +00:00
vitalyr@chromium.org
ad0e38909f Custom call IC-s for String.prototype.{charAt,charCodeAt}.
These string methods can be composed from two basic blocks: charCodeAt
and fromCharCode, both of which have fast cases for certain types of
inputs. In this patch these two blocks are refactored to allow
generating the fast cases without having to jump around the slow
cases. In the slow cases since they can now be invoked both from
inline runtime functions and from IC stubs we either have to
save/restore state of the current frame or enter/leave a new internal
frame. This is handled by new RuntimeCallHelper interface. Its
implementation for virtual frame is based on FrameRegisterState class
extracted from DeferredCode class.

Review URL: http://codereview.chromium.org/2087009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4733 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-26 14:23:19 +00:00
antonm@chromium.org
3e88d0d2af Various refactorings in interceptor calling and loading.
1) do not push receiver early---that simplifies tail call preparation
on ia32/x64 and renders special cleanup unnecessary;
2) do not do second map check if interceptor's and cached holder
are the same;
3) do not push/pop receiver if receiver and holder registers are the same
(means that receiver is interceptor's holder);
4) do batch pushes on arm;
5) minor cosmetic improvements.

Review URL: http://codereview.chromium.org/2282001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4732 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-26 14:04:37 +00:00