Commit Graph

22 Commits

Author SHA1 Message Date
whesse@chromium.org
2a63594602 Commit fucomip change 197037 http://codereview.chromium.org/197037/show
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3100 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-21 09:24:25 +00:00
sgjesse@chromium.org
8105ae3106 Optimize calls to GenericBinaryStub.
The calls to GenericBinaryStub can now pass the arguments in registers instead of on the stack. It is supported for ADD, SUB, MUL and DIV. The convention in GenericBinaryStub is not changed so the left operand is passed in edx and the right one in eax. When the stub contains smi code arguments are always passed on the stack as the smi code has to have left and right operands on eax and ebx, so moving from edx,eax to eax,ebx is not worth it and the smi code also trashes the registers so if arguments where passed in registers they would have to be saved on the stack anyway.

Added flags to disable the use of certain Intel CPU features to make it easier to test different code paths.
Review URL: http://codereview.chromium.org/246075

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3041 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-08 14:27:46 +00:00
sgjesse@chromium.org
cab2794e95 Change clamping 0..255 instruction sequence for pixel array code.
The subb instruction added to the IA-32 assembler is not used as dec_b ended up being used instead.

There is a mesurable difference.
Review URL: http://codereview.chromium.org/246076

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3033 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-08 07:09:46 +00:00
whesse@chromium.org
996f1d4ee3 Rename a constant to kCallTargetAddressOffset
Review URL: http://codereview.chromium.org/192075

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2876 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-11 12:41:27 +00:00
ager@chromium.org
2fbadf73b3 Fix IA32 build.
TBR=lrn@chromium.org
Review URL: http://codereview.chromium.org/201078

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2872 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-10 13:27:00 +00:00
lrn@chromium.org
158dcbc39d X64: Extract all smi operations into MacroAssembler macros.
First step in changing Smi representation.

Review URL: http://codereview.chromium.org/196077


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2869 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-10 12:55:27 +00:00
whesse@chromium.org
cf37189c65 Use SSE2 instructions when available on ia32 platform.
Review URL: http://codereview.chromium.org/197057

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2868 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-10 07:13:01 +00:00
lrn@chromium.org
fdf31f7f5e X64: Implement debugger hooks.
Debugger is now fully functional.
Fix difference in emitting statement positions to match ia32.

Review URL: http://codereview.chromium.org/171107


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2716 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-08-19 10:18:30 +00:00
lrn@chromium.org
0e11fbcd79 Removed unsafe optimization in RecordWrite.
Optimization was only unsafe if new-space was in the low half of memory and an object could be
located in the top half at an addressed that only differ from a new-space address by the high
bit.

Review URL: http://codereview.chromium.org/159784


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2608 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-08-03 13:17:34 +00:00
kasperl@chromium.org
94c4760225 Revert r2486, r2487, and r2488 until I get the chance to fix
the performance issue with number dictionaries.

TBR=kmillikin@chromium.org

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2490 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-17 04:57:17 +00:00
bak@chromium.org
e0047e4331 Changed hash table to use more of the hash value when probing.
Review URL: http://codereview.chromium.org/155350

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2486 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-16 12:56:50 +00:00
erik.corry@gmail.com
4a30e3f58e * Add missing imul instruction on Intel.
* Fix incorrect signedness in disassembly of umull/mull on ARM.
* Fix incorrect register order in disassembly of umull/mull.
* Fix incorrect assembly of umull on ARM.
* Remove retroactively obsoleted restriction on choice of
  registers in mul instructions on ARM.
Review URL: http://codereview.chromium.org/150002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2292 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-29 09:32:06 +00:00
whesse@chromium.org
c19fde4f1c X64 implementation: Change argument to relocator to take a 64-bit delta. Change maximum relocation info encoding length.
Review URL: http://codereview.chromium.org/146021

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2252 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-23 09:50:51 +00:00
kmillikin@chromium.org
73fe551048 Remove the unused support for jump-table switch statements.
Review URL: http://codereview.chromium.org/126193

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2183 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-16 09:50:37 +00:00
ager@chromium.org
225a6a82b0 Optimize Math.sin and Math.cos by avoiding runtime calls.
Review URL: http://codereview.chromium.org/125121

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2166 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-15 12:06:48 +00:00
whesse@chromium.org
32ce7956ac Fix formatting of one line.
Review URL: http://codereview.chromium.org/119171

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2103 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-04 11:20:03 +00:00
whesse@chromium.org
2852f8d5e2 Declare register names as static constants rather than external globals.
Review URL: http://codereview.chromium.org/119082

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2102 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-04 11:09:17 +00:00
kmillikin@chromium.org
9c829fafe9 Change the register allocator so that it no longer tracks references
to the platform-specific reserved registers.  They are always in use
for their intended purpose, cannot appear in the virtual frame, and
can be freely used without allocation in the code generator.

Review URL: http://codereview.chromium.org/113837

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2061 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-27 07:53:47 +00:00
mikhail.naganov@gmail.com
30a0a7de43 Split nested namespaces declaration in two lines in accordance with C++ Style Guide.
This issue was raised by Brett Wilson while reviewing my changelist for readability. Craig Silverstein (one of C++ SG maintainers) confirmed that we should declare one namespace per line. Our way of namespaces closing seems not violating style guides (there is no clear agreement on it), so I left it intact.

Review URL: http://codereview.chromium.org/115756


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2038 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-25 10:05:56 +00:00
whesse@chromium.org
59fab02e3e Implement constructor and destructor of 64-bit assembler
Review URL: http://codereview.chromium.org/113631

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2014 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-20 12:17:23 +00:00
deanm@chromium.org
eb906555fc Cleanup include guards:
- Fix some typos / guards that didn't match the filename.
- Fix some style inconsistencies.
- Add guards to files that were missing them.
- Add the directory name to the guard.

Review URL: http://codereview.chromium.org/99343


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1845 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-04 13:36:43 +00:00
lrn@chromium.org
a4d756a1c8 Move backend specific files to separate directories.
Move ia32 and arm specific files to subdirectories to make it easier to add more backends.

Review URL: http://codereview.chromium.org/92068


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1782 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-04-23 12:06:38 +00:00