Commit Graph

117 Commits

Author SHA1 Message Date
lrn@chromium.org
f0ef4d7bac ARM: Implement native substring copying.
Review URL: http://codereview.chromium.org/552186

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3793 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-02-04 09:11:43 +00:00
whesse@chromium.org
f88e7e82b7 Add vstr and vldr floating point load and store to ARM assembler, disassembler, and simulator.
Review URL: http://codereview.chromium.org/545155

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3687 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-01-25 11:54:10 +00:00
erik.corry@gmail.com
593c388b39 Fix for bug 512 from Subrato De, CodeAurora.
Review URL: http://codereview.chromium.org/464016

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3435 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-12-09 11:14:45 +00:00
erik.corry@gmail.com
df4f52347b Allow a platform to indicate that some CPU features are always
available.  We use this to ensure that snapshots on MacOSX can
use SSE2 instructions.  Also clean up and assertify the
handling of things we can't do when we are generating a
snapshot.  Fix a bug in the new serialization tests where
they activated Snapshot::enable() too late after code had been
generated that assumed no snapshots.
Review URL: http://codereview.chromium.org/391051

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3301 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-13 12:32:57 +00:00
erik.corry@gmail.com
407816af39 Fix some style issues in the ARM code.
Also move a function into the macro assembler.
Fix some *& placement errors that had accumulated.
Review URL: http://codereview.chromium.org/385069

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3293 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-12 13:55:21 +00:00
erik.corry@gmail.com
0d94d7c785 Add vfp support on ARM. Patch from John Jozwiak.
Review URL: http://codereview.chromium.org/348019

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3292 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-12 13:04:02 +00:00
sgjesse@chromium.org
77a71c90c7 Fix issue 491: constantpool dump violates ARM debugger assertion for return point
The generation of the return sequence is now protected from having the constant pool emitted inside of it in both compilers.

BUG=http://code.google.com/p/v8/issues/detail?id=491
TEST=test/mjsunit/regress/regress-491.js
Review URL: http://codereview.chromium.org/362003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3215 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-04 14:45:50 +00:00
sgjesse@chromium.org
54ec6c031a Fix xssue 492: ARM debug crash: mozilla/ecma/FunctionObjects/15.3.1.1-3
When the number of parameters times 4 (kPointerSize) to a function cannot be encoded in 12 bits the return sequence gets one more instruction. Changed the assertion to check for this case.

BUG=http://code.google.com/p/v8/issues/detail?id=492
TEST=test/mjsunit/regress/regress-492.js
Review URL: http://codereview.chromium.org/354028

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3211 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-04 10:04:22 +00:00
sgjesse@chromium.org
34d6ff7606 Implemented missing pieces of the debugger for ARM.
The main piece of this change was to add support for break on return for ARM. On ARM the normal js function return consist of the following code sequence.

  mov sp, fp
  ldmia sp!, {fp, lr}
  add sp, sp, #4
  bx lr

to a call to the debug break return entry code using the following code sequence

  mov lr, pc
  ldr pc, [pc, #-4]
  <debug break return entry code entry point address>
  bktp 0

The values of Assembler::kPatchReturnSequenceLength and Assembler::kPatchReturnSequenceLength are somewhat misleading, but they fit the current use in the debugger. Also Assembler::kPatchReturnSequenceLength is used in the IC code as well (for something which is not related to return sequences at all). I will change that in a separate changelist.

For the debugger to work also added recording of the return sequence in the relocation info and handling of source position recording when a function ends with a return statement.

Used the constant kInstrSize instead of sizeof(Instr).

Passes all debugger tests on both simulator and hardware (only release mode tested on hardware).
Review URL: http://codereview.chromium.org/199075

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2879 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-14 06:57:24 +00:00
lrn@chromium.org
9230ad29eb ARM native regexps.
Review URL: http://codereview.chromium.org/173567


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2785 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-08-31 12:40:37 +00:00
erik.corry@gmail.com
97f319d989 Get peep-hole optimizer working on ARM by not emitting
debug info at places where the debugger can't stop.
This fixes the ARM version after
http://codereview.chromium.org/14170
Reformat debug-backtrace.js test.
Review URL: http://codereview.chromium.org/155285

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2416 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-09 11:59:58 +00:00
erik.corry@gmail.com
9dd35ee2f9 ARM improvements to constant div, mod and mul.
* Fast runtime calls for div and mod.
* Fix assembly and disassembly of multiply instructions.
* Strength reduce and inline multiplications to shift-add.
* Strength reduce and inline mod by power of 2.
* Strength reduce mod by other small integers to mul.
* Strength reduce div by 2 and 3.
Review URL: http://codereview.chromium.org/155047

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2355 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-03 12:44:31 +00:00
erik.corry@gmail.com
ea3b18919e We have to be sure to generate a relocatable instruction when
handling external references before a heap serialization.
Review URL: http://codereview.chromium.org/151080

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2310 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-30 16:35:42 +00:00
erik.corry@gmail.com
4a30e3f58e * Add missing imul instruction on Intel.
* Fix incorrect signedness in disassembly of umull/mull on ARM.
* Fix incorrect register order in disassembly of umull/mull.
* Fix incorrect assembly of umull on ARM.
* Remove retroactively obsoleted restriction on choice of
  registers in mul instructions on ARM.
Review URL: http://codereview.chromium.org/150002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2292 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-06-29 09:32:06 +00:00
mikhail.naganov@gmail.com
30a0a7de43 Split nested namespaces declaration in two lines in accordance with C++ Style Guide.
This issue was raised by Brett Wilson while reviewing my changelist for readability. Craig Silverstein (one of C++ SG maintainers) confirmed that we should declare one namespace per line. Our way of namespaces closing seems not violating style guides (there is no clear agreement on it), so I left it intact.

Review URL: http://codereview.chromium.org/115756


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2038 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-25 10:05:56 +00:00
erik.corry@gmail.com
ade7d1abd6 Fix incorrect assert on ARM that assumed that coprocessor id was always zero. This
is hit in debug mode on non-EABI non-simulator ARM platforms.  Thanks to
richarjo@gmail.com for reporting.
Review URL: http://codereview.chromium.org/113299

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1923 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-05-12 21:35:43 +00:00
lrn@chromium.org
a4d756a1c8 Move backend specific files to separate directories.
Move ia32 and arm specific files to subdirectories to make it easier to add more backends.

Review URL: http://codereview.chromium.org/92068


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1782 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-04-23 12:06:38 +00:00