AuroraMiddleware/v8
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Author SHA1 Message Date
vitalyr@chromium.org
624b13a804 Custom call IC for String.fromCharCode. 
Review URL: http://codereview.chromium.org/3291015

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5433 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-09-09 13:38:01 +00:00
erik.corry@gmail.com
751ec5d099 IA32: Avoid going into stubs or runtime code for bitops even if the 
inputs are heap numbers or the result is a heap number (only with
SSE2).  Make it possible for a deferred code object to work without
spilling all registers.
Review URL: http://codereview.chromium.org/3054047

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5215 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-08-09 13:12:02 +00:00
lrn@chromium.org
2bd8d3323b X64: Change strategy for spilling to match ia32. It's just better. 
Align deferred code blocks to 16-byte address boundaries.

Review URL: http://codereview.chromium.org/2855018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4914 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-22 10:07:57 +00:00
ager@chromium.org
6702ace935 Move definition of NegateConditon from assembler*-inl.h files to 
assembler*.h files to make clang happy. There was no reason for having
the definition in the -inl.h files in the first place.

Review URL: http://codereview.chromium.org/2825008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4888 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-17 08:41:48 +00:00
ager@chromium.org
2043956c54 Remove the comisd instruction from the ia32 and x64 assemblers. We 
should always use ucomisd.

Add missing pop from floating-point stack in case of allocation failure.
Review URL: http://codereview.chromium.org/2831009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4878 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-16 12:32:34 +00:00
sgjesse@chromium.org
634fb9152c More precise break points and stepping when debugging 
Added support for more precise break points when debugging and stepping. To achieve that additional nop instructions are inserted where breaking would otherwise be impossible. The number of nop instructions inserted are sufficient to make place for patching with a call to a debug break code stub. On Intel that is 5 nop's for 32-bit and 13 for 64-bit. Om ARM 3 nop instructions (12 bytes) are required.

In order to avoid inserting nop's in to many places a simple ast checker have been added to check whether there are breakable code in a statement or expression. If it is possible to break in an expression no additional break enabeling code is inserted.

Added break locations to the true and false part of a conditional expression.

Added stepping tests to cover more constructs.

These changes are only in the full compiler.

Changed the default value for the option --debugger in teh d8 shell from true to false. The reason for this is that with --debugger turned on the full compiler will be used for all code in when running d8, which can be unexpeceted.

Review URL: http://codereview.chromium.org/2693002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4820 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-08 12:04:49 +00:00
lrn@chromium.org
d3d295efa7 Add optimized version of memcpy on ia32. 
Only used in one place right now.
Still room for tweaking.

Review URL: http://codereview.chromium.org/2582001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4796 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-04 11:30:55 +00:00
whesse@chromium.org
0fc3dca698 Add test_b(Operand, immediate) to ia32 assembler, and use it where possible. Improve comparison to a constant one-character string. Use CmpInstanceType in more places on ia32. Add IsObjectJSObjectType and IsInstanceJSObjectType to ia32 macro assembler, using a single branch for a range test. 
Review URL: http://codereview.chromium.org/2586001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4795 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-04 10:46:04 +00:00
erik.corry@gmail.com
73b2fc29b7 Remove unused relocation mode. 
Review URL: http://codereview.chromium.org/2136012

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4672 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-18 13:39:16 +00:00
antonm@chromium.org
c7b2af37ba Use direct loop when filling small arrays. 
r3995 (http://code.google.com/p/v8/source/detail?r=3995) introduce performance
regression for the case when arrat size is small (think new Array(4)).

It turns out that in those cases rep stos is slower than plain loop (apprently
due to ecx increment, but I didn't check this hypothesis.)  The next thing
to try could be direct jump into right place of long sequence of stos'es.

Review URL: http://codereview.chromium.org/2082006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4664 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-17 14:14:34 +00:00
whesse@chromium.org
4751f36492 Use untagged int32 values in evaluation of side-effect free expressions. 
Review URL: http://codereview.chromium.org/975001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4148 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-03-16 16:07:19 +00:00
whesse@chromium.org
44d0112b71 Add SSE2 instructions to disassembler and movmskpd SSE2 instruction to assembler. 
Review URL: http://codereview.chromium.org/865002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4110 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-03-12 08:36:01 +00:00
antonm@chromium.org
38acad676a Faster filling newly allocated arrays with the holes from the Array construction stub. 
Review URL: http://codereview.chromium.org/661245

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3995 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-03-02 12:42:15 +00:00
ricow@chromium.org
496868722f Added fast support for Math.pow. This simply calculates the result using the 
same method as the old powi version in runtime.cc and also checks if
the exponent is 0.5 or -0.5 in which case we calculate the square root or 
reciprocal value of the square root.


Review URL: http://codereview.chromium.org/660072

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3964 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-26 10:24:58 +00:00
lrn@chromium.org
3135110af8 IA32: Native access to TranscendentalCache for sin/cos. 
Review URL: http://codereview.chromium.org/652041

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3929 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-23 10:29:02 +00:00
sgjesse@chromium.org
e60efbff28 Optimize string plus smi 
When adding a string with a smi value the number string cache is checked in generated code. If the there is a string value in the number string cache the resulting string is produced in generated code.
Review URL: http://codereview.chromium.org/596082

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3843 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-12 11:55:04 +00:00
sgjesse@chromium.org
9b4312fd76 Fixed random style violations. 
Review URL: http://codereview.chromium.org/574009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3801 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-04 21:32:02 +00:00
sgjesse@chromium.org
8ced9b99be Port direct call from JavaScript to native RegExp to x64 
Code tested on both Linux and Windows.

Added a bit more abstraction to calling a C function from generated code.

Minor tweaks to the ia32 version.
Review URL: http://codereview.chromium.org/548179

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3740 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-29 10:33:27 +00:00
lrn@chromium.org
9c6335929b Implement inline string compare on ARM. 
Backport optimizations from x64 version to ia32.

Review URL: http://codereview.chromium.org/546087

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3670 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-21 12:10:56 +00:00
lrn@chromium.org
eee6c6405e RegExp bitmap test for word character. 
Review URL: http://codereview.chromium.org/547024

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3626 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-18 09:49:50 +00:00
sgjesse@chromium.org
658ca2f174 Add missing instructions to the IA-32 disasembler 
Added newly added instructions to test-disasem-ia32.cc and implemented the missi
ng ones in the disasembler.

Added some asserts to 8-bit instructions which only work with eax, ebx, ecx and
edx (al, bl, cl and dl).

Removed the loope instruction.
Review URL: http://codereview.chromium.org/548002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3577 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-11 15:19:53 +00:00
sgjesse@chromium.org
91cfb3730a Add generated code for ascii string comparison 
Careted a stub for string comparison and used part of the code from that to inline string comparison in the compare stub.
Review URL: http://codereview.chromium.org/525115

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3569 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-08 11:58:15 +00:00
sgjesse@chromium.org
3d36c712aa Use generated code to create sub strings. 
Added a stub to allocate and fill a string object with a substring from another string.

Use the rep movs instruction to copy the string data as it turned out to be the fastest way.

While preparing this I experimented with some SSE2 instructions, so the instructions movdqa and movdqu are still in the IA-32 assembler even though they are not used.
Review URL: http://codereview.chromium.org/525085

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3554 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-07 09:59:37 +00:00
erik.corry@gmail.com
73fcafd650 Bring back the fisttp instruction on machines with SSE3, but check the 
input so we don't have to check the exception flags afterwards.
Review URL: http://codereview.chromium.org/509001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3504 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-12-21 08:32:20 +00:00
bak@chromium.org
07742f5672 -Inlined double variant of compare iff one of the sides is a constant smi and it is not a for loop condition. 
Review URL: http://codereview.chromium.org/507040

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3487 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-12-18 06:38:12 +00:00
ager@chromium.org
1a6893cda9 Revert keyed load cache probing in generated code. 
Crashes on Windows.

TBR=erik.corry@gmail.com
Review URL: http://codereview.chromium.org/488006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3446 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-12-10 12:52:28 +00:00
ager@chromium.org
87496c61aa Probe keyed load cache in generic keyed load stub. 
Only implemented on ia32 and x64 for now.  The generic keyed load stub
on arm is falling behind and it is time to fix that, but that will be
a separate change.


Review URL: http://codereview.chromium.org/460142

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3445 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-12-10 09:21:23 +00:00
fschneider@chromium.org
5debbc3693 Move CPU-specific constants from debug.h into the platform-specific directories. 
The constant for the return sequence length (JSReturnSequenceLength) was
defined in debug.h. Since this constant are also needed outside the debugger code
I moved them into assembler-xxx.h. Otherwise compiling with debuggersupport=off
would fail on ARM.

BUG=http://code.google.com/p/v8/issues/detail?id=533

Review URL: http://codereview.chromium.org/456001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3383 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-11-30 15:09:49 +00:00
sgjesse@chromium.org
459e4c6b0c Changes to Intel shift functions 
Change name of shifts picking the shift count from cl to sal_cl, shl_cl and shr_cl.

Add special encoding of shift by one for shr which was missing it.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3314 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-11-17 08:35:43 +00:00
erik.corry@gmail.com
df4f52347b Allow a platform to indicate that some CPU features are always 
available.  We use this to ensure that snapshots on MacOSX can
use SSE2 instructions.  Also clean up and assertify the
handling of things we can't do when we are generating a
snapshot.  Fix a bug in the new serialization tests where
they activated Snapshot::enable() too late after code had been
generated that assumed no snapshots.
Review URL: http://codereview.chromium.org/391051

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3301 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-11-13 12:32:57 +00:00
erik.corry@gmail.com
dbd7f20d2d Introduce a switch for the new snapshot code and switch 
it on by default.  Includes bug fixes for new snapshots.
Review URL: http://codereview.chromium.org/342054

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3184 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-30 10:23:12 +00:00
erik.corry@gmail.com
97de363ef5 * Fix new snapshot code on ARM. 
Review URL: http://codereview.chromium.org/344011

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3161 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-28 12:37:54 +00:00
erik.corry@gmail.com
fb2317b63b New snapshot framework. Doesn't work on ARM yet (code targets 
are different).  Is able to deserialize the whole heap and run
some stuff.  Not available as the primary snapshot system yet.
Review URL: http://codereview.chromium.org/335009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3142 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-27 11:54:01 +00:00
kbr@chromium.org
d5f00cf6cc Add optimized ICs for new CanvasArray types introduced in WebGL 
specification under development. This is a follow-on CL to
http://codereview.chromium.org/293023 .

Based on review feedback, defined the behavior of storing NaN and
+/-Infinity into external arrays of integer types as storing 0. Added
test cases. Added fucomi instruction to assembler. Fixed bug in
KeyedLoadIC::GenerateExternalArray when allocation of HeapNumber
failed. Fixed bug in encoding of 16-bit immediate arithmetic
instructions in 64-bit port.

Removed raising of exceptions for negative array indices passed to
external arrays and associated tests. Based on current discussion in
WebGL working group, will probably end up removing the exception
throwing altogether.

Review URL: http://codereview.chromium.org/294022

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3113 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-22 14:49:00 +00:00
whesse@chromium.org
2a63594602 Commit fucomip change 197037 http://codereview.chromium.org/197037/show 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3100 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-21 09:24:25 +00:00
sgjesse@chromium.org
8105ae3106 Optimize calls to GenericBinaryStub. 
The calls to GenericBinaryStub can now pass the arguments in registers instead of on the stack. It is supported for ADD, SUB, MUL and DIV. The convention in GenericBinaryStub is not changed so the left operand is passed in edx and the right one in eax. When the stub contains smi code arguments are always passed on the stack as the smi code has to have left and right operands on eax and ebx, so moving from edx,eax to eax,ebx is not worth it and the smi code also trashes the registers so if arguments where passed in registers they would have to be saved on the stack anyway.

Added flags to disable the use of certain Intel CPU features to make it easier to test different code paths.
Review URL: http://codereview.chromium.org/246075

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3041 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-08 14:27:46 +00:00
sgjesse@chromium.org
cab2794e95 Change clamping 0..255 instruction sequence for pixel array code. 
The subb instruction added to the IA-32 assembler is not used as dec_b ended up being used instead.

There is a mesurable difference.
Review URL: http://codereview.chromium.org/246076

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3033 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-08 07:09:46 +00:00
whesse@chromium.org
996f1d4ee3 Rename a constant to kCallTargetAddressOffset 
Review URL: http://codereview.chromium.org/192075

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2876 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-11 12:41:27 +00:00
ager@chromium.org
2fbadf73b3 Fix IA32 build. 
TBR=lrn@chromium.org
Review URL: http://codereview.chromium.org/201078

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2872 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-10 13:27:00 +00:00
lrn@chromium.org
158dcbc39d X64: Extract all smi operations into MacroAssembler macros. 
First step in changing Smi representation.

Review URL: http://codereview.chromium.org/196077


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2869 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-10 12:55:27 +00:00
whesse@chromium.org
cf37189c65 Use SSE2 instructions when available on ia32 platform. 
Review URL: http://codereview.chromium.org/197057

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2868 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-10 07:13:01 +00:00
lrn@chromium.org
fdf31f7f5e X64: Implement debugger hooks. 
Debugger is now fully functional.
Fix difference in emitting statement positions to match ia32.

Review URL: http://codereview.chromium.org/171107


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2716 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-08-19 10:18:30 +00:00
lrn@chromium.org
0e11fbcd79 Removed unsafe optimization in RecordWrite. 
Optimization was only unsafe if new-space was in the low half of memory and an object could be
located in the top half at an addressed that only differ from a new-space address by the high
bit.

Review URL: http://codereview.chromium.org/159784


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2608 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-08-03 13:17:34 +00:00
kasperl@chromium.org
94c4760225 Revert r2486, r2487, and r2488 until I get the chance to fix 
the performance issue with number dictionaries.

TBR=kmillikin@chromium.org

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2490 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-17 04:57:17 +00:00
bak@chromium.org
e0047e4331 Changed hash table to use more of the hash value when probing. 
Review URL: http://codereview.chromium.org/155350

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2486 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-16 12:56:50 +00:00
erik.corry@gmail.com
4a30e3f58e * Add missing imul instruction on Intel. 
* Fix incorrect signedness in disassembly of umull/mull on ARM.
* Fix incorrect register order in disassembly of umull/mull.
* Fix incorrect assembly of umull on ARM.
* Remove retroactively obsoleted restriction on choice of
  registers in mul instructions on ARM.
Review URL: http://codereview.chromium.org/150002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2292 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-29 09:32:06 +00:00
whesse@chromium.org
c19fde4f1c X64 implementation: Change argument to relocator to take a 64-bit delta. Change maximum relocation info encoding length. 
Review URL: http://codereview.chromium.org/146021

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2252 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-23 09:50:51 +00:00
kmillikin@chromium.org
73fe551048 Remove the unused support for jump-table switch statements. 
Review URL: http://codereview.chromium.org/126193

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2183 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-16 09:50:37 +00:00
ager@chromium.org
225a6a82b0 Optimize Math.sin and Math.cos by avoiding runtime calls. 
Review URL: http://codereview.chromium.org/125121

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2166 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-15 12:06:48 +00:00
whesse@chromium.org
32ce7956ac Fix formatting of one line. 
Review URL: http://codereview.chromium.org/119171

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2103 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-04 11:20:03 +00:00