AuroraMiddleware/glibc
1
0
Fork 0
mirror of https://sourceware.org/git/glibc.git synced 2024-11-26 23:10:06 +00:00
Code Issues Packages Projects Releases Wiki Activity
4,090 Commits 334 Branches 1,646 Tags 278 MiB
70063199c3
Commit Graph

34 Commits

Author SHA1 Message Date
Carlos O'Donell
601352feab 2008-05-12 Aurelien Jarno <aurelien@aurel32.net> 
[BZ #6506]
	* sysdeps/hppa/fpu/fesetenv.c: bufptr is always read, temp is
	read while writing back status word.
 2008-05-12 12:09:21 +00:00
Carlos O'Donell
3ad1f14c7a 2006-12-03 Carlos O'Donell <carlos@systemhalted.org> 
* sysdeps/unix/sysv/linux/hppa/bits/atomic.h: Remove non-atomic
	versions. Adjust jump target to '0b'.

2006-12-03  Carlos O'Donell  <carlos@systemhalted.org>

	* sysdeps/hppa/Makefile: Set long-double-fcts to `no'.
	* sysdeps/hppa/fpu/libm-test-ulps: Regenerate.
	* sysdeps/hppa/fpu/bits/mathdef.h: New file.
 2006-12-03 23:03:20 +00:00
Carlos O'Donell
48dcf1c597 2006-04-20 Carlos O'Donell <carlos@systemhalted.org> 
* sysdeps/hppa/fpu/fclrexcpt.c (feclearexcept): Use union to
	align parameters. Specify memory clobbers.
	* sysdeps/hppa/fpu/fedisblxcpt.c (fedisableexcept): Likewise.
	* sysdeps/hppa/fpu/feenablxcpt.c (feenableexcept): Likewise.
	* sysdeps/hppa/fpu/fegetenv.c (fegetenv): Do not save exception
	register. Use memcpy to align buffer.
	* sysdeps/hppa/fpu/fegetexcept.c (fegetexcept): Store and reload
	fr0. Use union to align parameters.
	* sysdeps/hppa/fpu/fegetround.c (fegetround): Likewise.
	* sysdeps/hppa/fpu/feholdexcpt.c (feholdexcept): Do not save
	exception registers. Define libm_hidden_def.
	* sysdeps/hppa/fpu/fesetenv.c (fesetenv): Do not save exception
	registers.
	* sysdeps/hppa/fpu/fesetround.c (fesetround): Use union to
	align parameters, speficy memory clobbers. Define libm_hidde_def
	* sysdeps/hppa/fpu/feupdateenv.c (feupdateenv): Use union to align
	parameters. Use memcpy to align buffer.
	* sysdeps/hppa/fpu/fgetexcptflg.c (fegetexceptflag): Likewise.
	* sysdeps/hppa/fpu/fsetexcptflg.c (fesetexceptflag): Likewise.
	* sysdeps/hppa/fpu/ftestexcept.c (fetestexcept): Likewise.
	* sysdeps/hppa/fpu/libm-test-ulps: Update.
	* sysdeps/hppa/fpu/bits/fenv.h: Add ABI comments.
 2006-04-21 00:27:20 +00:00
Andreas Jaeger
8cfa63a341 Adopt for cacosh test change. 2006-01-15 17:59:37 +00:00
Ulrich Drepper
87ffc6ec79 (feupdateenv): Use only sw[0] and call feraiseexcept. 2004-04-17 22:51:43 +00:00
Ulrich Drepper
e98a88227f (feholdexcept): Fix order of fp status register loads. 2004-02-21 02:10:01 +00:00
Ulrich Drepper
c1f024c3e1 (fesetexceptflag): Set enable bits not raised exception bits. 2003-12-18 03:58:26 +00:00
Ulrich Drepper
2da72a511e (feraiseexcept): Add delayed exception flushing, FE_UNDERFLOW is DBL_MIN/3.0, 
FE_INEXACT is triggered by M_PI/69.69 converted to single precision.
 2003-12-18 03:58:09 +00:00
Ulrich Drepper
1bff455e8a (feupdateenv): Read raised exception bits, OR with envp, pass to fesetenv. 2003-12-18 03:57:50 +00:00
Ulrich Drepper
c5cf6f4a3d (fesetenv): Use asm 'ma,' completer, and gcc '+r' constraint. 2003-12-18 03:57:31 +00:00
Ulrich Drepper
4923dcf1bd (feholdexcept): Use asm 'ma,' completer, and gcc '+r' constraint. 2003-12-18 03:57:14 +00:00
Ulrich Drepper
78f9fd6419 (fegetenv): use asm 'ma,' completer, and gcc '+r' constraint. 2003-12-18 03:56:50 +00:00
Ulrich Drepper
4db359168e (feclearexcept): Right shift FE_ALL_EXCEPT before complimenting. 2003-12-18 03:56:15 +00:00
Roland McGrath
fad367110e 2003-03-23 Jakub Jelinek <jakub@redhat.com> 
* sysdeps/alpha/fpu/libm-test-ulps: Update.
	* sysdeps/arm/libm-test-ulps: Update.
	* sysdeps/hppa/fpu/libm-test-ulps: Update.
	* sysdeps/ia64/fpu/libm-test-ulps: Update.
	* sysdeps/mips/fpu/libm-test-ulps: Update.
	* sysdeps/powerpc/nofpu/libm-test-ulps: Update.
	* sysdeps/powerpc/fpu/libm-test-ulps: Update.
	* sysdeps/sparc/sparc32/fpu/libm-test-ulps: Update.
	* sysdeps/sparc/sparc64/fpu/libm-test-ulps: Update.
	* sysdeps/sh/sh4/fpu/libm-test-ulps: Update.
	* sysdeps/s390/fpu/libm-test-ulps: Update.
	* sysdeps/x86_64/fpu/libm-test-ulps: Update.
 2003-03-23 00:52:10 +00:00
Roland McGrath
b7d5c13d9d 2002-12-02 Carlos O'Donell <carlos@baldric.uwo.ca> 
* sysdeps/hppa/fpu/fesetround.c (fesetround): Use ~FE_DOWNWARD so both
	bits of RM are cleared.
 2002-12-03 02:50:52 +00:00
Roland McGrath
1a65a64534 2002-11-11 Randolf Chung <tausq@debian.org> 
* sysdeps/hppa/fpu/libm-test-ulps: New file (generated).
 2002-11-19 06:40:57 +00:00
Ulrich Drepper
280ad607c7 Add libm_hidden_ver. 2002-09-10 01:26:37 +00:00
Andreas Jaeger
3214b89b32 Update to LGPL v2.1. 2001-07-06 04:56:23 +00:00
Ulrich Drepper
aad4bb3a11 Clear the exception flags, not the enable flags. 2001-04-25 18:27:55 +00:00
Ulrich Drepper
e8fcfc26e4 Include <float.h>. 2001-01-31 06:34:29 +00:00
Ulrich Drepper
fb0f005337 Linux/HPPA specific fenv definitions. 2000-10-15 03:37:33 +00:00
Ulrich Drepper
2db1ce26da Linux/HPPA specific fetestexcept implementation. 2000-10-15 03:36:28 +00:00
Ulrich Drepper
32b9e00b12 Linux/HPPA specific fesetexceptflag implementation. 2000-10-15 03:36:16 +00:00
Ulrich Drepper
84e1099f78 Linux/HPPA specific feraiseexcept implementation. 2000-10-15 03:36:03 +00:00
Ulrich Drepper
9bb9060790 Linux/HPPA specific fegetexceptflag implementation. 2000-10-15 03:35:48 +00:00
Ulrich Drepper
318eb46070 Linux/HPPA specific feupdateenv implementation. 2000-10-15 03:35:14 +00:00
Ulrich Drepper
8c34028d3e Linux/HPPA specific fesetround implementation. 2000-10-15 03:35:05 +00:00
Ulrich Drepper
1d53eb01ef Linux/HPPA specific fesetenv implementation. 2000-10-15 03:34:57 +00:00
Ulrich Drepper
1f8d3bd8e7 Linux/HPPA specific feholdexcept implementation. 2000-10-15 03:34:49 +00:00
Ulrich Drepper
0ea85d5c2f Linux/HPPA specific fegetround implementation. 2000-10-15 03:34:41 +00:00
Ulrich Drepper
1b2b6656a9 Linux/HPPA specific fegetexcept implementation. 2000-10-15 03:34:32 +00:00
Ulrich Drepper
839151ff97 Linux/HPPA specific fegetenv implementation. 2000-10-15 03:34:22 +00:00
Ulrich Drepper
8ebd5d830b Linux/HPPA specific fedisableexcept implementation. 2000-10-15 03:34:04 +00:00
Ulrich Drepper
e7cbd45172 Linux/HPPA specific feclearexcept implementation. 2000-10-15 03:33:51 +00:00