Commit Graph

26008 Commits

Author SHA1 Message Date
David S. Miller
da2d62df77 Update Sparc ULPs.
* sysdeps/sparc/fpu/libm-test-ulps: Update ULPs to handle minor
	difference between 32-bit and 64-bit.
2013-07-20 16:47:28 -07:00
Andreas Schwab
106bd84baa m68k: use _dl_static_init to set GLR0(dl_pagesize) 2013-07-21 00:43:54 +02:00
Chris Metcalf
19a601f7b2 tile: add missing semicolon in <bits/ptrace.h>
Change 521c6785e1 added the enum but missed the semicolon.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-07-19 13:06:30 -04:00
Dominik Vogt
075b9322c9 Clean up whitespace in lock elision patches.
Signed-off-by: Carlos O'Donell <carlos@redhat.com>
2013-07-19 02:35:04 -04:00
Dominik Vogt
d3d3ce982a Remove remains of rwlock elision which is not implemented yet.
Signed-off-by: Carlos O'Donell <carlos@redhat.com>

---

nptl/
2013-07-19  Dominik Vogt  <vogt@de.ibm.com>

	* sysdeps/unix/sysv/linux/x86/elision-conf.c:
	Remove __rwlock_rtm_enabled and __rwlock_rtm_read_retries.
	(elision_init): Don't set __rwlock_rtm_enabled.
	* sysdeps/unix/sysv/linux/x86/elision-conf.h:
	Remove __rwlock_rtm_enabled.
2013-07-19 02:23:28 -04:00
Carlos O'Donell
d7e06450b9 BZ #15711: Avoid circular dependency for syscall.h
The generated header is compiled with `-ffreestanding' to avoid any
circular dependencies against the installed implementation headers.
Such a dependency would require the implementation header to be
installed before the generated header could be built (See bug 15711).
In current practice the generated header dependencies do not include
any of the implementation headers removed by the use of `-ffreestanding'.

---

2013-07-15  Carlos O'Donell  <carlos@redhat.com>

	[BZ #15711]
	* sysdeps/unix/sysv/linux/Makefile ($(objpfx)bits/syscall%h):
	Avoid system header dependency with -ffreestanding.
	($(objpfx)bits/syscall%d): Likewise.
2013-07-16 17:55:43 -04:00
David S. Miller
f959cfd790 Annotate more cases of math bug 15319.
* math/libm-test.inc (casin_test_data): Annotate more cases of missing
	underflows from atanl/atan2l due to bug 15319.
	(casinh_test_data): Likewise.
2013-07-13 16:57:05 -07:00
Marcus Shawcroft
39f0b2e91a [AArch64] Adding -funwind-tables to backtrace.c 2013-07-12 11:22:32 +01:00
Marcus Shawcroft
8ab07407ba [AArch64] Use _dl_static_init to set GLR0(dl_pagesize) 2013-07-09 15:07:12 +01:00
David S. Miller
c61f8513f7 Full from-scratch rebuild of sparc ULPs.
* sysdeps/sparc/fpu/libm-test-ulps: Regenerate from scratch.
2013-07-07 22:15:36 -07:00
Chris Metcalf
95a4e1ea3b tile: use _dl_static_init to set GLRO(gl_pagesize)
A recently-added test (dlfcn/tststatic5) pointed out that tile was not
properly initializing the variable pagesize in certain cases.  This
change just copies the existing code from MIPS.
2013-07-07 11:33:25 -04:00
Chris Metcalf
b68c223125 tile: update libm-test-ulps from scratch 2013-07-07 11:33:24 -04:00
Chris Metcalf
36002f0786 tile: use soft-fp for fma() and fmaf()
The sfp-machine.h is based on the gcc version, but extended with
required new macros by comparison with other architectures and by
investigating the hardware support for FP on tile.
2013-07-07 11:33:24 -04:00
Jeroen Albers
72c90ed01f Update x86 and x86_64 ulps on AMD FX-8350 with GCC 4.8.1. 2013-07-05 12:58:20 +00:00
Marcus Shawcroft
bb3ced6f37 [AArch64] Regenerate libm-test-ulps 2013-07-05 09:30:52 +01:00
Siddhesh Poyarekar
52dfbe137e Fix lock elision help text in INSTALL and configure 2013-07-04 20:33:03 +05:30
Adhemerval Zanella
3f16954315 Update powerpc-fpu ULPs. 2013-07-04 07:14:44 -05:00
Andreas Jaeger
521c6785e1 Sync sys/ptrace with Linux 3.10 2013-07-04 09:49:14 +02:00
Joseph Myers
a0d93e9b26 Condition sysdeps/arm/include/bits/setjmp.h contents on _ISOMAC. 2013-07-03 21:59:58 +00:00
Joseph Myers
52667c6cad Regenerate powerpc-nofpu ULPs. 2013-07-03 16:32:52 +00:00
H.J. Lu
e2a32bee75 Add x86 init-arch to nptl 2013-07-03 09:22:31 -07:00
Allan McRae
d2cc15cb50 Update i386 ULPs.
* sysdeps/i386/fpu/libm-test-ulps: Update.
2013-07-03 12:45:40 +10:00
David S. Miller
3aaeeca7a9 Update sparc ULPs.
* sysdeps/sparc/fpu/libm-test-ulps: Update.
2013-07-02 16:41:17 -07:00
Andreas Schwab
6ed4c7891a m68k: update libm test ULPs 2013-07-03 00:50:37 +02:00
Markus Trippelsdorf
5314ed1afd Update x86_64 ULPs. 2013-07-02 22:01:13 +00:00
Joseph Myers
62e9e9f802 Regenerate MIPS ulps. 2013-07-02 21:53:23 +00:00
Joseph Myers
b4ac1f6acb Regenerate ARM ulps. 2013-07-02 20:34:19 +00:00
Joseph Myers
67338156ea Regenerate x86 and x86_64 ulps. 2013-07-02 20:01:15 +00:00
Joseph Myers
6bed143eb4 Make soft-float ARM use soft-fp fma/fmaf. 2013-07-02 19:51:19 +00:00
Richard Henderson
c87156e5e9 alpha: Update libm-test-ulps from scratch 2013-07-02 09:59:50 -07:00
Andi Kleen
a7cb9d67a5 Add lock elision to NEWS file 2013-07-02 08:49:30 -07:00
Andi Kleen
1717da59ae Add a configure option to enable lock elision and disable by default
Can be enabled with --enable-lock-elision=yes at configure time.
2013-07-02 08:46:55 -07:00
Andi Kleen
49186d21ef Disable elision for any pthread_mutexattr_settype call
PTHREAD_MUTEX_NORMAL requires deadlock for nesting, DEFAULT
does not. Since glibc uses the same value (0) disable elision
for any call to pthread_mutexattr_settype() with a 0 value.
This implies that a program can disable elision by doing
pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_NORMAL)

Based on a original proposal by Rich Felker.
2013-07-02 08:46:55 -07:00
Andi Kleen
e8c659d74e Add elision to pthread_mutex_{try,timed,un}lock
Add elision paths to the basic mutex locks.

The normal path has a check for RTM and upgrades the lock
to RTM when available. Trylocks cannot automatically upgrade,
so they check for elision every time.

We use a 4 byte value in the mutex to store the lock
elision adaptation state. This is separate from the adaptive
spin state and uses a separate field.

Condition variables currently do not support elision.

Recursive mutexes and condition variables may be supported at some point,
but are not in the current implementation. Also "trylock" will
not automatically enable elision unless some other lock call
has been already called on the lock.

This version does not use IFUNC, so it means every lock has one
additional check for elision. Benchmarking showed the overhead
to be negligible.
2013-07-02 08:46:55 -07:00
Andi Kleen
68cc29355f Add minimal test suite changes for elision enabled kernels
tst-mutex5 and 8 test some behaviour not required by POSIX,
that elision changes. This changes these tests to not check
this when elision is enabled at configure time.
2013-07-02 08:46:54 -07:00
Andi Kleen
b023e4ca99 Add new internal mutex type flags for elision.
Add Enable/disable flags used internally

Extend the mutex initializers to have the fields needed for
elision. The layout stays the same, and this is not visible
to programs.

These changes are not exposed outside pthread
2013-07-02 08:46:54 -07:00
Andi Kleen
1cdbe57948 Add the low level infrastructure for pthreads lock elision with TSX
Lock elision using TSX is a technique to optimize lock scaling
It allows to run locks in parallel using hardware support for
a transactional execution mode in 4th generation Intel Core CPUs.
See http://www.intel.com/software/tsx for more Information.

This patch implements a simple adaptive lock elision algorithm based
on RTM. It enables elision for the pthread mutexes and rwlocks.
The algorithm keeps track whether a mutex successfully elides or not,
and stops eliding for some time when it is not.

When the CPU supports RTM the elision path is automatically tried,
otherwise any elision is disabled.

The adaptation algorithm and its tuning is currently preliminary.

The code adds some checks to the lock fast paths. Micro-benchmarks
show little to no difference without RTM.

This patch implements the low level "lll_" code for lock elision.
Followon patches hook this into the pthread implementation

Changes with the RTM mutexes:
-----------------------------
Lock elision in pthreads is generally compatible with existing programs.
There are some obscure exceptions, which are expected to be uncommon.
See the manual for more details.

- A broken program that unlocks a free lock will crash.
  There are ways around this with some tradeoffs (more code in hot paths)
  I'm still undecided on what approach to take here; have to wait for testing reports.
- pthread_mutex_destroy of a lock mutex will not return EBUSY but 0.
- There's also a similar situation with trylock outside the mutex,
  "knowing" that the mutex must be held due to some other condition.
  In this case an assert failure cannot be recovered. This situation is
  usually an existing bug in the program.
- Same applies to the rwlocks. Some of the return values changes
  (for example there is no EDEADLK for an elided lock, unless it aborts.
   However when elided it will also never deadlock of course)
- Timing changes, so broken programs that make assumptions about specific timing
  may expose already existing latent problems.  Note that these broken programs will
  break in other situations too (loaded system, new faster hardware, compiler
  optimizations etc.)
- Programs with non recursive mutexes that take them recursively in a thread and
  which would always deadlock without elision may not always see a deadlock.
  The deadlock will only happen on an early or delayed abort (which typically
  happens at some point)
  This only happens for mutexes not explicitely set to PTHREAD_MUTEX_NORMAL
  or PTHREAD_MUTEX_ADAPTIVE_NP.  PTHREAD_MUTEX_NORMAL mutexes do not elide.

The elision default can be set at configure time.

This patch implements the basic infrastructure for elision.
2013-07-02 08:46:54 -07:00
H.J. Lu
1c81621c5b Enable static 32-bit SSE4.2 strcasecmp/strncasecmp 2013-07-02 08:06:04 -07:00
Joseph Myers
77f01ab5d1 Implement fma in soft-fp. 2013-07-02 14:55:32 +00:00
Will Newton
1413c693d3 ARM: Pass dl_hwcap to IFUNC resolver functions. 2013-07-02 13:01:21 +00:00
Joseph Myers
c53e2f0a56 Support no-FPU ColdFire in sysdeps/m68k/dl-trampoline.S and refactor code. 2013-06-30 21:36:59 +00:00
Chris Metcalf
8145005c31 tile: switch to using <fenv.h> fallback functions
Now that the fallback functions match the desired semantics for tile
functions, just switch to using them.
2013-06-30 11:50:43 -04:00
Joseph Myers
e7521973aa Add more NEWS items for 2.18. 2013-06-28 22:53:57 +00:00
Liubov Dmitrieva
6308fd9a46 Skip SSE4.2 versions on Intel Silvermont
SSE2/SSSE3 versions are faster than SSE4.2 versions on Intel Silvermont.
2013-06-28 15:31:40 -07:00
Ryan S. Arnold
89cd956937 PowerPC: Define AT_HWCAP2 bits and AT_HWCAP2 handling for POWER8. 2013-06-28 16:52:49 -05:00
Ryan S. Arnold
1ae8bfe07c Add GLRO(dl_hwcap2) for new AT_HWCAP2 auxv_t a_type. 2013-06-28 16:50:48 -05:00
Joseph Myers
8fbec01098 Consistently use page_shift in sysdeps/unix/sysv/linux/mmap64.c. 2013-06-28 21:45:11 +00:00
Pierre Ynard
0432680e8c Test for mprotect failure in dl-load.c (bug 12492). 2013-06-28 21:43:42 +00:00
Nathan Froyd
ce61a2ad2e Mark packed structure element used with atomic operation aligned. 2013-06-28 21:42:19 +00:00
Joseph Myers
ef65da39e6 Fix sysdeps/m68k/fpu_control.h preprocessor indentation. 2013-06-28 20:30:43 +00:00