6 Commits

Author	SHA1	Message	Date
Jeremy Hayes	78221d619e	Update CHANGES for release 11.12.0	2022-10-13 10:58:53 -06:00
Jeremy Hayes	6d5b40f051	Generate separate stores for partially swizzled memory stores ... Full vector and fully specified vector swizzle stores are not affected by this change, only partial swizzles ie swizzles with fewer components than the vector being stored to. Previously the vector being stored to loaded and any components not specified in the swizzle were used to create a full store to the vector. While this change generates more SPIR-V instructions, it is necessary for correctness. Fixes #2518.	2021-07-28 14:55:45 -06:00
Graeme Leese	182ab460d9	Update test expected files with new magic number ... Updating the SPIR-V generator version number changes the output of all the SPIR-V tests.	2020-06-22 11:49:38 +01:00
John Kessenich	3641ff7378	Bump code gen version, due to removal of OpEntryPoint operands.	2020-06-10 07:40:56 -06:00
John Kessenich	18d6b6b63e	Tests: Add more test results for the previous generator version bump.	2019-11-03 00:22:47 -06:00
John Kessenich	605afc7b1b	SPV: Add a switch for favoring non-NaN operands in min, max, and clamp.	2019-06-17 23:33:09 -06:00