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133 Commits

Author SHA1 Message Date
ulan@chromium.org
3a23c2f7df Make DwVfpRegister::AllocationIndexToString use VFPRegister::Name 
This also fixes a bug caused by a missing comma after "d13" in
the 'names' array in AllocationIndexToString.

BUG=none

Review URL: https://chromiumcodereview.appspot.com/12082044
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13548 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-01-30 09:55:49 +00:00
ulan@chromium.org
bed569b548 ARM: Make use of d16-d31 when available. 
Review URL: https://chromiumcodereview.appspot.com/11428137
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13484 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-01-23 16:29:48 +00:00
ulan@chromium.org
0606abbaab Rename RelocInfo::NONE to RelocInfo::NONE32. 
This CL only does renaming, nothing else.

Followup to:
https://chromiumcodereview.appspot.com/11695006/

There are now NONE and NONE64 RelocInfo types, but only ARM uses them
both at the same time. They were added in:
https://chromiumcodereview.appspot.com/11191029/

R= ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11744020
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13311 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-01-04 10:56:24 +00:00
ulan@chromium.org
a7f9c491dc Use VLDR instead of VMOVs from GPR when a 64-bit double can't be encoded as a VMOV immediate. 
This requires constant blinding before it can be enabled. There are other interesting optimizations that can be added later, detailed in a TODO.

BUG=optimization
R=ulan@chromium.org,mstarzinger@chromium.org, hwennborg@google.com

Review URL: https://chromiumcodereview.appspot.com/11191029
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13286 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-12-28 13:34:15 +00:00
danno@chromium.org
1f4b4625ff Re-land Crankshaft-generated KeyedLoad stubs. 
R=jkummerow@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11528003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13236 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-12-18 16:25:45 +00:00
danno@chromium.org
64fc1f99cb Revert 13157, 13145 and 13140: Crankshaft code stubs. 
R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/11498006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13179 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-12-10 11:09:12 +00:00
danno@chromium.org
f19959cd22 Enable stub generation using Hydrogen/Lithium (again) 
This initial implementation generates only KeyedLoadICs using the new Hydrogen stub infrastructure.

Committed: https://code.google.com/p/v8/source/detail?r=13105

Committed: https://code.google.com/p/v8/source/detail?r=13117

Review URL: https://codereview.chromium.org/10701054

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13140 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-12-05 11:04:10 +00:00
danno@chromium.org
66f6a8182c Revert 13117: "Enable stub generation using Hydrogen/Lithium (again)" 
TBR=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/11415261

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13120 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-12-03 17:16:51 +00:00
danno@chromium.org
78b09625d5 Enable stub generation using Hydrogen/Lithium (again) 
This initial implementation generates only KeyedLoadICs using the new Hydrogen stub infrastructure.

Committed: https://code.google.com/p/v8/source/detail?r=13105

Review URL: https://codereview.chromium.org/10701054

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13117 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-12-03 15:51:05 +00:00
danno@chromium.org
0a3bcc8c05 Revert 13105: "Enable stub generation using Hydrogen/Lithium." 
TBR=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/11414262

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13106 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-11-30 17:45:45 +00:00
danno@chromium.org
c115ff4e33 Enable stub generation using Hydrogen/Lithium. 
This initial implementation generates only KeyedLoadICs using the new Hydrogen stub infrastructure.

Review URL: https://codereview.chromium.org/10701054

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13105 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-11-30 17:31:30 +00:00
svenpanne@chromium.org
51f5a8e7c7 Moved buffer handling to AssemblerBase. 
This removed a lot of copy-n-paste code and is very handy for some upcoming
changes (regarding predictable code size).

Review URL: https://codereview.chromium.org/11416133

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13034 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-11-22 10:28:29 +00:00
ulan@chromium.org
74492ab2d4 Emit VMLA for multiply-add on ARM 
Review URL: https://chromiumcodereview.appspot.com/11293061
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12958 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-11-14 11:01:18 +00:00
svenpanne@chromium.org
237684fa45 Refactoring: Make emit_debug_code flag handling architecture-independent. 
Review URL: https://codereview.chromium.org/11312165

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12921 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-11-09 13:43:48 +00:00
svenpanne@chromium.org
a28bc2fd97 Refactoring: Make predictable code flag handling architecture-independent. 
Review URL: https://codereview.chromium.org/11359127

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12920 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-11-09 13:10:10 +00:00
ulan@chromium.org
d247c5e6c7 Change constant pool marker to be the unconditional, permanently undefined instruction. 
The previously-used instruction isn't guaranteed to always be undefined,
and the encoding used was conditional (failing the condition on an
undefined instruction is itself undefined and not guaranteed to
fault!). I would have like to use a more clever encoding (see bug 2963),
but we need the extra bits to encode the size of the constant pool.

BUG=security
R=ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11242002
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12791 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-10-22 15:25:17 +00:00
danno@chromium.org
ace5bf3f94 Fix ARM dissambler test problems with movw/movt. 
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/11198061

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12771 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-10-19 10:44:56 +00:00
danno@chromium.org
4431e0c54e Put more constants in movw/movt instructions 
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/11185052

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12759 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-10-18 14:37:04 +00:00
danno@chromium.org
43e248d2e5 Use movw/movt instead of constant pool on ARMv7. 
Some ARM architectures load 32-bit immediate constants more efficiently using movw/movt pairs rather than constant pool loads. This patch allows the assembler to generate one or the other load form at runtime depending on what is faster.

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/11037023

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12755 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-10-18 12:21:42 +00:00
ulan@chromium.org
a86e897924 Simulate and disasm NOP on ARM 
R=ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11116011
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12737 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-10-15 15:42:09 +00:00
ulan@chromium.org
86eedc26b5 Allow unaligned accesses for ARMv7. 
R=mstarzinger@chromium.org,jfb@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11087047

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12735 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-10-15 15:19:36 +00:00
ulan@chromium.org
ede725d2f7 Fix vstr.cc S, [mem] to emit vstr instead of vldr. 
BUG=emits wrong instruction
R=ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11118015
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12710 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-10-12 09:27:12 +00:00
danno@chromium.org
08747c3a16 Support for SDIV and MLS ARM instructions, and implement DoModI using them. 
Also added support for the runtime detection to check if hardware supports SDIV/UDIV
Other new opportunities to exploit SDIV/UDIV will be done in separate issues.

Review URL: https://chromiumcodereview.appspot.com/10977051
Patch from Subrato K De <subratokde@codeaurora.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12646 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-10-01 21:27:33 +00:00
danno@chromium.org
c467b2659f ARM: Small optimisation of VFP immediate creation 
Save an instruction in VFP immediate creation by passing a scratch register.

BUG=none
TEST=none

Review URL: https://chromiumcodereview.appspot.com/10990024
Patch from Martyn Capewell <m.m.capewell@googlemail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12605 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-09-25 14:32:07 +00:00
erik.corry@gmail.com
a9f5f3d6f5 Fix the full compiler on ARM to always generate the same code 
regardless of the detected CPU.  This is a requirement for the
debugger and the deoptimizer, which both expect that code from
the snapshot (compiled without VFP and ARM7) should have the
same layout as code compiled later.

This is another change to make snapshots more robust with
arbitrary code.
Review URL: https://chromiumcodereview.appspot.com/10824235

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12287 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-08-10 12:24:06 +00:00
svenpanne@chromium.org
b5da7279b1 Introduced TypeFeedbackId and BailoutId types. 
This is a refactoring-only CL which improves the typing of IDs associated with
AST nodes. The interesting parts are in utils.h and ast.h, the rest of the CL
basically follows mechanically.

Review URL: https://chromiumcodereview.appspot.com/10831172

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12263 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-08-06 14:13:09 +00:00
yangguo@chromium.org
59f212e7eb Relax requirement from VFP3 to VFP2 where possible. 
BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com/10818026

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12194 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-07-25 15:26:16 +00:00
yangguo@chromium.org
a1f0c5b16e Add assertions to limit register count for VSTM and VLDM. 
R=svenpanne@chromium.org
BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com/10807066

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12166 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-07-23 08:38:53 +00:00
danno@chromium.org
5b2a27aad4 Fix compile errors in Visual C++ 2008. 
R=danno@chromium.org
BUG=None
TEST=ARM compiles on VC 2008.

Review URL: https://chromiumcodereview.appspot.com/10690111
Patch from Sigurður Ásgeirsson <siggi@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12039 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-07-11 10:08:56 +00:00
yangguo@chromium.org
fb81da2e5f ARM: Fix literal pool handling for breakpoints in debugger. 
BUG=2177
TEST=none

Review URL: https://chromiumcodereview.appspot.com/10449047
Patch from Martyn Capewell <m.m.capewell@googlemail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11812 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-06-14 11:16:47 +00:00
sanjoy@chromium.org
d67e1d4fe9 AssemblerBase does not need remember a Zone. Fix this. 
BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com/10546095

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11765 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-06-11 16:47:08 +00:00
sanjoy@chromium.org
6125718f37 Remove TLS access for current Zone. 
By passing around a Zone object explicitly we no longer need to do a
TLS access at the sites that allocate memory from the current Zone.

BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com/10534006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11761 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-06-11 12:42:31 +00:00
jkummerow@chromium.org
390f0e6d05 Port count-based profiler to ARM 
Review URL: https://chromiumcodereview.appspot.com/9837004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11120 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-03-23 12:16:40 +00:00
erik.corry@gmail.com
bc1eb293cd Enable snapshots on MIPS. This is based on 
http://codereview.chromium.org/9372063 by Daniel Kalmar.
Review URL: https://chromiumcodereview.appspot.com/9722020

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11107 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-03-21 14:29:14 +00:00
fschneider@chromium.org
1f7d42efc9 Landing for pliard@chromium.org: Remove static initializers in v8. 
This change includes two CLs by pliard@chromium.org:

1. http://codereview.chromium.org/9447052/ (Add CallOnce() and simple LazyInstance implementation):

Note that this implementation of LazyInstance does not handle global destructors (i.e. the lazy instances are never deleted).

This CL was initially reviewed on codereview.appspot.com:
http://codereview.appspot.com/5687064/



2.  http://codereview.chromium.org/9455088/ (Remove static initializers in v8):
This CL depends on CL 9447052 (adding CallOnce and LazyInstance).
It is based on a patch sent by Digit.

With this patch applied, we have only one static initializer left (in atomicops_internals_x86_gcc.cc). This static initializer populates a structure used by x86 atomic operations. It seems that we can hardly remove it. If possible, it will be removed in a next CL. 

This CL also modifies the presubmit script to check the number of static initializers.


BUG=v8:1859
Review URL: https://chromiumcodereview.appspot.com/9666052

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11010 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-03-12 13:56:56 +00:00
yangguo@chromium.org
1d679f9c37 Fixed VFP detection through compiler defines. 
BUG=http://code.google.com/p/v8/issues/detail?id=1996
TEST=none

Review URL: https://chromiumcodereview.appspot.com/9669003
Patch from Rodolph Perfetta <rodolph.perfetta@gmail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10993 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-03-09 22:11:16 +00:00
erik.corry@gmail.com
b3e0761e38 Cosmetic changes ("set up" is a verb, "setup" is a noun). 
Review URL: http://codereview.chromium.org/9139051

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10399 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-01-13 13:09:52 +00:00
vegorov@chromium.org
ac36cb4504 Merge experimental/gc branch to the bleeding_edge. 
Review URL: http://codereview.chromium.org/7945009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9328 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-09-19 18:36:47 +00:00
svenpanne@chromium.org
4084e698c3 Fixed a bug in the chaining of fixup position 
The ARM and MIPS assemblers had a bug where they did not handle the last element
in the list of code positions correctly during the fixup of offsets for forward
jumps. This happened when the first instruction contained a forward jump to a
label, and that label was used in a forward jump later, too.

Unified the code for Assembler::next on ARM and MIPS while we were there.

Added test cases, even for ia32/x64, which seem to be correct, even I don't
fully understand why... %-}

BUG=v8:1644
Review URL: http://codereview.chromium.org/7786001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9063 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-08-30 07:36:31 +00:00
svenpanne@chromium.org
55336b37bd Fixed confusion between AST IDs and condition codes on ARM. 
C++'s 'great' idea of implicitly converting an enum to an integral value hit us
again, this time resulting in silly (but currently non-harmful) entries in the
relocation table. Encapsulated the AST ID recording a bit, which helped a lot to
find the culprit.
Review URL: http://codereview.chromium.org/7400016

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8671 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-07-18 10:44:13 +00:00
sgjesse@chromium.org
5efb84623b ARM: Clean up literal pool generation. 
Remove dead code, and generate pools less frequently.

BUG=none
TEST=none

Review URL: http://codereview.chromium.org//7108061
Patch from Martyn Capewell <m.m.capewell@googlemail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8309 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-06-16 07:00:46 +00:00
fschneider@chromium.org
6db15ae34b Remove peephole optimiziations from IA32 and ARM assembler. 
They are not used with Crankshaft anymore.
Review URL: http://codereview.chromium.org/7003025

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7854 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-05-11 11:29:53 +00:00
sgjesse@chromium.org
01707c7106 ARM: Changed the handling of compiletime CPU feature detection 
Always use CpuFeaturesImpliedByCompiler() when selecting CPU features. This checks both for CAN_USE_ARMV7_INSTRUCTIONS and CAN_USE_VFP_INSTRUCTIONS and for GCC preprocessor symbols. This will support using the CAN_USE_XXX for a simulator build used for generating a snapshot followed by a crosscompile using -march= and -mfpu= for selecting the (minimal) target device CPU features. The snapshot will use instructions based on the CAN_USE_XXX whereas the target will at least use features based on both CAN_USE_XXX and -march= and -mfpu=, but will try runtime CPU feature detection a well looking for somethis better.

Remove the compiler based CPU feature detection from the OS::CpuFeaturesImpliedByPlatform() as it did not belong there. Also was already in the CpuFeaturesImpliedByCompiler().

Add the variable 'v8_can_use_vfp_instructions' to the GYP file which can be used to turn on CAN_USE_VFP_INSTRUCTIONS when building V8. I did not add any -mfpu= cflags for this, as there are several options here (e.g. vfp and neon).

R=erik.corry@gmail.com, karlklose@chromium.org

BUG=none
TEST=none

Review URL: http://codereview.chromium.org//6904164

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7754 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-05-03 06:51:59 +00:00
whesse@chromium.org
d96dc0755b Add AST ID to RelocInfo for type-recording ICs. Changes 7644 and 7632, combined. 
BUG=
TEST=

Review URL: http://codereview.chromium.org/6902066

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7694 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-04-27 15:02:59 +00:00
ricow@chromium.org
69a4c52bbf Revert revisions 7644 and 7632, they are causing assertion failures in interactive_ui_tests debug mode. 
Review URL: http://codereview.chromium.org/6873076

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7664 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-04-19 16:04:49 +00:00
whesse@chromium.org
46164ee24e Record AST ids in relocation info at spots where we collect dynamic type feedback. 
Review URL: http://codereview.chromium.org/6793016

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7632 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-04-15 13:18:53 +00:00
sgjesse@chromium.org
af7804f3b7 ARM: Always enable ARMv7 when VFPv3 is enabled. 
R=vegorov@chromium.org, rodolph.perfetta@gmail.com

BUG=v8:1317
TEST=

Review URL: http://codereview.chromium.org//6825037

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7580 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-04-12 06:12:45 +00:00
sgjesse@chromium.org
75759805a9 ARM: Remove support for ABI prior to EABI 
The support for the old ABI is known to be broken and has been deprecated for some time now. Removed the instructions for loading and storing co-processor registers as they where only used to support the old ABI.

R=karlklose@chromium.org

BUG=v8:1316
TEST=

Review URL: http://codereview.chromium.org//6822025

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7565 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-04-11 09:04:30 +00:00
sgjesse@chromium.org
6255476028 ARM: Add support load/store multiple VFP registers 
Enter/exit frames with save doubles use these instructions instead of generating 16 load/store instructions.

R=karlklose@chromium.org, rodolph.perfetta@gmail.com

BUG=
TEST=

Review URL: http://codereview.chromium.org//6691057

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7509 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-04-06 09:06:23 +00:00
vitalyr@chromium.org
179aef2b8f VM initialization refactoring. 
This patch introduces global once per-process initialization and moves
the OS and CPU setup there. This makes CPU features isolate-independent.

Review URL: http://codereview.chromium.org/6670119

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7462 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-31 16:17:37 +00:00