Commit Graph

35 Commits

Author SHA1 Message Date
clemensh
6cf8f54d90 [wasm] Fix interpreter entry for i64 return type
Fix two issues in the interpreter entry for 64 bit return values on
32 bit platforms. First, the effect chain was slightly incorrect, second
the order of the returned values was wrong.

Also add a test case for this.
Tested on x64, ia32 and s390.

Plus drive-by fix in Int64Lowering to reuse global constants for
big-endian/little-endian disambiguation.

R=titzer@chromium.org
BUG=v8:5822

Review-Url: https://codereview.chromium.org/2731713002
Cr-Commit-Position: refs/heads/master@{#43654}
2017-03-07 18:03:08 +00:00
Marja Hölttä
2d9b9faf17 [iwyu, wasm] Remove unallowed includes to objects-inl.h from wasm.
R=mstarzinger@chromium.org
BUG=v8:5294

Change-Id: If2cdb4d38829e69ddd8aecb99c99c3a03050f57c
Reviewed-on: https://chromium-review.googlesource.com/441824
Commit-Queue: Marja Hölttä <marja@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Cr-Commit-Position: refs/heads/master@{#43158}
2017-02-13 15:05:37 +00:00
ahaas
dd51dd926e [wasm] Change the default lowering of stores.
The int64-lowering only lowered store instructions with a word64 store
representation. For all other stores the default lowering applied. The
default lowering replaces all input nodes with both their replacement
nodes, which can change the number of input nodes of the lowered node.

In WebAssembly there exist stores which take an I64 input and store it
with a different representation, e.g. I32. In TurboFan this translates
to a store node with word32 store representation and a word64 value
input. The default lowering replaces the word64 value input to become
two word32 value inputs, which makes the number of inputs of the store
node invalid. This CL discards the high word replacement of the value
input so that the number of input nodes of a store node does not change
in the default lowering.

R=titzer@chromium.org
CC=rossberg@chromium.org

BUG=

Review-Url: https://codereview.chromium.org/2668023004
Cr-Commit-Position: refs/heads/master@{#42860}
2017-02-01 16:27:12 +00:00
clemensh
7a3366fbcd [compiler] Allow for StackSlots of arbitrary size
This will be used to pass parameters of wasm functions to the wasm
interpreter. All of them need to be packed into one buffer, which is
then passed to the interpreter.

R=ahaas@chromium.org, titzer@chromium.org
BUG=v8:5822

Review-Url: https://codereview.chromium.org/2624183002
Cr-Commit-Position: refs/heads/master@{#42239}
2017-01-11 16:10:51 +00:00
ahaas
020e2c8d26 [wasm] Break a cycle with a loop node in the int64-lowering.
The control edges in a TurboFan graph can form a cycle. To break this cycle in the int64-lowering we add special handling for loop nodes. Similar handling already exists for phi nodes and effectphi nodes, which breaks cycles formed by value edges and effect edges, respectively.

Review-Url: https://codereview.chromium.org/2511503002
Cr-Commit-Position: refs/heads/master@{#41071}
2016-11-17 11:51:32 +00:00
danno
fe552636be [turbofan] Support variable size argument removal in TF-generated functions
This is preparation for using TF to create builtins that handle variable number of
arguments and have to remove these arguments dynamically from the stack upon
return.

The gist of the changes:
- Added a second argument to the Return node which specifies the number of stack
  slots to pop upon return in addition to those specified by the Linkage of the
  compiled function.
- Removed Tail -> Non-Tail fallback in the instruction selector. Since TF now should
  handles all tail-call cases except where the return value type differs, this fallback
  was not really useful and in fact caused unexpected behavior with variable
  sized argument popping, since it wasn't possible to materialize a Return node
  with the right pop count from the TailCall without additional context.
- Modified existing Return generation to pass a constant zero as the additional
  pop argument since the variable pop functionality

LOG=N

Review-Url: https://codereview.chromium.org/2446543002
Cr-Commit-Position: refs/heads/master@{#40699}
2016-11-02 13:15:57 +00:00
machenbach
c61902e072 Revert of [turbofan] Support variable size argument popping in TF-generated functions (patchset #13 id:240001 of https://codereview.chromium.org/2446543002/ )
Reason for revert:
Seems to break arm64 sim debug and blocks roll:
https://build.chromium.org/p/client.v8.ports/builders/V8%20Linux%20-%20arm64%20-%20sim%20-%20debug/builds/3294

Original issue's description:
> [turbofan] Support variable size argument removal in TF-generated functions
>
> This is preparation for using TF to create builtins that handle variable number of
> arguments and have to remove these arguments dynamically from the stack upon
> return.
>
> The gist of the changes:
> - Added a second argument to the Return node which specifies the number of stack
>   slots to pop upon return in addition to those specified by the Linkage of the
>   compiled function.
> - Removed Tail -> Non-Tail fallback in the instruction selector. Since TF now should
>   handles all tail-call cases except where the return value type differs, this fallback
>   was not really useful and in fact caused unexpected behavior with variable
>   sized argument popping, since it wasn't possible to materialize a Return node
>   with the right pop count from the TailCall without additional context.
> - Modified existing Return generation to pass a constant zero as the additional
>   pop argument since the variable pop functionality
>
> LOG=N

TBR=bmeurer@chromium.org,mstarzinger@chromium.org,epertoso@chromium.org,danno@chromium.org
# Not skipping CQ checks because original CL landed more than 1 days ago.
NOPRESUBMIT=true

Review-Url: https://codereview.chromium.org/2473643002
Cr-Commit-Position: refs/heads/master@{#40691}
2016-11-02 07:49:17 +00:00
danno
5319b50c85 [turbofan] Support variable size argument removal in TF-generated functions
This is preparation for using TF to create builtins that handle variable number of
arguments and have to remove these arguments dynamically from the stack upon
return.

The gist of the changes:
- Added a second argument to the Return node which specifies the number of stack
  slots to pop upon return in addition to those specified by the Linkage of the
  compiled function.
- Removed Tail -> Non-Tail fallback in the instruction selector. Since TF now should
  handles all tail-call cases except where the return value type differs, this fallback
  was not really useful and in fact caused unexpected behavior with variable
  sized argument popping, since it wasn't possible to materialize a Return node
  with the right pop count from the TailCall without additional context.
- Modified existing Return generation to pass a constant zero as the additional
  pop argument since the variable pop functionality

LOG=N

Review-Url: https://codereview.chromium.org/2446543002
Cr-Commit-Position: refs/heads/master@{#40678}
2016-10-31 16:54:24 +00:00
ahaas
34fa66c08c [wasm] Break effect cycles in the Int64Lowering.
EffectPhis can cause a cycle in a TurboFan graph. We delay the
processing of EffectPhis in the Int64Lowering to break these cycles. We
do the same already for Phis.

R=titzer@chromium.org
BUG=v8:5518
TEST=unittests/Int64LoweringTest.EffectPhiLoop

Review-Url: https://codereview.chromium.org/2428583002
Cr-Commit-Position: refs/heads/master@{#40378}
2016-10-18 06:31:22 +00:00
jyan
77c9cb8341 [compiler] [wasm] Introduce Word32/64ReverseBytes as TF Optional Opcode
This commit fixes wasm little-endian load issue on big-endian platform
by introducing reverse byte operation immediately after a load.

R=bmeurer@chromium.org, titzer@chromium.org
BUG=

Review-Url: https://codereview.chromium.org/2045943002
Cr-Commit-Position: refs/heads/master@{#38183}
2016-07-29 19:33:28 +00:00
ivica.bogosavljevic
580fdf3c05 Implement UnaligedLoad and UnaligedStore turbofan operators.
Implement UnalignedLoad and UnalignedStore optional
turbofan operators and use them in WasmCompiler for unaligned
memory access.

BUG=

Review-Url: https://codereview.chromium.org/2122853002
Cr-Commit-Position: refs/heads/master@{#37988}
2016-07-22 20:56:24 +00:00
titzer
fa69cbb86b [turbofan] Allow OptionalOperator to return a placeholder.
R=bmeurer@chromium.org, ahaas@chromium.org
BUG=

Review-Url: https://codereview.chromium.org/2112733003
Cr-Commit-Position: refs/heads/master@{#37445}
2016-06-30 14:18:35 +00:00
ivica.bogosavljevic
42ac51c82e Fix int64 lowering on big-endian architectures.
Lowering of Int64Load, Int64Store, BitcastInt64ToFloat64 and
BitcastFloat64ToInt64 was using LE word ordering in memory,
causing failures on some tests.

BUG=mjsunit/regress/regress-599719,mjsunit/regress/regress-599717

Review-Url: https://codereview.chromium.org/2080213004
Cr-Commit-Position: refs/heads/master@{#37213}
2016-06-23 11:41:07 +00:00
ahaas
b6db2255e6 [wasm] Mark all 64-bit instructions as supported on 32-bit platforms.
Additionally I removed some stale comments.

R=titzer@chromium.org

Review-Url: https://codereview.chromium.org/1941323002
Cr-Commit-Position: refs/heads/master@{#35976}
2016-05-03 11:47:59 +00:00
ahaas
bd4fb28ecd [wasm] Int64Lowering of Word64Ror and Word64Rol.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1843123002

Cr-Commit-Position: refs/heads/master@{#35173}
2016-03-31 17:05:43 +00:00
ahaas
40bdbef975 [wasm] Int64Lowering of Int64Mul on ia32 and arm.
Int64Mul is lowered to a new turbofan operator, Int32MulPair. The new
operator takes 4 inputs an generates 2 outputs. The inputs are the low
word of the left input, high word of the left input, the low word of the
right input, and high word of the right input. The ouputs are the low
and high word of the result of the multiplication.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1807273002

Cr-Commit-Position: refs/heads/master@{#35131}
2016-03-30 10:40:06 +00:00
ahaas
682df6dd33 [wasm] New attempt to implement the Int64Lowering of phis.
The new implementation deals with cycles in the TF graph in two steps:
1) The lowering of phis is delayed to avoid cyclic dependencies.
2) The replacement nodes of phis are created already when the phi is
   pushed onto the stack so that other nodes can use these replacements
   for their lowering.

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1844553002

Cr-Commit-Position: refs/heads/master@{#35126}
2016-03-30 08:14:35 +00:00
ahaas
7f19628a5b [wasm] Int64Lowering of Word64Ctz.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1806593003

Cr-Commit-Position: refs/heads/master@{#34811}
2016-03-16 12:16:00 +00:00
ahaas
5c16cac96d [wasm] Int64Lowering of Word64Clz.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1810473002

Cr-Commit-Position: refs/heads/master@{#34809}
2016-03-16 11:03:07 +00:00
ahaas
33c08596e1 [wasm] Int64Lowering of Int64Sub on ia32 and arm.
Int64Sub is lowered to a new turbofan operator, Int32SubPair. The new
operator takes 4 inputs an generates 2 outputs. The inputs are the low
word of the left input, high word of the left input, the low word of the
right input, and high word of the right input. The ouputs are the low
and high word of the result of the subtraction.

The implementation is very similar to the implementation of Int64Add.

@v8-arm-ports: please take a careful look at the implementation of sbc
in the simulator.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1778893005

Cr-Commit-Position: refs/heads/master@{#34808}
2016-03-16 10:58:05 +00:00
ahaas
ccbf004293 [wasm] Int64Lowering of F64ReinterpretI64.
The implementation is done by storing to and then loading from memory.

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1801013002

Cr-Commit-Position: refs/heads/master@{#34785}
2016-03-15 12:46:51 +00:00
ahaas
b484cc12f3 [wasm] Int64Lowering of I64ReinterpretF64.
The implementation is done by storing to and loading from memory.

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1804953002

Cr-Commit-Position: refs/heads/master@{#34784}
2016-03-15 12:18:12 +00:00
ahaas
2e6f3e8607 [wasm] Int64Lowering of Word64Popcnt.
Word64Popcnt is lowered to Word32Popcnt(low-word) + Word32Popcnt(high_word).
Since the optional Word64Popcnt operator does not exist on 32 bit platforms,
I introduced a new operator "Word64PopcntPlaceholder" which is generated
in the WasmCompiler and then lowered in the Int64Lowering.

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1803453003

Cr-Commit-Position: refs/heads/master@{#34777}
2016-03-15 10:42:08 +00:00
ahaas
c4c34eba30 [wasm] Int64Lowering: changing to DFS.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1798993002

Cr-Commit-Position: refs/heads/master@{#34767}
2016-03-15 06:27:00 +00:00
ahaas
1b23079936 [wasm] Int64Lowering of Int64Add on ia32 and arm.
Int64Add is lowered to a new turbofan operator, Int32AddPair. The new
operator takes 4 inputs an generates 2 outputs. The inputs are the low
word of the left input, high word of the left input, the low word of the
right input, and high word of the right input. The ouputs are the low
and high word of the result of the addition.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1778493004

Cr-Commit-Position: refs/heads/master@{#34747}
2016-03-14 15:34:19 +00:00
ahaas
240b7db9c7 [wasm] Int64Lowering of I64ShrU and I64ShrS on ia32.
I implemented I64ShrU and I64ShrS the same as I64Shl in https://codereview.chromium.org/1756863002

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1768233002

Cr-Commit-Position: refs/heads/master@{#34630}
2016-03-09 16:38:43 +00:00
ahaas
d7ddd35c29 [wasm] Int64Lowering of I64XConvertI32.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1776613002

Cr-Commit-Position: refs/heads/master@{#34629}
2016-03-09 16:21:08 +00:00
ahaas
7634d1aac1 [wasm] Some cleanup in the Int64Lowering.
I removed some stale comments and added a missing unit test.

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1772843003

Cr-Commit-Position: refs/heads/master@{#34586}
2016-03-08 14:12:40 +00:00
ahaas
4122df2615 [wasm] Use MachineOperatorBuilder::word() instead of kPointerSize to determine the word size.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1770333002

Cr-Commit-Position: refs/heads/master@{#34581}
2016-03-08 12:42:38 +00:00
ahaas
ddc626e1cf [wasm] Int64Lowering of I64Shl on ia32.
I64Shl is lowered to a new turbofan operator, WasmWord64Shl. The new
operator takes 3 inputs, the low-word input, the high-word input, and
the shift, and produces 2 output, the low-word output and the high-word
output.

At the moment I implemented the lowering only for ia32, but I think the
CL is already big enough. I will add the other platforms in separate
CLs.

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1756863002

Cr-Commit-Position: refs/heads/master@{#34546}
2016-03-07 15:19:44 +00:00
ahaas
fab253109d [wasm] I added comparison operators to the Int64Lowering.
Comparison operators are lowered using to a lexicographic ordering, e.g.
(a,b) <= (c,d) <<>> (a < c) | (a == c) & (b <= d).

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1729263002

Cr-Commit-Position: refs/heads/master@{#34287}
2016-02-25 12:15:54 +00:00
ahaas
18d9da0dcf [wasm] I added I64Eq to the Int64Lowering.
(a EQ b) is lowered to ((low(a) XOR low(b)) OR (high(a) XOR high(b))) EQ 0

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1729493002

Cr-Commit-Position: refs/heads/master@{#34249}
2016-02-24 12:09:34 +00:00
ahaas
a8d5d17659 [wasm] Added I64Xor to the Int64Lowering.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1723613002

Cr-Commit-Position: refs/heads/master@{#34241}
2016-02-24 09:52:52 +00:00
ahaas
cadc1e7780 [wasm] Added I64Ior to the Int64Lowering.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1716243002

Cr-Commit-Position: refs/heads/master@{#34219}
2016-02-23 16:30:42 +00:00
ahaas
4ddf252e85 [wasm] Unittest for Int64Lowering.
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1714793003

Cr-Commit-Position: refs/heads/master@{#34213}
2016-02-23 15:33:13 +00:00