lrn@chromium.org
7410865adb
X64: Make all arithmetic ops, and a few other, try to avoid rsp and r12 as base register.
...
Using rsp or r12 as the "base" register of the ModR/M byte forces a SIB byte,
even with no index register. Some operations can avoid this by using another,
equivalent, encoding that swaps the meaning of the base and register parts.
Review URL: http://codereview.chromium.org/2075010
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4678 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-19 08:16:52 +00:00
lrn@chromium.org
44fb6cc8d3
X64: Made bit-fiddling fallback for double-to-int32 conversion.
...
Review URL: http://codereview.chromium.org/2048007
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4648 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-12 11:16:35 +00:00
lrn@chromium.org
9f859fef26
Make X64 double-to-int32 conversion use the 64-bit version of cvttsd2si.
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Use type info to allow ia32 to use the 32-bit versions in some cases.
Remove sse3-specific code from X64 GenericBinaryOpStub.
Review URL: http://codereview.chromium.org/1992011
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4632 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-10 11:38:58 +00:00
lrn@chromium.org
1790c3534a
X64: Port inline transcendental cache to X64.
...
Review URL: http://codereview.chromium.org/1860001
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4567 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-03 10:43:49 +00:00
ager@chromium.org
62e8d5a789
Port inline version of Math.sqrt and Math.pow from ia32 to x64.
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Review URL: http://codereview.chromium.org/1774010
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4541 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-28 14:43:51 +00:00
whesse@chromium.org
a8e817161a
Optimize the assembly code generated for Math.random()
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Review URL: http://codereview.chromium.org/1631008
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4384 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-04-12 10:07:50 +00:00
ager@chromium.org
a8a7a74bb3
Fix presubmit errors.
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I will lint my code, I will lint my code, I will lint my code. :)
TBR=sgjesse@chromium.org
Review URL: http://codereview.chromium.org/1115007
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4193 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-19 12:53:55 +00:00
ager@chromium.org
1bf60267e7
Port number-dictionary probing in generated code to x64.
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BUG=640
Review URL: http://codereview.chromium.org/1113001
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4192 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-03-19 12:26:45 +00:00
whesse@chromium.org
df9544d598
Declare register names as constants in assembler-x64.h. Fix for issue 615.
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Review URL: http://codereview.chromium.org/650136
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3924 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-02-22 11:41:52 +00:00
sgjesse@chromium.org
f937e7daa5
Fix array allocation in generated code on x64
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The porting of array allocation in generated code from ia32 to x64 wrongly assumed that a smi contained the actual number times 2. Removed the constant times_half_pointer_size, as it will probably not be needed.
Review URL: http://codereview.chromium.org/596084
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3845 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-02-12 13:49:57 +00:00
lrn@chromium.org
96127b68e5
Ported ia32 optimization of revision 3487 to x64.
...
Review URL: http://codereview.chromium.org/597005
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3821 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-02-09 13:10:32 +00:00
sgjesse@chromium.org
9b4312fd76
Fixed random style violations.
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Review URL: http://codereview.chromium.org/574009
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3801 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-02-04 21:32:02 +00:00
sgjesse@chromium.org
0528427a1b
Change to src/x64/assembler-x64.h missing from r3740
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TBR=lrn@chromium.org
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3741 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-01-29 10:56:26 +00:00
ager@chromium.org
68f537d2b1
Port code to load an integer directly from a heap number from ia32 to x64.
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For now, this is a direct port from ia32, so there is probably still
stuff that can be improved here.
Review URL: http://codereview.chromium.org/555131
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3717 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-01-27 13:34:29 +00:00
lrn@chromium.org
76774115c0
Ported SubStringStub to X64.
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Review URL: http://codereview.chromium.org/555049
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3683 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-01-25 08:55:08 +00:00
lrn@chromium.org
55177a2644
X64 implementation of native ascii string compare.
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Review URL: http://codereview.chromium.org/545108
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3627 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-01-18 11:22:03 +00:00
lrn@chromium.org
eee6c6405e
RegExp bitmap test for word character.
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Review URL: http://codereview.chromium.org/547024
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3626 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-01-18 09:49:50 +00:00
fschneider@chromium.org
5debbc3693
Move CPU-specific constants from debug.h into the platform-specific directories.
...
The constant for the return sequence length (JSReturnSequenceLength) was
defined in debug.h. Since this constant are also needed outside the debugger code
I moved them into assembler-xxx.h. Otherwise compiling with debuggersupport=off
would fail on ARM.
BUG=http://code.google.com/p/v8/issues/detail?id=533
Review URL: http://codereview.chromium.org/456001
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3383 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-30 15:09:49 +00:00
sgjesse@chromium.org
459e4c6b0c
Changes to Intel shift functions
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Change name of shifts picking the shift count from cl to sal_cl, shl_cl and shr_cl.
Add special encoding of shift by one for shr which was missing it.
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3314 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-17 08:35:43 +00:00
erik.corry@gmail.com
df4f52347b
Allow a platform to indicate that some CPU features are always
...
available. We use this to ensure that snapshots on MacOSX can
use SSE2 instructions. Also clean up and assertify the
handling of things we can't do when we are generating a
snapshot. Fix a bug in the new serialization tests where
they activated Snapshot::enable() too late after code had been
generated that assumed no snapshots.
Review URL: http://codereview.chromium.org/391051
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3301 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-13 12:32:57 +00:00
lrn@chromium.org
d53f05e3e2
Fix warnings on Win64.
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Set warning level to /W3 and change implicit conversions from size_t
to int. Most "fixes" are simply manifesting the implicit casts or using
a special strlen replacement that returns int.
Review URL: http://codereview.chromium.org/390004
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3273 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-11-11 09:50:06 +00:00
erik.corry@gmail.com
dbd7f20d2d
Introduce a switch for the new snapshot code and switch
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it on by default. Includes bug fixes for new snapshots.
Review URL: http://codereview.chromium.org/342054
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3184 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-30 10:23:12 +00:00
erik.corry@gmail.com
97de363ef5
* Fix new snapshot code on ARM.
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Review URL: http://codereview.chromium.org/344011
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3161 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-28 12:37:54 +00:00
erik.corry@gmail.com
fb2317b63b
New snapshot framework. Doesn't work on ARM yet (code targets
...
are different). Is able to deserialize the whole heap and run
some stuff. Not available as the primary snapshot system yet.
Review URL: http://codereview.chromium.org/335009
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3142 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-27 11:54:01 +00:00
fschneider@chromium.org
dcee14979f
Generate more compact XOR on 64-bit architecture when using xor to zero out registers.
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When using xor to zero a 64-bit register, generate 32-bit instruction instead.
(according to Intel 64-bit mode coding guidelines)
previous code for zeroing RAX:
xor rax, rax
==>
new code for zeroing RAX:
xor eax, eax
The 32-bit operand form has the same semantics: It also zeroes the upper
32-bit of rax and its encoding uses 1 byte less.
Review URL: http://codereview.chromium.org/330018
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3132 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-26 14:38:22 +00:00
lrn@chromium.org
6f1d641fb6
X64/Win64: Alternative implementation of fmod in general.
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Review URL: http://codereview.chromium.org/303034
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3116 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-23 09:18:19 +00:00
kbr@chromium.org
d5f00cf6cc
Add optimized ICs for new CanvasArray types introduced in WebGL
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specification under development. This is a follow-on CL to
http://codereview.chromium.org/293023 .
Based on review feedback, defined the behavior of storing NaN and
+/-Infinity into external arrays of integer types as storing 0. Added
test cases. Added fucomi instruction to assembler. Fixed bug in
KeyedLoadIC::GenerateExternalArray when allocation of HeapNumber
failed. Fixed bug in encoding of 16-bit immediate arithmetic
instructions in 64-bit port.
Removed raising of exceptions for negative array indices passed to
external arrays and associated tests. Based on current discussion in
WebGL working group, will probably end up removing the exception
throwing altogether.
Review URL: http://codereview.chromium.org/294022
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3113 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-22 14:49:00 +00:00
whesse@chromium.org
2a63594602
Commit fucomip change 197037 http://codereview.chromium.org/197037/show
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git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3100 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-21 09:24:25 +00:00
kbr@chromium.org
46e6297e3e
Added infrastructure for optimizing new CanvasArray types in WebGL
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specification under development. The optimizations are patterned after
those previously done for CanvasPixelArray. This CL adds all of the
necessary framework but continues to use the generic KeyedLoadIC and
KeyedStoreIC code, to create a baseline for benchmarking purposes. The
next CL will add the optimized ICs to ic-ia32.cc and ic-x64.cc.
These new CanvasArray types have different semantics than
CanvasPixelArray; out-of-range values are clamped via C cast
semantics, which is cheaper than the clamping behavior specified by
CanvasPixelArray. Out-of-range indices raise exceptions instead of
being silently ignored.
As part of this work, pulled FloatingPointHelper::AllocateHeapNumber
up to MacroAssembler on ia32 and x64 platforms. Slightly refactored
KeyedLoadIC and KeyedStoreIC. Fixed encoding for fistp_d on x64 and
added a few more instructions that are needed for the new ICs. The
test cases in test-api.cc have been verified by hand to exercise all
of the generated code paths in the forthcoming specialized ICs.
Review URL: http://codereview.chromium.org/293023
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3096 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-20 15:26:17 +00:00
sgjesse@chromium.org
8105ae3106
Optimize calls to GenericBinaryStub.
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The calls to GenericBinaryStub can now pass the arguments in registers instead of on the stack. It is supported for ADD, SUB, MUL and DIV. The convention in GenericBinaryStub is not changed so the left operand is passed in edx and the right one in eax. When the stub contains smi code arguments are always passed on the stack as the smi code has to have left and right operands on eax and ebx, so moving from edx,eax to eax,ebx is not worth it and the smi code also trashes the registers so if arguments where passed in registers they would have to be saved on the stack anyway.
Added flags to disable the use of certain Intel CPU features to make it easier to test different code paths.
Review URL: http://codereview.chromium.org/246075
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3041 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-08 14:27:46 +00:00
lrn@chromium.org
aed6a37c10
X64: Convert smis to holding 32 bits of payload.
...
Review URL: http://codereview.chromium.org/196139
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3037 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-08 12:36:12 +00:00
sgjesse@chromium.org
cab2794e95
Change clamping 0..255 instruction sequence for pixel array code.
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The subb instruction added to the IA-32 assembler is not used as dec_b ended up being used instead.
There is a mesurable difference.
Review URL: http://codereview.chromium.org/246076
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3033 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-08 07:09:46 +00:00
whesse@chromium.org
cc0c626d70
Add near calls (32-bit displacement) to Code objects on X64 platform.
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Review URL: http://codereview.chromium.org/200095
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3021 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-10-06 13:11:05 +00:00
sgjesse@chromium.org
ab34189c30
Handle array construction in native code (x64 version).
...
Ported the handle array construction in native code to x64. See http://codereview.chromium.org/193125 for details.
Please take a closer look of my use of the macro assembler Smi abstractions.
Review URL: http://codereview.chromium.org/209048
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2960 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-23 13:04:07 +00:00
whesse@chromium.org
996f1d4ee3
Rename a constant to kCallTargetAddressOffset
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Review URL: http://codereview.chromium.org/192075
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2876 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-11 12:41:27 +00:00
lrn@chromium.org
158dcbc39d
X64: Extract all smi operations into MacroAssembler macros.
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First step in changing Smi representation.
Review URL: http://codereview.chromium.org/196077
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2869 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-10 12:55:27 +00:00
whesse@chromium.org
0f20431c36
X64: Use sahf instruction only on processors that support it.
...
Review URL: http://codereview.chromium.org/183028
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2793 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-09-01 11:32:20 +00:00
lrn@chromium.org
fdf31f7f5e
X64: Implement debugger hooks.
...
Debugger is now fully functional.
Fix difference in emitting statement positions to match ia32.
Review URL: http://codereview.chromium.org/171107
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2716 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-08-19 10:18:30 +00:00
lrn@chromium.org
4254388c14
X64: Implement RegExp natively.
...
Review URL: http://codereview.chromium.org/165443
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2688 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-08-14 11:24:32 +00:00
lrn@chromium.org
6ad8b09efb
X64: Implement fast charCodeAt.
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Review URL: http://codereview.chromium.org/164135
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2648 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-08-07 11:16:26 +00:00
lrn@chromium.org
fd8b376989
X64: Reenabled RSet.
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Review URL: http://codereview.chromium.org/160453
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2607 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-08-03 11:05:26 +00:00
lrn@chromium.org
dc8ca16931
X64: Added inline keyed load/store and a bunch of other missing functions.
...
Review URL: http://codereview.chromium.org/160272
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2585 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-30 09:18:14 +00:00
whesse@chromium.org
79b52509d3
X64: Fix error in division & modulus, adjust mjsunit test status, fix lint error in objects.h
...
Review URL: http://codereview.chromium.org/159584
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2581 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-30 07:31:54 +00:00
whesse@chromium.org
500e10b648
Add inline caching for keyed loads and stores. Remove extra parentheses from some files.
...
Review URL: http://codereview.chromium.org/159266
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2534 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-24 11:22:35 +00:00
whesse@chromium.org
ff242173c3
Make stub cache hash work on X64 platform. Stub cache now works.
...
Switch arguments of 32-bit arithmetic instructions so they are consistent
with 64-bit arithmetic instructions (all on X64 platforms).
Review URL: http://codereview.chromium.org/155849
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2516 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-21 13:30:46 +00:00
whesse@chromium.org
894af58c82
Change tests status for x64, make test runner pass --arch flag to Scons, add to x64 disassembler. Copied from http://codereview.chromium.org/155346 so it can be committed.
...
Review URL: http://codereview.chromium.org/149608
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2456 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-14 11:39:45 +00:00
lrn@chromium.org
e3bb851efb
X64: Fix bug in left-shift.
...
Also changed a few other places that looked suspicious in the same way.
Added more info to failing test case and rewrote incorrect uses of mjsunit "fail" function.
Review URL: http://codereview.chromium.org/155279
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2409 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-09 08:00:12 +00:00
lrn@chromium.org
9cecee80f1
X64: Disassembler updated to using REX, extended registers and some X64 opcodes.
...
Not all opcodes fixed yet (some should be invalid in 64-bit mode, others should be added).
Review URL: http://codereview.chromium.org/155087
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2375 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-07 12:40:15 +00:00
whesse@chromium.org
6cf6824c17
X64: Make comparisons work on zero-extended smis.
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Review URL: http://codereview.chromium.org/155083
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2364 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-06 13:21:39 +00:00
whesse@chromium.org
0a774c9c18
X64: Use low bits of registers in emit_sse_operand. Enable --stop-at flag.
...
Review URL: http://codereview.chromium.org/155052
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2356 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2009-07-03 13:30:15 +00:00