Commit Graph

1041 Commits

Author SHA1 Message Date
Richard Henderson
c39323e9d2 Removing HP_TIMING_ACCUM as unused 2014-07-03 08:38:21 -07:00
Richard Henderson
850e0e032b Removing HP_TIMING_ZERO as unused 2014-07-03 08:38:18 -07:00
Richard Henderson
7db48f6aab powerpc: Remove dummy hp-timing.h
It's the same as the generic dummy version.
2014-07-03 08:38:15 -07:00
Siddhesh Poyarekar
99f8dc9220 Fix -Wundef warning on PAGE_COPY_THRESHOLD
The PAGE_COPY_THRESHOLD macro is meant to be overridden by
architecture-specific pagecopy.h, but it is currently done only by
mach; all other architectures use the default.  Check to see if the
macro is defined in addition to whether it is set to a non-zero value.
2014-07-03 01:49:43 +05:30
Vidya Ranganathan
bc8ea38590 PowerPC: strcat optimization for PPC64/POWER7
This patch adds an ifunc power7 strcat symbol that uses the logic on
sysdeps/powerpc/strcat.c but call power7 strlen/strcpy symbols instead
of default ones.
2014-07-02 14:04:21 -05:00
Adhemerval Zanella
9b71d0e38c Update powerpc-fpu ULPs. 2014-06-30 17:38:43 -04:00
Joseph Myers
a7672a2f81 Regenerate powerpc-nofpu libm-test-ulps.
This patch regenerates libm-test-ulps for powerpc-nofpu.

	* sysdeps/powerpc/nofpu/libm-test-ulps: Regenerated.
2014-06-30 21:26:49 +00:00
Joseph Myers
f1eafb41fa Remove shlib-versions ABI names support.
shlib-versions files can contain ABI lines that map triplets to a
canonical ABI name.  This name was once used for various purposes
where test baseline files for different ABIs went in a single
directory; now these purposes use sysdeps files, generation of headers
which have per-ABI variants uses abi-variants and related Makefile
variables and the shlib-versions ABI names are unused.  This patch
duly removes those lines and associated build system support for them.

Tested for x86_64 (both a full testsuite run and confirming the
installed shared libraries are unchanged by the patch).

	* Makeconfig ($(common-objpfx)soversions.mk): Do not generate
	abi-name definition.
	* scripts/soversions.awk: Do not handle or generate ABI lines.
	* shlib-versions: Remove ABI entries.
	* sysdeps/powerpc/nofpu/shlib-versions: Remove file.
	* sysdeps/x86_64/x32/shlib-versions: Remove ABI entry.
2014-06-27 20:24:23 +00:00
Siddhesh Poyarekar
4cf5b6d0d7 Fix Wundef warning for ELF_MACHINE_NO_RELA
This patch defines ELF_MACHINE_NO_RELA on all architectures.  Tested
only on x86_64 to verify that the sources before and after are
identical except for two instructions that pass the current line
number in dl-machine.h to assert_fail.
2014-06-26 22:30:40 +05:30
Joseph Myers
3e239be647 Move base_machine and machine settings from configure.ac to sysdeps preconfigure fragments.
This patch makes non-ex-ports architectures set base_machine and
machine based on the original configured machine value in preconfigure
fragments, like ex-ports architectures, rather than in the toplevel
configure.ac.

Tested x86 that the disassembly of installed shared libraries is
unchanged by the patch.

	* configure.ac (base_machine): Do not set specially for particular
	machines here.
	* configure: Regenerated.
	* sysdeps/powerpc/preconfigure: Move machine and base_machine
	settings from configure.ac.
	* sysdeps/i386/preconfigure: New file.
	* sysdeps/s390/preconfigure: Likewise.
	* sysdeps/sh/preconfigure: Likewise.
	* sysdeps/sparc/preconfigure: Likewise.
2014-06-25 17:52:56 +00:00
Adhemerval Zanella
6eaa65cefb Update powerpc-fpu ULPs. 2014-06-25 09:57:39 -05:00
Adhemerval Zanella
db22400947 PowerPC: sync hwcap.h capabilities
Linux commit dd58a092c4202f2bd490adab7285b3ff77f8e467 added the
PPC_FEATURE2_VEC_CRYPTO auvx capability to indicate whether to
hardware supports vector crypto hardware instructions.  This patch
adds its definition to powerpc hwcap bits.
2014-06-23 09:40:05 -05:00
Joseph Myers
9bc6103d04 Include <kernel-features.h> explicitly where required.
This patch makes files using __ASSUME_* macros include
<kernel-features.h> explicitly, rather than relying on some other
header (such as tls.h, lowlevellock.h or pthreadP.h) to include it
implicitly.  (I omitted cases where I've already posted or am testing
the patch that stops the file from needing __ASSUME_* at all.)  This
accords with the general principle of making source files include the
headers for anything they use, and also helps make it safe to remove
<kernel-features.h> includes from any file that doesn't use
__ASSUME_* (some of those may be stray includes left behind after
increasing the minimum kernel version, others may never have been
needed or may have become obsolete after some other change).

Tested x86_64 that the disassembly of installed shared libraries is
unchanged by this patch.

	* nptl/pthread_cond_wait.c: Include <kernel-features.h>.
	* nptl/pthread_rwlock_timedrdlock.c: Likewise.
	* nptl/pthread_rwlock_timedwrlock.c: Likewise.
	* nptl/sysdeps/unix/sysv/linux/lowlevelrobustlock.c: Likewise.
	* nscd/nscd.c: Likewise.
	* sysdeps/i386/nptl/tcb-offsets.sym: Likewise.
	* sysdeps/powerpc/nptl/tcb-offsets.sym: Likewise.
	* sysdeps/sh/nptl/tcb-offsets.sym: Likewise.
	* sysdeps/x86_64/nptl/tcb-offsets.sym: Likewise.
2014-06-20 23:24:00 +00:00
Adhemerval Zanella
556f529dab PowerPC: Move powerpc code out of nptl/ subdirectory 2014-06-17 07:54:22 -05:00
Adhemerval Zanella
31c44fea31 Update powerpc-fpu ULPs. 2014-06-11 21:22:49 -05:00
Vidya Ranganathan
e23d3d2690 PowerPC: Optimized strcmp for PPC64/POWER7
Optimization is achieved on 8 byte aligned strings with double word
comparison using cmpb instruction. On unaligned strings loop unrolling
is applied for Power7 gain.
2014-06-11 08:39:31 -05:00
Adhemerval Zanella
ed36bfa18f PowerPC: Fix optimized strncat strlen call
This patch fixes the optimized ppc64/power7 strncat strlen call for
static build without ifunc enabled.  The strlen symbol to call in such
situation is just strlen, instead of __GI_strlen (since the __GI_
alias is just created for shared objects).
2014-06-06 09:37:07 -05:00
Adhemerval Zanella
bab900166e Update powerpc-fpu ULPs. 2014-05-26 12:40:08 -05:00
Adhemerval Zanella
d298c41635 PowerPC: Remove 64 bits instructions in PPC32 code
This patch replaces the insrdi by insrwi in powerpc32 assembly.
2014-05-26 09:09:21 -05:00
Adhemerval Zanella
32999d63fd PowerPC: Remove unneeded copysign[f] macros
This patch remove the unneeded copysign[f] macro from powerpc
math_private.h, since they are already covered in generic version.
2014-05-22 16:05:19 -05:00
Adhemerval Zanella
3d2badacf1 PowerPC: Fix memchr ifunc hidden symbol for PPC32
This patch fixes a similar issue to
736c304a1a, where for PPC32 if the symbol
is defined as hidden (memchr) then compiler will create a local branc
(symbol@local) and the linker will not create a required PLT call to
make the ifunc work.  It changes the default hidden symbol (__GI_memchr)
to default memchr symbol for powerpc32 (__memchr_ppc32).
2014-05-22 07:53:44 -05:00
Adhemerval Zanella
7c112a3812 Update powerpc-fpu ULPs. 2014-05-20 16:21:51 -05:00
Adhemerval Zanella
e13bccd3de PowerPC: Fix copysignf optimization macro
This patch fixes the __copysignf optimized macro meant to internal libm
usage when used with constant value.  Without the explicit cast to
float, if it is used with const double value (for instance, on
s_casinhf.c) double constants will be used and it may lead to precision
issues in some algorithms.

It fixes the following failures on PPC64/POWER7:

Failure: Test: Real part of: cacos_downward (inf + 0 i)
Result:
 is:          1.19209289550781250000e-07   0x1.00000000000000000000p-23
 should be:   0.00000000000000000000e+00   0x0.00000000000000000000p+0
Failure: Test: Real part of: cacos_downward (inf - 0 i)
Result:
 is:          1.19209289550781250000e-07   0x1.00000000000000000000p-23
 should be:   0.00000000000000000000e+00   0x0.00000000000000000000p+0
Failure: Test: Real part of: cacos_downward (inf + 0.5 i)
Result:
 is:          1.19209289550781250000e-07   0x1.00000000000000000000p-23
 should be:   0.00000000000000000000e+00   0x0.00000000000000000000p+0
Failure: Test: Real part of: cacos_downward (inf - 0.5 i)
Result:
 is:          1.19209289550781250000e-07   0x1.00000000000000000000p-23
 should be:   0.00000000000000000000e+00   0x0.00000000000000000000p+0
Failure: Test: Real part of: cacos_towardzero (inf + 0 i)
Result:
 is:          1.19209289550781250000e-07   0x1.00000000000000000000p-23
 should be:   0.00000000000000000000e+00   0x0.00000000000000000000p+0
Failure: Test: Real part of: cacos_towardzero (inf - 0 i)
Result:
 is:          1.19209289550781250000e-07   0x1.00000000000000000000p-23
 should be:   0.00000000000000000000e+00   0x0.00000000000000000000p+0
Failure: Test: Real part of: cacos_towardzero (inf + 0.5 i)
Result:
 is:          1.19209289550781250000e-07   0x1.00000000000000000000p-23
 should be:   0.00000000000000000000e+00   0x0.00000000000000000000p+0
Failure: Test: Real part of: cacos_towardzero (inf - 0.5 i)
Result:
 is:          1.19209289550781250000e-07   0x1.00000000000000000000p-23
 should be:   0.00000000000000000000e+00   0x0.00000000000000000000p+0
2014-05-20 16:07:49 -05:00
Adhemerval Zanella
af121e371d PowerPC: Fix multiarch hypotf PPC64 path
This patch moves the hypotf multiarch implementation to correct path.
2014-05-19 18:06:40 -05:00
Vidya Ranganathan
f360f94a05 PowerPC: strncpy/stpncpy optimization for PPC64/POWER7
The optimization is achieved by following techniques:
  > data alignment [gain from aligned memory access on read/write]
  > POWER7 gains performance with loop unrolling/unwinding
    [gain by reduction of branch penalty].
  > zero padding done by calling optimized memset
2014-05-06 09:54:25 -05:00
Adhemerval Zanella
19c4bec0f4 PowerPC: ifunc improvement for internal calls
This patch changes de default symbol redirection for internal call of
memcpy, memset, memchr, and strlen to the IFUNC resolved ones.  The
performance improvement is noticeable in algorithms that uses these
symbols extensible, like the regex functions.
2014-05-05 13:30:16 -05:00
Adhemerval Zanella
dc041bd4db Fix 2014-04-29 07:45:05 -05:00
Adhemerval Zanella
18f2945ae9 PowerPC: Suppress unnecessary FPSCR write
This patch optimizes the FPSCR update on exception and rounding change
functions by just updating its value if new value if different from
current one.  It also optimizes fedisableexcept and feenableexcept by
removing an unecessary FPSCR read.
2014-04-29 07:05:39 -05:00
Adhemerval Zanella
2cd925f743 PowerPC: Add fenv macros for long double
This patch add the missing libc_<function>l_ctx macros for long
double.  Similar for float, they point to default double versions.
2014-04-17 14:01:51 -05:00
Adhemerval Zanella
de21c33c06 PowerPC: Fix --disable-multi-arch builds
This patch fixes some powerpc32 and powerpc64 builds with
--disable-multi-arch option along with different --with-cpu=powerN.
It cleanups the Implies directories by removing the multiarch
folder for non multiarch config and also fixing two assembly
implementations: powerpc64/power7/strncat.S that is calling the
wrong strlen; and power8/fpu/s_isnan.S that misses the hidden_def and
weak_alias directives.
2014-04-09 06:22:53 -05:00
Adhemerval Zanella
8bd70862e1 PowerPC: Fix nearbyint/nearbyintf result for FE_DOWNWARD
This patch fixes the powerpc32 optimized nearbyint/nearbyintf bogus
results for FE_DOWNWARD rounding mode.  This is due wrong instructions
sequence used in the rounding calculation (two subtractions instead of
adition and a subtraction).

Fixes BZ#16815.
2014-04-06 14:58:05 -05:00
Alan Modra
af6b17973c Correct prefetch hint in power7 memrchr.
Typo fix.

	* sysdeps/powerpc/powerpc64/power7/memrchr.S: Correct stream hint.
2014-04-02 13:42:27 +10:30
Alan Modra
483818d768 Fix reference to toc symbol.
https://sourceware.org/ml/binutils/2014-03/msg00033.html removes the
"magic" treatment of symbols defined in a .toc section.

	* sysdeps/powerpc/powerpc64/start.S: Add @toc to toc symbol reference.
2014-04-02 13:40:21 +10:30
Alan Modra
c859b32e9d Fix s_copysign stack temp for PowerPC64 ELFv2
[BZ #16786]
	* sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Don't trash stack.
2014-04-01 14:10:22 +10:30
Adhemerval Zanella
757d9dd5c3 PowerPC: Fix little endian enconding for mfvsrd
This patch fixes the MFVSRD_R3_V1 macro that encodes 'mfvsrd  r3,vs1'
(to support old binutils) for little endian.
2014-03-31 08:00:38 -05:00
Adhemerval Zanella
f3f1dab3ef Update powerpc-fpu ULPs. 2014-03-25 10:13:53 -05:00
Adhemerval Zanella
6f23d0939e PowerPC: optimized strpbrk for POWER7
This patch add an optimized strpbrk for POWER7 by using a different
algorithm than default implementation: it constructs a table based on
the 'accept' argument and use this table to check for any occurance on
the input string. The idea is similar as x86_64 uses.
For PowerPC some tunings were added, such as unroll loops and memory
clear using VSX instructions.
2014-03-20 19:46:13 -05:00
Adhemerval Zanella
6eaf95cbfa PowerPC: optimized strcspn for PPC64/POWER7
This patch add a optimized strcspn for POWER7 by using a different
algorithm than default implementation: it constructs a table based on
the 'accept' argument and use this table to check for any occurance
on the input string. The idea is similar as x86_64 uses.
For PowerPC some tunings were added, such as unroll loops and align
stack memory to table to 16 bytes (so VSX clean can ran without
alignment issues).
2014-03-20 11:24:52 -05:00
Adhemerval Zanella
c7de502503 PowerPC: remove wrong roundl implementation for PowerPC64
The roundl assembly implementation
(sysdeps/powerpc/powerpc64/fpu/s_roundl.S)
returns wrong results for some inputs where first double is a exact
integer and the precision is determined by second long double.

Checking on implementation comments and history, I am very confident the
assembly implementation was based on a version before commit
5c68d40169 that fixes BZ#2423 (Errors in
long double (ldbl-128ibm) rounding functions in glibc-2.4).

By just removing the implementation and make the build select
sysdeps/ieee754/ldbl-128ibm/s_roundl.c instead fixes the failing math.

This fixes 16707.
2014-03-14 12:54:47 -05:00
Adhemerval Zanella
98fb27a373 PowerPC: remove wrong nearbyintl implementation for PPC64
The nearbyintl assembly implementation
(sysdeps/powerpc/powerpc64/fpu/s_nearbyintl.S)
returns wrong results for some inputs where first double is a exact
integer and the precision is determined by second long double.

Checking on implementation comments and history, I am very confident the
assembly implementation was based on a version before commit
5c68d40169 that fixes BZ#2423 (Errors in
long double (ldbl-128ibm) rounding functions in glibc-2.4).

By just removing the implementation and make the build select
sysdeps/ieee754/ldbl-128ibm/s_nearbyintl.c instead fixes the failing
math.

Fixes BZ#16706.
2014-03-14 12:54:47 -05:00
Adhemerval Zanella
374f7f6121 PowerPC: remove wrong ceill implementation for PowerPC64
The ceill assembly implementation (sysdeps/powerpc/powerpc64/fpu/s_ceill.S)
returns wrong results for some inputs where first double is a exact
integer and the precision is determined by second long double.

Checking on implementation comments and history, I am very confident the
assembly implementation was based on a version before commit
5c68d40169 that fixes BZ#2423 (Errors in
long double (ldbl-128ibm) rounding functions in glibc-2.4).

By just removing the implementation and make the build select
sysdeps/ieee754/ldbl-128ibm/s_ceill.c instead fixes the failing math.

Fixes BZ#16701.
2014-03-14 12:54:47 -05:00
Adhemerval Zanella
dd3946c615 PowerPC: Fix bzero definition for static libc for PPC32
This patch fixes an issue for powerpc32-fpu static build which fails
with an 'bzero' undefined reference. This patch adds bzero ifunc selector
for static builds and fixes the '__bzero_ppc' reference to default
memset symbol (since static memset build does not provide ifunc
selector).

Fixes BZ#16689.
2014-03-12 09:03:22 -05:00
Adhemerval Zanella
27c7220a48 PowerPC: Fix strspn for static build
This patch makes the strspn ifunc selector build for static builds.
2014-03-12 06:54:44 -05:00
Adhemerval Zanella
4facea4730 PowerPC: Fix bzero definition for static libc for PPC64
This patch fixes an issue for powerpc64[le] static build where __bzero
is definied in multiple places (memset-ppc64.o and bzero.o). It is now
defined only in bzero.o and memset-ppc64.o only defined __bzero_ppc for
both dynamic and static library.

Fixes BZ#16683.
2014-03-11 09:31:59 -05:00
Vidya Ranganathan
e65caf1f1d PowerPC: strspn optimization for PPC64/POWER7
The optimization is achieved by following techniques:
  > hashing of needle.
  > hashing avoids scanning of duplicate entries in needle across the string.
  > initializing the hash table with Vector instructions (VSX) by quadword access.
  > unrolling when scanning for character in string across hash table.
2014-03-11 08:54:33 -05:00
Adhemerval Zanella
ba9cc0714e PowerPC: strncat optimization for PPC64
The optimization is achieved by following techniques:
1. Doubleword aligned memory access and compares using
   cmpb instruction.
2. Loop unrolling for byte load/store.
3. CPU pre-fetch to avoid cache miss.
2014-03-10 07:25:09 -05:00
Adhemerval Zanella
54b46a4b3e PowerPC: Fix modf/modff optimization return sign
This patch fix the optimized powerpc-fpu modf/modff implementation
when using in non-default rounding mode where the zero sign is not
as expected. It fixes the libm testsuite tests

  modf_downward (0)  == 0.00000000000000000000e+00
  modf_downward (20) == 0.00000000000000000000e+00
  modf_downward (21) == 0.00000000000000000000e+00

Where the sign returned was negative.
2014-03-08 11:24:32 -06:00
Joseph Myers
e6b6a85705 Don't include individual test ulps in libm-test-ulps.
As recently discussed
<https://sourceware.org/ml/libc-alpha/2014-02/msg00670.html>, it
doesn't seem particularly useful for libm-test-ulps files to contain
huge amounts of data on ulps for individual tests; just the global
maximum observed ulps for each function, together with the
verification of exceptions, errno and special results such as
infinities and NaNs for each test, suffices to verify that a
function's behavior on the given test inputs is within the expected
accuracy.  Removing this data reduces source tree churn caused by
updates to these files when libm tests are added, and reduces the
frequency with which testsuite additions actually need libm-test-ulps
changes at all.

Accordingly, this patch removes that data, so that individual tests
get checked against the global bounds for the given function and only
generate an error if those are exceeded.  Tested x86_64 (including
verifying that if an ulps value is artificially reduced, the tests do
indeed fail as they should and "make regen-ulps" generates the
expected changes).

	* math/libm-test.inc (struct ulp_data): Don't refer to ulps for
	individual tests in comment.
	(libm-test-ulps.h): Don't refer to test_ulps in #include comment.
	(prev_max_error): New variable.
	(prev_real_max_error): Likewise.
	(prev_imag_max_error): Likewise.
	(compare_ulp_data): Don't refer to test names in comment.
	(find_test_ulps): Remove function.
	(find_function_ulps): Likewise.
	(find_complex_function_ulps): Likewise.
	(init_max_error): Take function name as argument.  Look up ulps
	for that function.
	(print_ulps): Remove function.
	(print_max_error): Use prev_max_error instead of calling
	find_function_ulps.
	(print_complex_max_error): Use prev_real_max_error and
	prev_imag_max_error instead of calling find_complex_function_ulps.
	(check_float_internal): Take max_ulp parameter instead of calling
	find_test_ulps.  Don't call print_ulps.
	(check_float): Update call to check_float_internal.
	(check_complex): Update calls to check_float_internal.
	(START): Pass argument to init_max_error.
	* math/gen-libm-test.pl (%results): Don't include "kind"
	information.
	(parse_ulps): Don't handle ulps of individual tests.
	(print_ulps_file): Likewise.
	(output_ulps): Likewise.
	* math/README.libm-test: Update.
	* manual/libm-err-tab.pl (parse_ulps): Don't handle ulps of
	individual tests.
	* sysdeps/aarch64/libm-test-ulps: Remove individual test ulps.
	* sysdeps/alpha/fpu/libm-test-ulps: Likewise.
	* sysdeps/arm/libm-test-ulps: Likewise.
	* sysdeps/i386/fpu/libm-test-ulps: Likewise.
	* sysdeps/ia64/fpu/libm-test-ulps: Likewise.
	* sysdeps/m68k/coldfire/fpu/libm-test-ulps: Likewise.
	* sysdeps/m68k/m680x0/fpu/libm-test-ulps: Likewise.
	* sysdeps/microblaze/libm-test-ulps: Likewise.
	* sysdeps/mips/mips32/libm-test-ulps: Likewise.
	* sysdeps/mips/mips64/libm-test-ulps: Likewise.
	* sysdeps/powerpc/fpu/libm-test-ulps: Likewise.
	* sysdeps/powerpc/nofpu/libm-test-ulps: Likewise.
	* sysdeps/s390/fpu/libm-test-ulps: Likewise.
	* sysdeps/sh/libm-test-ulps: Likewise.
	* sysdeps/sparc/fpu/libm-test-ulps: Likewise.
	* sysdeps/tile/libm-test-ulps: Likewise.
	* sysdeps/x86_64/fpu/libm-test-ulps: Likewise.

	* sysdeps/hppa/fpu/libm-test-ulps: Remove individual test ulps.
2014-03-05 15:02:38 +00:00
Adhemerval Zanella
2b85d2a0b9 PowerPC: Update powerpc-fpu ULPs. 2014-03-03 08:58:08 -06:00
Rajalakshmi Srinivasaraghavan
c7debbdfac PowerPC: strrchr optimization for POWER7/PPC64
This patch optimizes strrchr() for ppc64. It uses aligned memory
access along with cmpb instruction and CPU prefetch to avoid
cache misses for speed improvement.
2014-03-03 08:06:41 -06:00
Adhemerval Zanella
fe13a20c37 PowerPC: llround/llroundf POWER8 optimization
This patch add a optimized llround/llroundf implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
Adhemerval Zanella
1ad8950a3e PowerPC: llrint/llrintf POWER8 optimization
This patch add a optimized llrint/llrintf implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
Adhemerval Zanella
cac626d60a PowerPC: Optimized finite/finitef for POWER8
This patch add a optimized finite/finitef implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
Adhemerval Zanella
4393fc119c PowerPC: Optimized isinf/isinff for POWER8
This patch add a optimized isinf/isinff implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
Adhemerval Zanella
487972aea5 PowerPC: Optimized isnan/isnanf for POWER8
This patch add a optimized isnan/isnanf implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:32 -06:00
Adhemerval Zanella
86e58c0815 PowerPC: Update powerpc-fpu ULPs. 2014-02-26 06:54:34 -06:00
Adam Conrad
105fa38156 Allow sys/auxv.h to be used from the testsuite on powerpc and sparc.
elf/tst-auxv.c includes misc/sys/auxv.h, which ends up not actually
being included due to the guard overlap, and getauxval becomes an
implicit declaration and implicit pointer conversion which means, at
best, the test isn't actually testing what it thinks it is and, at
worst, it'll crash and burn on platforms where implict pointer
conversion is a Very Bad Thing.

	* sysdeps/powerpc/bits/hwcap.h: Allow _SYSDEPS_SYSDEP_H guard as a
	synonym for _SYS_AUXV_H to allow direct inclusion.
	* sysdeps/sparc/bits/hwcap.h: Likewise.
	* sysdeps/powerpc/sysdep.h: Define _SYSDEPS_SYSDEP_H instead of
	_SYS_AUXV_H so we can include sysdep.h and sys/auxv.h together.
	* sysdeps/sparc/sysdep.h: Likewise.
2014-02-21 00:24:03 -07:00
Joseph Myers
ace614b8a5 soft-fp: support after-rounding tininess detection.
IEEE 754-2008 defines two ways in which tiny results can be detected,
"before rounding" (based on the infinite-precision result) and "after
rounding" (based on the result when rounded to normal precision as if
the exponent range were unbounded).  All binary operations on an
architecture must use the same choice of how tininess is detected.

soft-fp has so far implemented only before-rounding tininess
detection.  This patch adds support for after-rounding tininess
detection.  A new macro _FP_TININESS_AFTER_ROUNDING is added that
sfp-machine.h must define (soft-fp is meant to be self-contained so
the existing tininess.h files aren't used here, though the information
going in sfp-machine.h has been taken from them).  The soft-fp macros
dealing with raising underflow exceptions then handle the cases where
the choice matters specially, rounding a copy of the input to the
appropriate precision to see if a value that's tiny before rounding
isn't tiny after rounding.

Tested for mips64 using GCC trunk (which now uses soft-fp on MIPS, so
supporting exceptions and rounding modes for long double where not
previously supported - this is the immediate motivation for doing this
patch now) together with (a) a patch to sysdeps/mips/math-tests.h to
enable exceptions / rounding modes tests for long double for GCC 4.9
and later, and (b) corresponding changes applied to libgcc's soft-fp
and sfp-machine.h files.  In the libgcc context this is also tested on
x86_64 (also an after-rounding architecture) with testcases for
__float128 that I intend to add to the GCC testsuite when updating
soft-fp there.

(To be clear: this patch does not fix any glibc bugs that were
user-visible in past releases, since after-rounding architectures
didn't use soft-fp in any affected case with support for
floating-point exceptions - so there is no corresponding Bugzilla bug.
Rather, it works together with the GCC changes to use soft-fp on MIPS
to allow previously absent long double functionality to work properly,
and allows soft-fp to be used in glibc on after-rounding architectures
in cases where it couldn't previously be used.)

	* soft-fp/op-common.h (_FP_DECL): Mark exponent as possibly
	unused.
	(_FP_PACK_SEMIRAW): Determine tininess based on rounding shifted
	value if _FP_TININESS_AFTER_ROUNDING and unrounded value is in
	subnormal range.
	(_FP_PACK_CANONICAL): Determine tininess based on rounding to
	normal precision if _FP_TININESS_AFTER_ROUNDING and unrounded
	value has largest subnormal exponent.
	* soft-fp/soft-fp.h [FP_NO_EXCEPTIONS]
	(_FP_TININESS_AFTER_ROUNDING): Undefine and redefine to 0.
	* sysdeps/aarch64/soft-fp/sfp-machine.h
	(_FP_TININESS_AFTER_ROUNDING): New macro.
	* sysdeps/alpha/soft-fp/sfp-machine.h
	(_FP_TININESS_AFTER_ROUNDING): Likewise.
	* sysdeps/arm/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING):
	Likewise.
	* sysdeps/mips/mips64/soft-fp/sfp-machine.h
	(_FP_TININESS_AFTER_ROUNDING): Likewise.
	* sysdeps/mips/soft-fp/sfp-machine.h
	(_FP_TININESS_AFTER_ROUNDING): Likewise.
	* sysdeps/powerpc/soft-fp/sfp-machine.h
	(_FP_TININESS_AFTER_ROUNDING): Likewise.
	* sysdeps/sh/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING):
	Likewise.
	* sysdeps/sparc/sparc32/soft-fp/sfp-machine.h
	(_FP_TININESS_AFTER_ROUNDING): Likewise.
	* sysdeps/sparc/sparc64/soft-fp/sfp-machine.h
	(_FP_TININESS_AFTER_ROUNDING): Likewise.
	* sysdeps/tile/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING):
	Likewise.
2014-02-12 18:27:12 +00:00
Ondřej Bílka
a1ffb40e32 Use glibc_likely instead __builtin_expect. 2014-02-10 15:07:12 +01:00
Adhemerval Zanella
1695c77376 abilist-pattern configurability
This patch creates implicit rules to match the abifiles if
abilist-pattern is defined in the architecture Makefile. This allows
machine specific Makefiles to define different abifiles names
(for instance *-le.abilist for powerpc64le).
2014-02-04 09:48:47 -02:00
Adhemerval Zanella
2393fc0119 PowerPC: sotruss-lib implementation
This patch add the missing sotruss-lib interfaces for PowerPC.
2014-01-15 12:14:06 -06:00
Adhemerval Zanella
38f3458175 PowerPC: remove wrong truncl implementation for PowerPC64
The truncl assembly implementation (sysdeps/powerpc/powerpc64/fpu/s_truncl.S)
returns wrong results for some inputs where first double is a exact integer
and the precision is determined by second long double.

Checking on implementation comments and history, I am very confident the
assembly implementation was based on a version before commit
5c68d40169 that fixes BZ#2423 (Errors in
long double (ldbl-128ibm) rounding functions in glibc-2.4).

By just removing the implementation and make the build select
sysdeps/ieee754/ldbl-128ibm/s_truncl.c instead it fixes tgammal
issues regarding wrong result sign.
2014-01-08 08:14:48 -06:00
Adhemerval Zanella
3ff6304ee7 Update powerpc-fpu ULPs. 2014-01-08 07:55:08 -06:00
Joseph Myers
1f0f206719 Regenerate powerpc-nofpu ulps (again). 2014-01-07 23:32:04 +00:00
Joseph Myers
22562bb222 Fix soft-float ldbl-128ibm atan2l signs of zero results (bug 16390).
This patch fixes bug 16390, incorrect signs of zero results from
ldbl-128ibm atan2l, soft-float only.  The problem is a longstanding
GCC bug with fabsl not being correct for signed zero for soft float,
and the fix is using -fno-builtin-fabsl as a workaround, as already
done for various other source files.  Tested powerpc-nofpu.

	* sysdeps/powerpc/nofpu/Makefile [$(subdir) = math]
	(CFLAGS-e_atan2l.c): Use -fno-builtin-fabsl.
2014-01-03 20:56:40 +00:00
Adhemerval Zanella
d7ad2d9bad PowerPC: Fix compiler warnings
This patch fixes some compile warnings related to extra tokens at
end of #undef directive from multilib patchset.
2014-01-03 13:29:10 -06:00
Joseph Myers
24db925aa7 Regenerate powerpc-nofpu ulps. 2014-01-03 18:09:05 +00:00
Allan McRae
d4697bc93d Update copyright notices with scripts/update-copyrights 2014-01-01 22:00:23 +10:00
Adhemerval Zanella
fb55fcd21a Update powerpc-fpu ULPs. 2013-12-23 09:04:18 -05:00
Joseph Myers
eb98356875 Don't make soft-fp symbols compat symbols for powerpc-nofpu.
sysdeps/powerpc/powerpc32/libgcc-compat.S makes certain symbols that
glibc once accidentally reexported from libgcc into compat symbols.

Where the exports were purely accidental, this is the right thing to
do.  However, for powerpc-nofpu the soft-fp symbols are deliberately
exported from libc, given public versions in
sysdeps/powerpc/nofpu/Versions and used by libm in preference to the
libgcc versions that do not support the software exceptions and
rounding modes.  The libc versions should also be usable by user
programs, though normally libgcc gets linked in first (meaning,
effectively, that the <fenv.h> functions are broken as regards their
expected effects on user arithmetic).

A longstanding todo item is to remove the functions in question from
libgcc (when built with recent enough glibc) - that is, remove them
from static libgcc and make them compat symbols in shared libgcc - so
that this works properly (this is one of the items mentioned at
<http://gcc.gnu.org/wiki/Software_floating_point> - parts of that page
are obviously out of date, but this item still applies).  Doing this
requires first that the functions are actually available from libc for
new links, not just as compat symbols.

This patch stops the symbols in question being compat symbols for
powerpc-nofpu.  The nofpu Versions entries for them are removed (the
symbols never were exported at GLIBC_2.3.2, only GLIBC_2.0, because
the compat symbols took precedence).

Tested powerpc-nofpu.  The symbols are no longer compat symbols and
libm.so now properly gets undefined references to them (resolved to
libc.so) instead of the libgcc copies getting linked into libm as
before.

	* sysdeps/powerpc/powerpc32/libgcc-compat.S
	[_SOFT_FLOAT || __NO_FPRS__] (__fixdfdi_v_glibc20): Do not define
	as a macro and a compat symbol.
	[_SOFT_FLOAT || __NO_FPRS__] (__fixsfdi_v_glibc20): Likewise.
	[_SOFT_FLOAT || __NO_FPRS__] (__fixunsdfdi_v_glibc20): Likewise.
	[_SOFT_FLOAT || __NO_FPRS__] (__fixunssfdi_v_glibc20): Likewise.
	[_SOFT_FLOAT || __NO_FPRS__] (__floatdidf_v_glibc20): Likewise.
	[_SOFT_FLOAT || __NO_FPRS__] (__floaddisf_v_glibc20): Likewise.
	[HAVE_DOT_HIDDEN && (_SOFT_FLOAT || __NO_FPRS__)] (__fixdfdi): Do
	not use .hidden.
	[HAVE_DOT_HIDDEN && (_SOFT_FLOAT || __NO_FPRS__)] (__fixsfdi):
	Likewise.
	[HAVE_DOT_HIDDEN && (_SOFT_FLOAT || __NO_FPRS__)] (__fixunsdfdi):
	Likewise.
	[HAVE_DOT_HIDDEN && (_SOFT_FLOAT || __NO_FPRS__)] (__fixunssfdi):
	Likewise.
	[HAVE_DOT_HIDDEN && (_SOFT_FLOAT || __NO_FPRS__)] (__floaddidf):
	Likewise.
	[HAVE_DOT_HIDDEN && (_SOFT_FLOAT || __NO_FPRS__)] (__floaddisf):
	Likewise.
	* sysdeps/powerpc/nofpu/Versions (libc): Remove __fixdfdi,
	__fixsfdi, __fixunsdfdi, __fixunssfdi, __floatdidf and __floatdisf
	from GLIBC_2.3.2.
2013-12-19 21:26:36 +00:00
Adhemerval Zanella
6eeb678ac0 Update powerpc-fpu ULPs. 2013-12-19 13:44:16 -06:00
Andreas Schwab
83f5c32d21 Fix uses of CALL_MCOUNT in ppc64 assembler sources 2013-12-19 17:06:48 +01:00
Adhemerval Zanella
affb6f7836 Update powerpc-fpu ULPs. 2013-12-17 10:23:00 -06:00
Adhemerval Zanella
42fcb46ce6 PowerPC: multiarch hypot/hypotf for PowerPC64 2013-12-13 15:38:01 -05:00
Adhemerval Zanella
83efded424 PowerPC: multiarch modf/modff for PowerPC64 2013-12-13 15:37:23 -05:00
Adhemerval Zanella
43e246d2a6 PowerPC: multiarch logb/logbl/logbf for PowerPC64 2013-12-13 15:36:33 -05:00
Adhemerval Zanella
8fdad12379 PowerPC: multiarch isinf/isinff for PowerPC64 2013-12-13 15:35:44 -05:00
Adhemerval Zanella
1481d7066c PowerPC: multiarch finite/finitef for PowerPC64 2013-12-13 15:34:52 -05:00
Adhemerval Zanella
5ccd5fc893 PowerPC: multiarch llrint/lrint for PowerPC64 2013-12-13 15:33:54 -05:00
Adhemerval Zanella
2568f3fa69 PowerPC: multiarch copysign/copysignf for PowerPC64 2013-12-13 15:32:58 -05:00
Adhemerval Zanella
1cb341fd78 PowerPC: multiarch trunc/truncf for PowerPC64 2013-12-13 15:30:57 -05:00
Adhemerval Zanella
59a3e194f7 PowerPC: multiarch round/roundf for PowerPC64 2013-12-13 15:06:01 -05:00
Adhemerval Zanella
357fd3b40a PowerPC: multiarch floor/floorf for PowerPC64 2013-12-13 15:04:04 -05:00
Adhemerval Zanella
96770f12b0 PowerPC: multiarch ceil/ceilf for PowerPC64 2013-12-13 15:02:32 -05:00
Adhemerval Zanella
c3627f6e96 PowerPC: multiarch llround/lround for PowerPC64 2013-12-13 15:01:54 -05:00
Adhemerval Zanella
b2284ad7cf PowerPC: multiarch isnan/isnanf for PowerPC64 2013-12-13 15:01:10 -05:00
Adhemerval Zanella
69bbc63d88 PowerPC: Adjust multiarch Implies for PowerPC64
This patch adds Implies files on multiarch folder for POWER chips so
multirach is enabled when building with --with-cpu and powerN
option.
2013-12-13 14:58:02 -05:00
Adhemerval Zanella
c24517c9dd PowerPC: Cleaning up uneeded sqrt routines
For PPC64, all the wrappers at sysdeps are superfluous: they are
basically the same implementation from math/w_sqrt.c with the
'#ifdef _IEEE_LIBM'. And the power4 version just force the 'fsqrt'
instruction utilization with an inline assembly, which is already
handled by math_private.h __ieee754_sqrt implementation.
2013-12-13 14:56:09 -05:00
Adhemerval Zanella
a52374e82b PowerPC: multiarch stpcpy for PowerPC64 2013-12-13 14:55:22 -05:00
Adhemerval Zanella
7f5ec11336 PowerPC: multiarch strcpy for PowerPC64 2013-12-13 14:54:41 -05:00
Adhemerval Zanella
e28bcd427b PowerPC: multiarch wordcopy for PowerPC64 2013-12-13 14:54:08 -05:00
Adhemerval Zanella
92cacfce7d PowerPC: multiarch wcscpy for PowerPC64. 2013-12-13 14:53:25 -05:00
Adhemerval Zanella
7b714620a7 PowerPC: multiarch wcsrchr for PowerPC64 2013-12-13 14:52:48 -05:00
Adhemerval Zanella
16fd2ae37c PowerPC: multiarch wcschr for PowerPC64 2013-12-13 14:51:36 -05:00
Adhemerval Zanella
9ee2969b05 PowerPC: multiarch strchrnul for PowerPC64 2013-12-13 14:50:26 -05:00
Adhemerval Zanella
372dc060e0 PowerPC: multiarch strchr for PowerPC64 2013-12-13 14:49:54 -05:00
Adhemerval Zanella
24c2c3b996 PowerPC: multiarch strncmp for PowerPC64 2013-12-13 14:48:48 -05:00
Adhemerval Zanella
1c92d9a0e0 PowerPC: multiarch strncasecmp for PowerPC64 2013-12-13 14:40:28 -05:00
Adhemerval Zanella
17de3ee3c1 PowerPC: multiarch strcasecmp for PowerPC64 2013-12-13 14:39:51 -05:00
Adhemerval Zanella
62982bf978 PowerPC: multiarch strnlen for PowerPC64 2013-12-13 14:38:50 -05:00
Adhemerval Zanella
a65f4904ab PowerPC: multiarch strlen for PowerPC64 2013-12-13 14:38:17 -05:00
Adhemerval Zanella
1fd005ad2f PowerPC: multiarch rawmemchr for PowerPC64 2013-12-13 14:37:26 -05:00
Adhemerval Zanella
cd05ba9135 PowerPC: multiarch memrchr for PowerPC64 2013-12-13 14:36:50 -05:00
Adhemerval Zanella
870f867648 PowerPC: multiarch memchr for PowerPC64 2013-12-13 14:35:28 -05:00
Adhemerval Zanella
f00be62b08 PowerPC: multiarch mempcpy for PowerPC64 2013-12-13 14:34:06 -05:00
Adhemerval Zanella
8a29a3d00b PowerPC: multiarch memset/bzero for PowerPC64 2013-12-13 14:33:16 -05:00
Adhemerval Zanella
07253fcf7b PowerPC: multirach memcmp for PowerPC64 2013-12-13 14:32:31 -05:00
Adhemerval Zanella
b5beafbcee PowerPC: multiarch memcpy for PowerPC64 2013-12-13 14:31:41 -05:00
Adhemerval Zanella
5e6a4d4b9e PowerPC: Adjust multiarch Implies for PowerPC64
This patch adds Implies files on multiarch folder for POWER chips so
multirach is enabled when building with --with-cpu and powerN
option.
2013-12-13 14:29:27 -05:00
Adhemerval Zanella
be2f900916 Update powerpc-fpu ULPs. 2013-12-09 06:52:04 -06:00
Adhemerval Zanella
24eeafdb44 PowerPC: Optimized mpn functions for PowerPC64/POWER7
This patch add optimized __mpn_add_n/__mpn_sub_n for PowerPC64/POWER7.
They are originally from GMP with adjustments for GLIBC.
2013-12-06 11:52:31 -06:00
Adhemerval Zanella
4a2c0fd44d PowerPC: Optimized mpn functions for PowerPC64
This patch add optimized __mpn_addmul, __mpn_addsub, __mpn_lshift, and
__mpn_mul_1 implementations for PowerPC64. They are originally from GMP
with adjustments for GLIBC.
2013-12-06 11:52:22 -06:00
Adhemerval Zanella
ccdc8438dc PowerPC: Adjust multiarch Implies for PowerPC32
This patch adds Implies files on multiarch folder for POWER chips so
multirach is enabled when building with --with-cpu and powerN option.
2013-12-06 05:47:05 -06:00
Adhemerval Zanella
2e973d9919 PowerPC: multiarch __ieee754_hypot[f] for PowerPC32 2013-12-06 05:47:05 -06:00
Adhemerval Zanella
2d9470b2ae PowerPC: multiarch logb/logbf/logbl for PowerPC32 2013-12-06 05:47:05 -06:00
Adhemerval Zanella
5212ffce0e PowerPC: multiarch modf/modff for PowerPC32 2013-12-06 05:47:05 -06:00
Adhemerval Zanella
79dccf31bf PowerPC: multiarch lrint/lrintf for PowerPC32 2013-12-06 05:47:04 -06:00
Adhemerval Zanella
deb6648026 PowerPC: multiarch lround/lrounf for PowerPC32 2013-12-06 05:47:04 -06:00
Adhemerval Zanella
264b036bea PowerPC: multiarch copysign/copysignf for PowerPC32 2013-12-06 05:47:04 -06:00
Adhemerval Zanella
d47db6c906 PowerPC: multiarch trunc/truncf for PowerPC32 2013-12-06 05:47:04 -06:00
Adhemerval Zanella
ddb60b5aa9 PowerPC: multiarch round/roundf for PowerPC32 2013-12-06 05:47:04 -06:00
Adhemerval Zanella
bedcf49b45 PowerPC: multiarch floor/floorf for PowerPC32 2013-12-06 05:47:04 -06:00
Adhemerval Zanella
35ae5b40a4 PowerPC: multiarch ceil/ceilf for PowerPC32 2013-12-06 05:47:03 -06:00
Adhemerval Zanella
ae1a4cd9ff PowerPC: multiarch finite/finitef for PowerPC32 2013-12-06 05:47:03 -06:00
Adhemerval Zanella
64fffd65d7 PowerPC: multiarch isinf/isinff for PowerPC32 2013-12-06 05:47:03 -06:00
Adhemerval Zanella
8e4e7ba2d7 PowerPC: multiarch isnan/isnanf for PowerPC32 2013-12-06 05:47:03 -06:00
Adhemerval Zanella
ddba588e2d PowerPC: multiarch sqrt/sqrtf for PowerPC32 2013-12-06 05:47:03 -06:00
Adhemerval Zanella
0f96a2f0b5 PowerPC: multiarch llround/llroundf for PowerPC32 2013-12-06 05:47:03 -06:00
Adhemerval Zanella
c9b5d79e0c PowerPC: multiarch llrint/llrintf for PowerPC32 2013-12-06 05:47:02 -06:00
Adhemerval Zanella
ea5a72f882 PowerPC: multiarch wordcopy routines for PowerPC32 2013-12-06 05:47:02 -06:00
Adhemerval Zanella
93be09e725 PowerPC: multiarch wcscpy for PowerPC32 2013-12-06 05:47:02 -06:00
Adhemerval Zanella
bb04e529f6 PowerPC: multiarch wcsrchr for PowerPC32 2013-12-06 05:47:02 -06:00
Adhemerval Zanella
05b5cd1ce5 PowerPC: multiarch wcschr for PowerPC32 2013-12-06 05:47:02 -06:00
Adhemerval Zanella
ba9641477e PowerPC: multiarch strchr for PowerPC32 2013-12-06 05:47:01 -06:00
Adhemerval Zanella
31c81aaa01 PowerPC: multiarch strchrnul for PowerPC32 2013-12-06 05:47:01 -06:00
Adhemerval Zanella
0d0607d9ab PowerPC: multiarch strncasecmp for PowerPC32 2013-12-06 05:47:01 -06:00
Adhemerval Zanella
4dfd5c8647 PowerPC: multiarch strcasecmp for PowerPC32 2013-12-06 05:47:01 -06:00
Adhemerval Zanella
a19e01a355 PowerPC: multiarch strncmp for PowerPC32 2013-12-06 05:47:01 -06:00
Adhemerval Zanella
ae9cf7a2e8 PowerPC: multiarch strnlen for PowerPC32 2013-12-06 05:47:00 -06:00
Adhemerval Zanella
3148bb7d2c PowerPC: multiarch strlen for PowerPC32 2013-12-06 05:47:00 -06:00
Adhemerval Zanella
7af8b94625 PowerPC: multiarch rawmemchr for PowerPC32 2013-12-06 05:47:00 -06:00
Adhemerval Zanella
03a6aa6a63 PowerPC: multiarch memrchr for PowerPC32 2013-12-06 05:47:00 -06:00
Adhemerval Zanella
1c62e6d960 PowerPC: multiarch memchr for PowerPC32 2013-12-06 05:47:00 -06:00
Adhemerval Zanella
87da8bdbe1 PowerPC: multiarch mempcpy for PowerPC32 2013-12-06 05:46:59 -06:00
Adhemerval Zanella
20ed471427 PowerPC: multiarch memset/bzero for PowerPC32 2013-12-06 05:46:59 -06:00
Adhemerval Zanella
ab3e3a46d5 PowerPC: multiarch memcmp for PowerPC32 2013-12-06 05:46:59 -06:00
Adhemerval Zanella
930de6f09e PowerPC: multiarch memcpy for PowerPC32 2013-12-06 05:46:59 -06:00
Adhemerval Zanella
4c628e0026 PowerPC: initial support for multilib for PowerPC32
This patch add a empty Makefile, the C IFUNC helper macros, and a empty
available IFUNC implementation enumeration.
2013-12-06 05:46:59 -06:00
Adhemerval Zanella
180138f156 Update powerpc-fpu ULPs. 2013-12-05 11:20:06 -06:00
Adhemerval Zanella
eb5ad6b9bc PowerPC: Add systemtap static probe points in setjmp/longjmp
This patch add static probes for setjmp/longjmp in the way gdb expects,fixing
the gdb.base/longjmp.exp gdb testcases.

It changes the symbol_name and use macros to to avoid change the probe names
and ending up adding more logic on GDB (since with the expected name
GDB work seamlessly).
2013-12-05 07:44:07 -06:00
Ulrich Weigand
61cd8fe401 PowerPC64 ELFv2 ABI 5/6: LD_AUDIT interface changes
The ELFv2 ABI changes the calling convention by passing and returning
structures in registers in more cases than the old ABI:
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg01145.html
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg01147.html

For the most part, this does not affect glibc, since glibc assembler
files do not use structure parameters / return values.  However, one
place is affected: the LD_AUDIT interface provides a structure to
the audit routine that contains all registers holding function
argument and return values for the intercepted PLT call.

Since the new ABI now sometimes uses registers to return values
that were never used for this purpose in the old ABI, this structure
has to be extended.  To force audit routines to be modified for the
new ABI if necessary, the patch defines v2 variants of the la_ppc64
types and routines.

In addition, the patch contains two unrelated changes to the
PLT trampoline routines: it fixes a bug where FPR return values
were stored in the wrong place, and it removes the unnecessary
save/restore of CR.
2013-12-04 07:41:39 -06:00
Ulrich Weigand
8b8a692cfd PowerPC64 ELFv2 ABI 4/6: Stack frame layout changes
This updates glibc for the changes in the ELFv2 relating to the
stack frame layout.  These are described in more detail here:
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg01149.html
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg01146.html

Specifically, the "compiler and linker doublewords" were removed,
which has the effect that the save slot for the TOC register is
now at offset 24 rather than 40 to the stack pointer.

In addition, a function may now no longer necessarily assume that
its caller has set up a 64-byte register save area its use.

To address the first change, the patch goes through all assembler
files and replaces immediate offsets in instructions accessing the
ABI-defined stack slots by symbolic offsets.  Those already were
defined in ucontext_i.sym and used in some of the context routines,
but that doesn't really seem like the right place for those defines.

The patch instead defines those symbolic offsets in sysdeps.h,
in two variants for the old and new ABI, and uses them systematically
in all assembler files, not just the context routines.

The second change only affected a few assembler files that used
the save area to temporarily store some registers.  In those
cases where this happens within a leaf function, this patch
changes the code to store those registers to the "red zone"
below the stack pointer.  Otherwise, the functions already allocate
a stack frame, and the patch changes them to add extra space in
these frames as temporary space for the ELFv2 ABI.
2013-12-04 07:41:39 -06:00
Ulrich Weigand
122b66defd PowerPC64 ELFv2 ABI 3/6: PLT local entry point optimization
This is a follow-on to the previous patch to support the ELFv2 ABI in the
dynamic loader, split off into its own patch since it is just an optional
optimization.

In the ELFv2 ABI, most functions define both a global and a local entry
point; the local entry requires r2 to be already set up by the caller
to point to the callee's TOC; while the global entry does not require
the caller to know about the callee's TOC, but it needs to set up r12
to the callee's entry point address.

Now, when setting up a PLT slot, the dynamic linker will usually need
to enter the target function's global entry point.  However, if the
linker can prove that the target function is in the same DSO as the
PLT slot itself, and the whole DSO only uses a single TOC (which the
linker will let ld.so know via a DT_PPC64_OPT entry), then it is
possible to actually enter the local entry point address into the
PLT slot, for a slight improvement in performance.

Note that this uncovered a problem on the first call via _dl_runtime_resolve,
because that routine neglected to restore the caller's TOC before calling
the target function for the first time, since it assumed that function
would always reload its own TOC anyway ...
2013-12-04 07:41:38 -06:00
Ulrich Weigand
696caf1d00 PowerPC64 ELFv2 ABI 2/6: Remove function descriptors
This patch adds support for the ELFv2 ABI feature to remove function
descriptors.  See this GCC patch for in-depth discussion:
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg01141.html

This mostly involves two types of changes: updating assembler source
files to the new logic, and updating the dynamic loader.

After the refactoring in the previous patch, most of the assembler source
changes can be handled simply by providing ELFv2 versions of the
macros in sysdep.h.   One somewhat non-obvious change is in __GI__setjmp:
this used to "fall through" to the immediately following __setjmp ENTRY
point.  This is no longer safe in the ELFv2 since ENTRY defines both
a global and a local entry point, and you cannot simply fall through
to a global entry point as it requires r12 to be set up.

Also, makecontext needs to be updated to set up registers according to
the new ABI for calling into the context's start routine.

The dynamic linker changes mostly consist of removing special code
to handle function descriptors.  We also need to support the new PLT
and glink format used by the the ELFv2 linker, see:
https://sourceware.org/ml/binutils/2013-10/msg00376.html

In addition, the dynamic linker now verifies that the dynamic libraries
it loads match its own ABI.

The hack in VDSO_IFUNC_RET to "synthesize" a function descriptor
for vDSO routines is also no longer necessary for ELFv2.
2013-12-04 07:41:38 -06:00
Ulrich Weigand
d31beafa8e PowerPC64 ELFv2 ABI 1/6: Code refactoring
This is the first patch to support the new ELFv2 ABI in glibc.

As preparation, this patch simply refactors some of the powerpc64 assembler
code to move all code related to creating function descriptors (.opd section)
or using function descriptors (function pointer call) into a central place
in sysdep.h.

Note that most locations creating .opd entries were already using macros
in sysdep.h, this patch simply extends this to the remaining places.

No relevant change in generated code expected.
2013-12-04 07:41:38 -06:00
Alan Modra
7ec07d9a7b PowerPC64: Report overflow on @h and @ha relocations
This patch updates glibc in accordance with the binutils patch checked in here:
https://sourceware.org/ml/binutils/2013-10/msg00372.html

This changes the various R_PPC64_..._HI and _HA relocations to report
32-bit overflows.  The motivation is that existing uses of @h / @ha
are to build up 32-bit offsets (for the "medium model" TOC access
that GCC now defaults to), and we'd really like to see failures at
link / load time rather than silent truncations.

For those rare cases where a modifier is needed to build up a 64-bit
constant, new relocations _HIGH / _HIGHA are supported.

The patch also fixes a bug in overflow checking for the R_PPC64_ADDR30
and R_PPC64_ADDR32 relocations.
2013-12-04 07:41:37 -06:00
Adhemerval Zanella
fa60a67488 Update powerpc-fpu ULPs. 2013-12-04 06:04:48 -06:00
Adhemerval Zanella
1ab19dec57 Update powerpc-fpu ULPs. 2013-12-02 05:16:42 -06:00
Joseph Myers
91a1f3fea0 Add powerpc-nofpu/e500 support functions for atomic compound assignment and FLT_ROUNDS. 2013-11-28 18:01:41 +00:00
Joseph Myers
3c1c46a64a Fix dbl-64 e_sqrt.c for non-default rounding modes (bug 16271). 2013-11-28 16:50:38 +00:00
Adhemerval Zanella
bd12ab55c0 PowerPC: Fix __fe_nomask_env missing symbol
This patch fix the missing symbol __fe_nomask_env from commit
41e8926aa4 for GLIBC_2.1.
2013-11-26 07:25:08 -06:00
Joseph Myers
63cfe52b6d Fix powerpc-nofpu build. 2013-11-25 19:07:55 +00:00
Adhemerval Zanella
41e8926aa4 PowerPC: Set/restore rounding mode only when needed
This patch helps some math functions performance by adding the libc_fexxx
variant of inline functions to handle both FPU round and exception set/restore
and by using them on the libc_fexxx_ctx functions. It is based on already coded
fexxx family functions for PPC with fpu.

Here is the summary of performance improvements due this patch (measured on a
POWER7 machine):

Before:

cos(): ITERS:9.5895e+07: TOTAL:5116.03Mcy, MAX:77.6cy, MIN:49.792cy, 18744 calls/Mcy
exp(): ITERS:2.827e+07: TOTAL:5187.15Mcy, MAX:494.018cy, MIN:38.422cy, 5450.01 calls/Mcy
pow(): ITERS:6.1705e+07: TOTAL:5144.26Mcy, MAX:171.95cy, MIN:29.935cy, 11994.9 calls/Mcy
sin(): ITERS:8.6898e+07: TOTAL:5117.06Mcy, MAX:83.841cy, MIN:46.582cy, 16982 calls/Mcy
tan(): ITERS:2.9473e+07: TOTAL:5115.39Mcy, MAX:191.017cy, MIN:172.352cy, 5761.63 calls/Mcy

After:

cos(): ITERS:2.05265e+08: TOTAL:5111.37Mcy, MAX:78.754cy, MIN:24.196cy, 40158.5 calls/Mcy
exp(): ITERS:3.341e+07: TOTAL:5170.84Mcy, MAX:476.317cy, MIN:15.574cy, 6461.23 calls/Mcy
pow(): ITERS:7.6153e+07: TOTAL:5129.1Mcy, MAX:147.5cy, MIN:30.916cy, 14847.2 calls/Mcy
sin(): ITERS:1.58816e+08: TOTAL:5115.11Mcy, MAX:1490.39cy, MIN:22.341cy, 31048.4 calls/Mcy
tan(): ITERS:3.4964e+07: TOTAL:5114.18Mcy, MAX:177.422cy, MIN:146.115cy, 6836.68 calls/Mcy
2013-11-25 06:34:41 -06:00
Joseph Myers
73c1ce4fdb Make powerpc-nofpu floating-point state thread-local (bug 15483). 2013-11-19 13:39:56 +00:00
Adhemerval Zanella
7a2ad8cf39 PowerPC: Fix __fe_mask_env export
This patch does not export __fe_mask_env anymore, only providing a
compatibility symbol. It fixes BZ#14143.
2013-11-13 06:45:19 -06:00
Mike Frysinger
cb8a6dbd17 rename configure.in to configure.ac
Autoconf has been deprecating configure.in for quite a long time.
Rename all our configure.in and preconfigure.in files to .ac.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-10-30 17:32:08 +10:00
Adhemerval Zanella
69f13dbf06 PowerPC: strcpy/stpcpy optimization for PPC64/POWER7
This patch intends to unify both strcpy and stpcpy implementationsi
for PPC64 and PPC64/POWER7. The idead default powerpc64 implementation
is to provide both doubleword and word aligned memory access.

For PPC64/POWER7 is also provide doubleword and word memory access,
remove the branch hints, use the cmpb instruction for compare
doubleword/words, and add an optimization for inputs of same alignment.
2013-10-25 13:28:24 -05:00
Joseph Myers
3c8325fb47 Add e500 port. 2013-10-18 21:04:22 +00:00
Joseph Myers
bd878fc030 Extend powerpc-nofpu -fno-builtin-fabsl workaround to more files. 2013-10-10 19:12:09 +00:00
Joseph Myers
29d73d867e Move powerpc ports pieces to libc. 2013-10-04 16:02:33 +00:00
Joseph Myers
89c2003e84 e500 port: fix fpu_control.h constant values. 2013-10-04 15:56:48 +00:00
Alan Modra
4cb81307b3 Use stdint.h types in union unaligned.
* sysdeps/powerpc/powerpc32/dl-machine.c (__process_machine_rela):
	Use stdint types in rather than __attribute__((mode())).
	* sysdeps/powerpc/powerpc64/dl-machine.h (elf_machine_rela): Likewise.
2013-10-04 12:51:11 +09:30
Alan Modra
f8e3e9f31b Correct little-endian relocation of UADDR64,32,16.
* sysdeps/powerpc/powerpc32/dl-machine.c (__process_machine_rela):
	Correct handling of unaligned relocs for little-endian.
	* sysdeps/powerpc/powerpc64/dl-machine.h (elf_machine_rela): Likewise.
2013-10-04 11:33:12 +09:30
Alan Modra
466b039332 PowerPC LE memchr and memrchr
http://sourceware.org/ml/libc-alpha/2013-08/msg00105.html

Like strnlen, memchr and memrchr had a number of defects fixed by this
patch as well as adding little-endian support.  The first one I
noticed was that the entry to the main loop needlessly checked for
"are we done yet?" when we know the size is large enough that we can't
be done.  The second defect I noticed was that the main loop count was
wrong, which in turn meant that the small loop needed to handle an
extra word.  Thirdly, there is nothing to say that the string can't
wrap around zero, except of course that we'd normally hit a segfault
on trying to read from address zero.  Fixing that simplified a number
of places:

-	/* Are we done already?  */
-	addi    r9,r8,8
-	cmpld	r9,r7
-	bge	L(null)

becomes

+	cmpld	r8,r7
+	beqlr

However, the exit gets an extra test because I test for being on the
last word then if so whether the byte offset is less than the end.
Overall, the change is a win.

Lastly, memrchr used the wrong cache hint.

	* sysdeps/powerpc/powerpc64/power7/memchr.S: Replace rlwimi with
	insrdi.  Make better use of reg selection to speed exit slightly.
	Schedule entry path a little better.  Remove useless "are we done"
	checks on entry to main loop.  Handle wrapping around zero address.
	Correct main loop count.  Handle single left-over word from main
	loop inline rather than by using loop_small.  Remove extra word
	case in loop_small caused by wrong loop count.  Add little-endian
	support.
	* sysdeps/powerpc/powerpc32/power7/memchr.S: Likewise.
	* sysdeps/powerpc/powerpc64/power7/memrchr.S: Likewise.  Use proper
	cache hint.
	* sysdeps/powerpc/powerpc32/power7/memrchr.S: Likewise.
	* sysdeps/powerpc/powerpc64/power7/rawmemchr.S: Add little-endian
	support.  Avoid rlwimi.
	* sysdeps/powerpc/powerpc32/power7/rawmemchr.S: Likewise.
2013-10-04 10:41:46 +09:30
Alan Modra
3be87c77d2 PowerPC LE memset
http://sourceware.org/ml/libc-alpha/2013-08/msg00104.html

One of the things I noticed when looking at power7 timing is that rlwimi
is cracked and the two resulting insns have a register dependency.
That makes it a little slower than the equivalent rldimi.

	* sysdeps/powerpc/powerpc64/memset.S: Replace rlwimi with
        insrdi.  Formatting.
	* sysdeps/powerpc/powerpc64/power4/memset.S: Likewise.
	* sysdeps/powerpc/powerpc64/power6/memset.S: Likewise.
	* sysdeps/powerpc/powerpc64/power7/memset.S: Likewise.
	* sysdeps/powerpc/powerpc32/power4/memset.S: Likewise.
	* sysdeps/powerpc/powerpc32/power6/memset.S: Likewise.
	* sysdeps/powerpc/powerpc32/power7/memset.S: Likewise.
2013-10-04 10:41:35 +09:30
Alan Modra
759cfef3ac PowerPC LE memcpy
http://sourceware.org/ml/libc-alpha/2013-08/msg00103.html

LIttle-endian support for memcpy.  I spent some time cleaning up the
64-bit power7 memcpy, in order to avoid the extra alignment traps
power7 takes for little-endian.  It probably would have been better
to copy the linux kernel version of memcpy.

	* sysdeps/powerpc/powerpc32/power4/memcpy.S: Add little endian support.
	* sysdeps/powerpc/powerpc32/power6/memcpy.S: Likewise.
	* sysdeps/powerpc/powerpc32/power7/memcpy.S: Likewise.
	* sysdeps/powerpc/powerpc32/power7/mempcpy.S: Likewise.
	* sysdeps/powerpc/powerpc64/memcpy.S: Likewise.
	* sysdeps/powerpc/powerpc64/power4/memcpy.S: Likewise.
	* sysdeps/powerpc/powerpc64/power6/memcpy.S: Likewise.
	* sysdeps/powerpc/powerpc64/power7/memcpy.S: Likewise.
	* sysdeps/powerpc/powerpc64/power7/mempcpy.S: Likewise.  Make better
	use of regs.  Use power7 mtocrf.  Tidy function tails.
2013-10-04 10:41:24 +09:30
Alan Modra
fe6e95d717 PowerPC LE memcmp
http://sourceware.org/ml/libc-alpha/2013-08/msg00102.html

This is a rather large patch due to formatting and renaming.  The
formatting changes were to make it possible to compare power7 and
power4 versions of memcmp.  Using different register defines came
about while I was wrestling with the code, trying to find spare
registers at one stage.  I found it much simpler if we refer to a reg
by the same name throughout a function, so it's better if short-term
multiple use regs like rTMP are referred to using their register
number.  I made the cr field usage changes when attempting to reload
rWORDn regs in the exit path to byte swap before comparing when
little-endian.  That proved a bad idea due to the pipelining involved
in the main loop;  Offsets to reload the regs were different first
time around the loop..  Anyway, I left the cr field usage changes in
place for consistency.

Aside from these more-or-less cosmetic changes, I fixed a number of
places where an early exit path restores regs unnecessarily, removed
some dead code, and optimised one or two exits.

	* sysdeps/powerpc/powerpc64/power7/memcmp.S: Add little-endian support.
	Formatting.  Consistently use rXXX register defines or rN defines.
	Use early exit labels that avoid restoring unused non-volatile regs.
	Make cr field use more consistent with rWORDn compares.  Rename
	regs used as shift registers for unaligned loop, using rN defines
	for short lifetime/multiple use regs.
	* sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise.
	* sysdeps/powerpc/powerpc32/power7/memcmp.S: Likewise.  Exit with
	addi 1,1,64 to pop stack frame.  Simplify return value code.
	* sysdeps/powerpc/powerpc32/power4/memcmp.S: Likewise.
2013-10-04 10:40:56 +09:30
Alan Modra
664318c3eb PowerPC LE strchr
http://sourceware.org/ml/libc-alpha/2013-08/msg00101.html

Adds little-endian support to optimised strchr assembly.  I've also
tweaked the big-endian code a little.  In power7/strchr.S there's a
check in the tail of the function that we didn't match 0 before
finding a c match, done by comparing leading zero counts.  It's just
as valid, and quicker, to compare the raw output from cmpb.

Another little tweak is to use rldimi/insrdi in place of rlwimi for
the power7 strchr functions.  Since rlwimi is cracked, it is a few
cycles slower.  rldimi can be used on the 32-bit power7 functions
too.

	* sysdeps/powerpc/powerpc64/power7/strchr.S (strchr): Add little-endian
	support.  Correct typos, formatting.  Optimize tail.  Use insrdi
	rather than rlwimi.
	* sysdeps/powerpc/powerpc32/power7/strchr.S: Likewise.
	* sysdeps/powerpc/powerpc64/power7/strchrnul.S (__strchrnul): Add
	little-endian support.  Correct typos.
	* sysdeps/powerpc/powerpc32/power7/strchrnul.S: Likewise.  Use insrdi
	rather than rlwimi.
	* sysdeps/powerpc/powerpc64/strchr.S (rTMP4, rTMP5): Define.  Use
	in loop and entry code to keep "and." results.
	(strchr): Add little-endian support.  Comment.  Move cntlzd
	earlier in tail.
	* sysdeps/powerpc/powerpc32/strchr.S: Likewise.
2013-10-04 10:40:22 +09:30
Alan Modra
43b8401371 PowerPC LE strcpy
http://sourceware.org/ml/libc-alpha/2013-08/msg00100.html

The strcpy changes for little-endian are quite straight-forward, just
a matter of rotating the last word differently.

I'll note that the powerpc64 version of stpcpy is just begging to be
converted to use 64-bit loads and stores..

	* sysdeps/powerpc/powerpc64/strcpy.S: Add little-endian support:
	* sysdeps/powerpc/powerpc32/strcpy.S: Likewise.
	* sysdeps/powerpc/powerpc64/stpcpy.S: Likewise.
	* sysdeps/powerpc/powerpc32/stpcpy.S: Likewise.
2013-10-04 10:40:11 +09:30
Alan Modra
8a7413f9b0 PowerPC LE strcmp and strncmp
http://sourceware.org/ml/libc-alpha/2013-08/msg00099.html

More little-endian support.  I leave the main strcmp loops unchanged,
(well, except for renumbering rTMP to something other than r0 since
it's needed in an addi insn) and modify the tail for little-endian.

I noticed some of the big-endian tail code was a little untidy so have
cleaned that up too.

	* sysdeps/powerpc/powerpc64/strcmp.S (rTMP2): Define as r0.
	(rTMP): Define as r11.
	(strcmp): Add little-endian support.  Optimise tail.
	* sysdeps/powerpc/powerpc32/strcmp.S: Similarly.
	* sysdeps/powerpc/powerpc64/strncmp.S: Likewise.
	* sysdeps/powerpc/powerpc32/strncmp.S: Likewise.
	* sysdeps/powerpc/powerpc64/power4/strncmp.S: Likewise.
	* sysdeps/powerpc/powerpc32/power4/strncmp.S: Likewise.
	* sysdeps/powerpc/powerpc64/power7/strncmp.S: Likewise.
	* sysdeps/powerpc/powerpc32/power7/strncmp.S: Likewise.
2013-10-04 10:39:52 +09:30
Alan Modra
33ee81de05 PowerPC LE strnlen
http://sourceware.org/ml/libc-alpha/2013-08/msg00098.html

The existing strnlen code has a number of defects, so this patch is more
than just adding little-endian support.  The changes here are similar to
those for memchr.

	* sysdeps/powerpc/powerpc64/power7/strnlen.S (strnlen): Add
	little-endian support.  Remove unnecessary "are we done" tests.
	Handle "s" wrapping around zero and extremely large "size".
	Correct main loop count.  Handle single left-over word from main
	loop inline rather than by using small_loop.  Correct comments.
	Delete "zero" tail, use "end_max" instead.
	* sysdeps/powerpc/powerpc32/power7/strnlen.S: Likewise.
2013-10-04 10:39:42 +09:30
Alan Modra
db9b4570c5 PowerPC LE strlen
http://sourceware.org/ml/libc-alpha/2013-08/msg00097.html

This is the first of nine patches adding little-endian support to the
existing optimised string and memory functions.  I did spend some
time with a power7 simulator looking at cycle by cycle behaviour for
memchr, but most of these patches have not been run on cpu simulators
to check that we are going as fast as possible.  I'm sure PowerPC can
do better.  However, the little-endian support mostly leaves main
loops unchanged, so I'm banking on previous authors having done a
good job on big-endian..  As with most code you stare at long enough,
I found some improvements for big-endian too.

Little-endian support for strlen.  Like most of the string functions,
I leave the main word or multiple-word loops substantially unchanged,
just needing to modify the tail.

Removing the branch in the power7 functions is just a tidy.  .align
produces a branch anyway.  Modifying regs in the non-power7 functions
is to suit the new little-endian tail.

	* sysdeps/powerpc/powerpc64/power7/strlen.S (strlen): Add little-endian
	support.  Don't branch over align.
	* sysdeps/powerpc/powerpc32/power7/strlen.S: Likewise.
	* sysdeps/powerpc/powerpc64/strlen.S (strlen): Add little-endian support.
	Rearrange tmp reg use to suit.  Comment.
	* sysdeps/powerpc/powerpc32/strlen.S: Likewise.
2013-10-04 10:39:32 +09:30
Alan Modra
9b874b2f1e PowerPC ugly symbol versioning
http://sourceware.org/ml/libc-alpha/2013-08/msg00090.html

This patch fixes symbol versioning in setjmp/longjmp.  The existing
code uses raw versions, which results in wrong symbol versioning when
you want to build glibc with a base version of 2.19 for LE.

Note that the merging the 64-bit and 32-bit versions in novmx-lonjmp.c
and pt-longjmp.c doesn't result in GLIBC_2.0 versions for 64-bit, due
to the base in shlib_versions.

	* sysdeps/powerpc/longjmp.c: Use proper symbol versioning macros.
	* sysdeps/powerpc/novmx-longjmp.c: Likewise.
	* sysdeps/powerpc/powerpc32/bsd-_setjmp.S: Likewise.
	* sysdeps/powerpc/powerpc32/bsd-setjmp.S: Likewise.
	* sysdeps/powerpc/powerpc32/fpu/__longjmp.S: Likewise.
	* sysdeps/powerpc/powerpc32/fpu/setjmp.S: Likewise.
	* sysdeps/powerpc/powerpc32/mcount.c: Likewise.
	* sysdeps/powerpc/powerpc32/setjmp.S: Likewise.
	* sysdeps/powerpc/powerpc64/setjmp.S: Likewise.
	* nptl/sysdeps/unix/sysv/linux/powerpc/pt-longjmp.c: Likewise.
2013-10-04 10:38:28 +09:30
Anton Blanchard
be1e5d3113 PowerPC LE setjmp/longjmp
http://sourceware.org/ml/libc-alpha/2013-08/msg00089.html

Little-endian fixes for setjmp/longjmp.  When writing these I noticed
the setjmp code corrupts the non volatile VMX registers when using an
unaligned buffer.  Anton fixed this, and also simplified it quite a
bit.

The current code uses boilerplate for the case where we want to store
16 bytes to an unaligned address.  For that we have to do a
read/modify/write of two aligned 16 byte quantities.  In our case we
are storing a bunch of back to back data (consective VMX registers),
and only the start and end of the region need the read/modify/write.

	[BZ #15723]
	* sysdeps/powerpc/jmpbuf-offsets.h: Comment fix.
	* sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S: Correct
	_dl_hwcap access for little-endian.
	* sysdeps/powerpc/powerpc32/fpu/setjmp-common.S: Likewise.  Don't
	destroy vmx regs when saving unaligned.
	* sysdeps/powerpc/powerpc64/__longjmp-common.S: Correct CR load.
	* sysdeps/powerpc/powerpc64/setjmp-common.S: Likewise CR save.  Don't
	destroy vmx regs when saving unaligned.
2013-10-04 10:37:59 +09:30
Alan Modra
fef13a78ea PowerPC floating point little-endian [15 of 15]
http://sourceware.org/ml/libc-alpha/2013-07/msg00206.html

The union loses when little-endian.

	* sysdeps/powerpc/powerpc32/power4/hp-timing.h (HP_TIMING_NOW):
	Don't use a union to pack hi/low value.
2013-10-04 10:37:27 +09:30
Anton Blanchard
76a66d510a PowerPC floating point little-endian [14 of 15]
http://sourceware.org/ml/libc-alpha/2013-07/msg00205.html

These all wrongly specified float constants in a 64-bit word.

	* sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Correct float constants
	for little-endian.
	* sysdeps/powerpc/powerpc64/fpu/s_floorf.S: Likewise.
	* sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S: Likewise.
	* sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Likewise.
	* sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Likewise.
	* sysdeps/powerpc/powerpc64/fpu/s_truncf.S: Likewise.
2013-10-04 10:36:24 +09:30
Alan Modra
6a31fe7f9c PowerPC floating point little-endian [13 of 15]
http://sourceware.org/ml/libc-alpha/2013-08/msg00088.html

	* sysdeps/powerpc/powerpc32/fpu/s_roundf.S: Increase alignment of
	constants to usual value for .cst8 section, and remove redundant
	high address load.
	* sysdeps/powerpc/powerpc32/power4/fpu/s_llround.S: Use float
	constant for 0x1p52.  Load little-endian words of double from
	correct stack offsets.
2013-10-04 10:35:54 +09:30
Alan Modra
7b88401f3b PowerPC floating point little-endian [12 of 15]
http://sourceware.org/ml/libc-alpha/2013-08/msg00087.html

Fixes for little-endian in 32-bit assembly.

	* sysdeps/powerpc/sysdep.h (LOWORD, HIWORD, HISHORT): Define.
	* sysdeps/powerpc/powerpc32/fpu/s_copysign.S: Load little-endian
	words of double from correct stack offsets.
	* sysdeps/powerpc/powerpc32/fpu/s_copysignl.S: Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_lrint.S: Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_lround.S: Likewise.
	* sysdeps/powerpc/powerpc32/power4/fpu/s_llrint.S: Likewise.
	* sysdeps/powerpc/powerpc32/power4/fpu/s_llrintf.S: Likewise.
	* sysdeps/powerpc/powerpc32/power5+/fpu/s_llround.S: Likewise.
	* sysdeps/powerpc/powerpc32/power5+/fpu/s_lround.S: Likewise.
	* sysdeps/powerpc/powerpc32/power5/fpu/s_isnan.S: Likewise.
	* sysdeps/powerpc/powerpc32/power6/fpu/s_isnan.S: Likewise.
	* sysdeps/powerpc/powerpc32/power6/fpu/s_llrint.S: Likewise.
	* sysdeps/powerpc/powerpc32/power6/fpu/s_llrintf.S: Likewise.
	* sysdeps/powerpc/powerpc32/power6/fpu/s_llround.S: Likewise.
	* sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S: Likewise.
	* sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S: Likewise.
	* sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S: Likewise.
	* sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Use HISHORT.
	* sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise.
2013-10-04 10:35:43 +09:30
Alan Modra
9c008155b7 PowerPC floating point little-endian [11 of 15]
http://sourceware.org/ml/libc-alpha/2013-07/msg00202.html

Another little-endian fix.

	* sysdeps/powerpc/fpu_control.h (_FPU_GETCW): Rewrite using
	64-bit int/double union.
	(_FPU_SETCW): Likewise.
	* sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_GET_DI_FPSCR): Likewise.
	(_SET_DI_FPSCR, _GET_SI_FPSCR, _SET_SI_FPSCR): Likewise.
2013-10-04 10:35:21 +09:30
Alan Modra
da13146da1 PowerPC floating point little-endian [10 of 15]
http://sourceware.org/ml/libc-alpha/2013-07/msg00201.html

These two functions oddly test x+1>0 when a double x is >= 0.0, and
similarly when x is negative.  I don't see the point of that since the
test should always be true.  I also don't see any need to convert x+1
to integer rather than simply using xr+1.  Note that the standard
allows these functions to return any value when the input is outside
the range of long long, but it's not too hard to prevent xr+1
overflowing so that's what I've done.

(With rounding mode FE_UPWARD, x+1 can be a lot more than what you
might naively expect, but perhaps that situation was covered by the
x - xrf < 1.0 test.)

	* sysdeps/powerpc/fpu/s_llround.c (__llround): Rewrite.
	* sysdeps/powerpc/fpu/s_llroundf.c (__llroundf): Rewrite.
2013-10-04 10:35:10 +09:30
Alan Modra
603e84104c PowerPC floating point little-endian [9 of 15]
http://sourceware.org/ml/libc-alpha/2013-07/msg00200.html

This works around the fact that vsx is disabled in current
little-endian gcc.  Also, float constants take 4 bytes in memory
vs. 16 bytes for vector constants, and we don't need to write one lot
of masks for double (register format) and another for float (mem
format).

	* sysdeps/powerpc/fpu/s_float_bitwise.h (__float_and_test28): Don't
	use vector int constants.
	(__float_and_test24, __float_and8, __float_get_exp): Likewise.
2013-10-04 10:34:57 +09:30
Anton Blanchard
4a28b3ca4b PowerPC floating point little-endian [8 of 15]
http://sourceware.org/ml/libc-alpha/2013-07/msg00199.html

Corrects floating-point environment code for little-endian.

	* sysdeps/powerpc/fpu/fenv_libc.h (fenv_union_t): Replace int
	array with long long.
	* sysdeps/powerpc/fpu/e_sqrt.c (__slow_ieee754_sqrt): Adjust.
	* sysdeps/powerpc/fpu/e_sqrtf.c (__slow_ieee754_sqrtf): Adjust.
	* sysdeps/powerpc/fpu/fclrexcpt.c (__feclearexcept): Adjust.
	* sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Adjust.
	* sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Adjust.
	* sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Adjust.
	* sysdeps/powerpc/fpu/feholdexcpt.c (feholdexcept): Adjust.
	* sysdeps/powerpc/fpu/fesetenv.c (__fesetenv): Adjust.
	* sysdeps/powerpc/fpu/feupdateenv.c (__feupdateenv): Adjust.
	* sysdeps/powerpc/fpu/fgetexcptflg.c (__fegetexceptflag): Adjust.
	* sysdeps/powerpc/fpu/fraiseexcpt.c (__feraiseexcept): Adjust.
	* sysdeps/powerpc/fpu/fsetexcptflg.c (__fesetexceptflag): Adjust.
	* sysdeps/powerpc/fpu/ftestexcept.c (fetestexcept): Adjust.
2013-10-04 10:34:26 +09:30
Anton Blanchard
2ca85d2bbb PowerPC floating point little-endian [7 of 15]
http://sourceware.org/ml/libc-alpha/2013-08/msg00086.html

	* sysdeps/powerpc/bits/mathinline.h (__signbitf): Use builtin.
	(__signbit): Likewise.  Correct for little-endian.
	(__signbitl): Call __signbit.
	(lrint): Correct for little-endian.
	(lrintf): Call lrint.
2013-10-04 10:34:14 +09:30
Alan Modra
765714cafc PowerPC floating point little-endian [3 of 15]
http://sourceware.org/ml/libc-alpha/2013-08/msg00083.html

Further replacement of ieee854 macros and unions.  These files also
have some optimisations for comparison against 0.0L, infinity and nan.
Since the ABI specifies that the high double of an IBM long double
pair is the value rounded to double, a high double of 0.0 means the
low double must also be 0.0.  The ABI also says that infinity and
nan are encoded in the high double, with the low double unspecified.
This means that tests for 0.0L, +/-Infinity and +/-NaN need only check
the high double.

	* sysdeps/ieee754/ldbl-128ibm/e_atan2l.c (__ieee754_atan2l): Rewrite
	all uses of ieee854 long double macros and unions.  Simplify tests
	for long doubles that are fully specified by the high double.
	* sysdeps/ieee754/ldbl-128ibm/e_gammal_r.c (__ieee754_gammal_r):
	Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_ilogbl.c (__ieee754_ilogbl): Likewise.
	Remove dead code too.
	* sysdeps/ieee754/ldbl-128ibm/e_jnl.c (__ieee754_jnl): Likewise.
	(__ieee754_ynl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_log10l.c (__ieee754_log10l): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_logl.c (__ieee754_logl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_powl.c (__ieee754_powl): Likewise.
	Remove dead code too.
	* sysdeps/ieee754/ldbl-128ibm/k_tanl.c (__kernel_tanl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_expm1l.c (__expm1l): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_frexpl.c (__frexpl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_isinf_nsl.c (__isinf_nsl): Likewise.
	Simplify.
	* sysdeps/ieee754/ldbl-128ibm/s_isinfl.c (___isinfl): Likewise.
	Simplify.
	* sysdeps/ieee754/ldbl-128ibm/s_log1pl.c (__log1pl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_modfl.c (__modfl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_nextafterl.c (__nextafterl): Likewise.
	Comment on variable precision.
	* sysdeps/ieee754/ldbl-128ibm/s_nexttoward.c (__nexttoward): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_nexttowardf.c (__nexttowardf):
	Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_remquol.c (__remquol): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_scalblnl.c (__scalblnl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_scalbnl.c (__scalbnl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_tanhl.c (__tanhl): Likewise.
	* sysdeps/powerpc/fpu/libm-test-ulps: Adjust tan_towardzero ulps.
2013-10-04 10:32:36 +09:30
Alan Modra
4ebd120cd9 PowerPC floating point little-endian [2 of 15]
http://sourceware.org/ml/libc-alpha/2013-08/msg00082.html

This patch replaces occurrences of GET_LDOUBLE_* and SET_LDOUBLE_*
macros, and union ieee854_long_double_shape_type in ldbl-128ibm/,
and a stray one in the 32-bit fpu support.  These files have no
significant changes apart from rewriting the long double bit access.

	* sysdeps/ieee754/ldbl-128ibm/math_ldbl.h (ldbl_high): Define.
	* sysdeps/ieee754/ldbl-128ibm/e_acoshl.c (__ieee754_acoshl): Rewrite
	all uses of ieee854 long double macros and unions.
	* sysdeps/ieee754/ldbl-128ibm/e_acosl.c (__ieee754_acosl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_asinl.c (__ieee754_asinl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_atanhl.c (__ieee754_atanhl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_coshl.c (__ieee754_coshl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_log2l.c (__ieee754_log2l): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_rem_pio2l.c (__ieee754_rem_pio2l):
	Likewise.
	* sysdeps/ieee754/ldbl-128ibm/e_sinhl.c (__ieee754_sinhl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/k_cosl.c (__kernel_cosl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/k_sincosl.c (__kernel_sincosl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/k_sinl.c (__kernel_sinl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_asinhl.c (__asinhl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_atanl.c (__atanl): Likewise.
	Simplify sign and nan test too.
	* sysdeps/ieee754/ldbl-128ibm/s_cosl.c (__cosl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_fabsl.c (__fabsl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_finitel.c (___finitel): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_fpclassifyl.c (___fpclassifyl):
	Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_isnanl.c (___isnanl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_issignalingl.c (__issignalingl):
	Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_logbl.c (__logbl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_signbitl.c (___signbitl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_sincosl.c (__sincosl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_sinl.c (__sinl): Likewise.
	* sysdeps/ieee754/ldbl-128ibm/s_tanl.c (__tanl): Likewise.
	* sysdeps/powerpc/powerpc32/power7/fpu/s_logbl.c (__logbl): Likewise.
2013-10-04 10:32:19 +09:30
Adhemerval Zanella
5ebbff8fd1 PowerPC: Fix POINTER_CHK_GUARD thread register for PPC64 2013-09-25 13:43:04 -05:00
Carlos O'Donell
c61b4d41c9 BZ #15754: CVE-2013-4788
The pointer guard used for pointer mangling was not initialized for
static applications resulting in the security feature being disabled.
The pointer guard is now correctly initialized to a random value for
static applications. Existing static applications need to be
recompiled to take advantage of the fix.

The test tst-ptrguard1-static and tst-ptrguard1 add regression
coverage to ensure the pointer guards are sufficiently random
and initialized to a default value.
2013-09-23 00:52:09 -04:00
Andreas Schwab
5bb43a4319 Make __ffs hidden 2013-09-20 21:25:31 +02:00
Joseph Myers
24d22e65b3 e500 port: fpu_control.h. 2013-09-18 14:47:49 +00:00
Joseph Myers
2e071de0f7 e500 port: setjmp/longjmp. 2013-09-18 14:46:57 +00:00