AuroraMiddleware/v8
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212 Commits

Author SHA1 Message Date
alph
cfcc019aff [x64] Implemennt vroundsd AVX instruction. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1420653005

Cr-Commit-Position: refs/heads/master@{#31493}
 2015-10-23 07:49:26 +00:00
alph
7ae54d2b82 [x64] Implement vsqrtsd AVX instruction. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1420543003

Cr-Commit-Position: refs/heads/master@{#31490}
 2015-10-23 06:47:46 +00:00
alph
ce8a22a86f [x64] Make MathMinMax use AVX instructions when available. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1421733003

Cr-Commit-Position: refs/heads/master@{#31488}
 2015-10-23 06:10:55 +00:00
alph
87c468383a [x64] Implement vpcmpeqd, vpslld, vpsrld AVX instructions. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1419983002

Cr-Commit-Position: refs/heads/master@{#31452}
 2015-10-22 07:01:11 +00:00
alph
fa60b82b19 [x64] Replace movaps with appropriate vmov* instructions when AVX is enabled. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1416663004

Cr-Commit-Position: refs/heads/master@{#31391}
 2015-10-20 04:58:16 +00:00
alph
19aa500567 [x64] Emit vmovss when AVX is enabled. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1413183002

Cr-Commit-Position: refs/heads/master@{#31385}
 2015-10-19 20:35:36 +00:00
alph
a57c62f679 [x64] Emit vmovmskpd when AVX is enabled. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1411023002

Cr-Commit-Position: refs/heads/master@{#31350}
 2015-10-18 16:12:35 +00:00
alph
9131cf7ec2 [x64] Emit vcvtss2sd & vcvtsd2ss when AVX is enabled. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1411743003

Cr-Commit-Position: refs/heads/master@{#31349}
 2015-10-18 16:11:31 +00:00
alph
0138b2652f [x64] Emit vcvttsd2si[q] when AVX is enabled. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1406353003

Cr-Commit-Position: refs/heads/master@{#31348}
 2015-10-18 15:43:41 +00:00
alph
5d9c7ab648 [x64] Implement vmovd and vmovq AVX instructions. 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1409873002

Cr-Commit-Position: refs/heads/master@{#31322}
 2015-10-16 05:20:46 +00:00
alph
7cdcf0b1bc [x64] Use vcvtlsi2sd when AVX is enabled 
BUG=v8:4406
LOG=N

Committed: https://crrev.com/adcbe619a959fe1d8f21d06fbf5984868c4f6b9a
Cr-Commit-Position: refs/heads/master@{#31276}

Review URL: https://codereview.chromium.org/1404903004

Cr-Commit-Position: refs/heads/master@{#31315}
 2015-10-15 17:50:36 +00:00
alph
ad1e057049 Revert of [x64] Use vcvtlsi2sd when AVX is enabled (patchset #1 id:1 of https://codereview.chromium.org/1404903004/ ) 
Reason for revert:
Caused a crash on Windows

Original issue's description:
> [x64] Use vcvtlsi2sd when AVX is enabled
>
> BUG=v8:4406
> LOG=N
>
> Committed: https://crrev.com/adcbe619a959fe1d8f21d06fbf5984868c4f6b9a
> Cr-Commit-Position: refs/heads/master@{#31276}

TBR=bmeurer@chromium.org,danno@chromium.org,yurys@chromium.org
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=v8:4406

Review URL: https://codereview.chromium.org/1396283004

Cr-Commit-Position: refs/heads/master@{#31277}
 2015-10-15 06:08:52 +00:00
alph
adcbe619a9 [x64] Use vcvtlsi2sd when AVX is enabled 
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1404903004

Cr-Commit-Position: refs/heads/master@{#31276}
 2015-10-15 05:53:24 +00:00
alph
5cda2bcfab [x64] Use vmovapd and vmovsd when AVX is enabled. 
R=bmeurer@chromium.org
BUG=v8:4406
LOG=N

Review URL: https://codereview.chromium.org/1391963005

Cr-Commit-Position: refs/heads/master@{#31275}
 2015-10-15 04:15:00 +00:00
yangguo
1667c15e37 Debugger: move implementation to a separate folder. 
R=cbruni@chromium.org

Review URL: https://codereview.chromium.org/1265923002

Cr-Commit-Position: refs/heads/master@{#29951}
 2015-07-31 11:08:15 +00:00
ishell
fec3c9cba6 TypeofMode replaces TypeofState and ContextualMode. 
NON_CONTEXTUAL ~> INSIDE_TYPEOF
CONTEXTUAL ~> NOT_INSIDE_TYPEOF

Review URL: https://codereview.chromium.org/1227893005

Cr-Commit-Position: refs/heads/master@{#29611}
 2015-07-13 13:39:43 +00:00
Weiliang Lin
38e764f7ac [x86] Introduce vandps/vandpd/vxorps/vxorpd. 
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/1072343002

Cr-Commit-Position: refs/heads/master@{#27768}
 2015-04-11 00:58:38 +00:00
jing.bao
584a351484 [x64] Introduce BMI instructions. 
BUG=v8:4015
LOG=n

Review URL: https://codereview.chromium.org/1040603002

Cr-Commit-Position: refs/heads/master@{#27648}
 2015-04-08 07:15:59 +00:00
bmeurer
8dad78cdbd [turbofan] Add backend support for float32 operations. 
This adds the basics necessary to support float32 operations in TurboFan.
The actual functionality required to detect safe float32 operations will
be added based on this later. Therefore this does not affect production
code except for some cleanup/refactoring.

In detail, this patchset contains the following features:
- Add support for float32 operations to arm, arm64, ia32 and x64
  backends.
- Add float32 machine operators.
- Add support for float32 constants to simplified lowering.
- Handle float32 representation for phis in simplified lowering.

In addition, contains the following (related) cleanups:
- Fix/unify naming of backend instructions.
- Use AVX comparisons when available.
- Extend ArchOpcodeField to 9 bits (required for arm64).
- Refactor some code duplication in instruction selectors.

BUG=v8:3589
LOG=n
R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/1044793002

Cr-Commit-Position: refs/heads/master@{#27509}
 2015-03-30 07:34:04 +00:00
yangguo
019096f829 Serializer: move to a subfolder and clean up includes. 
R=jochen@chromium.org

Review URL: https://codereview.chromium.org/1041743002

Cr-Commit-Position: refs/heads/master@{#27501}
 2015-03-27 15:29:07 +00:00
Benedikt Meurer
3aa206b865 [turbofan] Turn Math.clz32 into an inlinable builtin. 
R=dcarney@chromium.org, yangguo@chromium.org
BUG=v8:3952
LOG=n

Review URL: https://codereview.chromium.org/1021183002

Cr-Commit-Position: refs/heads/master@{#27329}
 2015-03-20 08:37:34 +00:00
bmeurer
99f8d57f3c [turbofan] Introduce optional Float64Min and Float64Max machine operators. 
Basically recognize certain x < y ? x : y constructs and turn that into
Float64Min/Float64Max operations, if the target machine supports that.
On x86 we lower to (v)minsd/(v)maxsd.

R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/998283002

Cr-Commit-Position: refs/heads/master@{#27160}
 2015-03-12 14:07:39 +00:00
bmeurer
4436c2642a [turbofan] Support for %_DoubleHi, %_DoubleLo and %_ConstructDouble. 
This adds support for the double bits intrinsics to TurboFan, and is
a first step towards fast Math functions inlined into TurboFan code
or even compiled by themselves with TurboFan.

Review URL: https://codereview.chromium.org/974313002

Cr-Commit-Position: refs/heads/master@{#27006}
 2015-03-05 09:22:38 +00:00
Weiliang Lin
50c4d8826b [x64] introduce vex prefix version of float64 arithmetic binop 
BUG=
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/764863002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

Cr-Commit-Position: refs/heads/master@{#25582}
 2014-12-01 10:45:18 +00:00
Weiliang Lin
83a635e0d7 [x64] Introduce FMA3 instructions on scalar data elements. 
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/757503002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

Cr-Commit-Position: refs/heads/master@{#25509}
 2014-11-26 05:31:55 +00:00
bmeurer@chromium.org
498920f91c [turbofan] Also optimize unsigned division by constant. 
TEST=cctest,mjsunit,unittests
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/697663003

Cr-Commit-Position: refs/heads/master@{#25061}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25061 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-11-03 10:05:46 +00:00
bmeurer@chromium.org
8c5fdd0575 IA: Double arithmetic binops support memory operand 
BUG=
R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/662813002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

Cr-Commit-Position: refs/heads/master@{#25052}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25052 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-11-03 05:57:17 +00:00
bmeurer@chromium.org
0854ee289b [x64] simply tweak materialization of float/double constants 
port 24485
Fixed a bug of "psllq" instruction in x64

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/658813003

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24673 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-10-17 04:18:38 +00:00
dcarney@chromium.org
3396c2badd [turbofan] IA: TruncateFloat64ToFloat32 supports mem operand 
BUG=
R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/639283003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24541 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-10-13 07:12:57 +00:00
dcarney@chromium.org
c9c4b931f0 fix imul(reg, op, imm) emission on x64 
R=bmeurer@chromium.org

BUG=

Review URL: https://codereview.chromium.org/619903005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24395 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-10-02 12:22:36 +00:00
dcarney@chromium.org
944858e7d5 [turbofan] support all shift operands on x64 
R=bmeurer@chromium.org

BUG=

Review URL: https://codereview.chromium.org/615223005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24388 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-10-02 09:08:09 +00:00
dcarney@chromium.org
49ffb141d9 [turbofan] IA: Uint32ToFloat64 supports mem operand. 
BUG=
R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/583963002

Patch from Jing Bao <jing.bao@intel.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24318 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-09-30 10:24:11 +00:00
bmeurer@chromium.org
0e2ae4b782 [x64] three operand imul supports first operand in memory location 
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/596643003

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24199 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-09-25 06:37:23 +00:00
titzer@chromium.org
8892385565 [turbofan] IA: Float64ToUint32 supports mem operand 
BUG=
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/582713002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24092 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-09-19 14:25:13 +00:00
verwaest@chromium.org
30c3981c2c Move IC code into a subdir and move ic-compilation related code from stub-cache into ic-compiler 
BUG=
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/483683005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23306 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-22 11:43:39 +00:00
danno@chromium.org
a1383e2250 Land the Fan (disabled) 
R=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/426233002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22709 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-30 13:54:45 +00:00
svenpanne@chromium.org
018ef484b9 More OStreamsUse OStreams more often. 
This is a mostly mechanical CL (more than 90% Emacs macros and
query-replace-regexp) moving FILE*/StringStream*-based APIs to
OStream-based APIs. There are a few places where this had to stop,
otherwise the CL would be even bigger, but this can easily and
incrementally cleaned up later.

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/363323003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22232 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-07 09:57:29 +00:00
jochen@chromium.org
56a486c322 Use full include paths everywhere 
- this avoids using relative include paths which are forbidden by the style guide
- makes the code more readable since it's clear which header is meant
- allows for starting to use checkdeps

BUG=none
R=jkummerow@chromium.org, danno@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/304153016

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21625 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-06-03 08:12:43 +00:00
yangguo@chromium.org
6fd69c2476 Remove special debug ExternalReferences. 
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/296043002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21421 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-05-22 07:57:33 +00:00
yangguo@chromium.org
cb2f43cb14 Always include debugger support. 
Motivation: we do not have test coverage for debuggersupport=off.

R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/256653004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20969 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-25 11:00:37 +00:00
yangguo@chromium.org
5e02daca21 Fix unused variable warnings. 
TBR=jarin@chromium.org

Review URL: https://codereview.chromium.org/238543008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20797 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-16 11:50:24 +00:00
yangguo@chromium.org
17b33fa1da Handlify code allocation. 
R=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/235153003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20795 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-16 11:38:56 +00:00
svenpanne@chromium.org
b460910644 x64: Make sure that the upper half of a 64bit register contains 0 for int32 values. 
BUG=360611
LOG=y
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/225393005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20664 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-11 06:32:06 +00:00
haitao.feng@intel.com
329b0449d5 Introduce rolp, rorp, rclp, rcrp, shlp, shrp and sarp for x64 port 
R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/214493002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20320 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-28 04:55:00 +00:00
haitao.feng@intel.com
6130206c2f Introduce andp, notp, orp and xorp for x64 port 
R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/205343013

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20276 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-26 12:15:35 +00:00
haitao.feng@intel.com
687e524983 Introduce leap, movzxbp, movzxwp, repmovsp and xchgp for x64 port 
R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/211413008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20273 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-26 11:17:53 +00:00
haitao.feng@intel.com
479248f3d8 Introduce cmpp, decp, incp, negp, sbbp and testp for x64 port 
R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/207833002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20260 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-26 01:13:09 +00:00
haitao.feng@intel.com
c867df5181 Introduce addp, idivp, imulp and subp for x64 port 
R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/196893003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20140 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-21 02:42:10 +00:00
haitao.feng@intel.com
e812aca6b3 Introduce Push and Pop macro instructions for x64 
R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/199903002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20049 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-19 08:59:04 +00:00
mstarzinger@chromium.org
9ab32061ed Print properly signed displacement in disassembler. 
R=titzer@chromium.org
BUG=

Review URL: https://codereview.chromium.org/178193028

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19667 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-05 09:28:26 +00:00
yangguo@chromium.org
6f95c0b11b [x64] add disasm for two fp instructions 
BUG=
R=yangguo@chromium.org

Review URL: https://codereview.chromium.org/146583002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19022 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-02-03 08:13:12 +00:00
svenpanne@chromium.org
c524efd759 Introduce addps/subps/mulps/divps for IA32/X64 
BUG=
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/60093005

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@17842 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-11-18 15:24:41 +00:00
svenpanne@chromium.org
74ad230a8e Introduce orps for IA32/X64 
BUG=
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/53573004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@17479 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-11-05 12:04:46 +00:00
svenpanne@chromium.org
19a2e803bb Introduce andps for IA32/X64 
replace andpd and pand in Math.abs

BUG=
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/44153002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@17413 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-10-28 10:38:40 +00:00
svenpanne@chromium.org
258cee8f72 Fixed bug in extractps instruction on ia32 and x64 
This is a fixed version of https://codereview.chromium.org/27097002/
which was originally written by weiliang.lin@intel.com.

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/27301003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@17217 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-10-15 12:51:58 +00:00
dcarney@chromium.org
c57236e288 remove HEAP from tests 
R=svenpanne@chromium.org
BUG=

Review URL: https://codereview.chromium.org/24169005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@16819 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-09-19 09:46:15 +00:00
dcarney@chromium.org
baf6add9f0 bulk replace Isolate::Current in tests 
R=svenpanne@chromium.org
BUG=

Review URL: https://codereview.chromium.org/23534067

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@16817 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-09-19 09:17:13 +00:00
bmeurer@chromium.org
ee718489fe Drop unused rdtsc instruction. 
We do not use rdtsc anywhere and we won't ever use that in the
future, as it is totally unusable with multicore and out of
order execution.

R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/23112016

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@16268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-08-22 11:58:20 +00:00
mstarzinger@chromium.org
dd70ce29d1 Unify the way cctest initalizes the VM for each test case. 
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/13483017

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14199 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-04-10 08:29:39 +00:00
svenpanne@chromium.org
fb6776e84a Made Isolate a mandatory parameter for everything Handle-related. 
Unified parameter order of CreateHandle with the rest of v8 on the way. A few
Isolate::Current()s had to be introduced, which is not nice, and not every place
will win a beauty contest, but we can clean this up later easily in smaller steps.

Review URL: https://codereview.chromium.org/12300018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13717 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-02-25 14:46:09 +00:00
yangguo@chromium.org
bf630e2371 Fix MinGW-w64 GCC 4.7 compilation 
Contributed by net147@gmail.com

BUGS=
TEST=

Review URL: https://chromiumcodereview.appspot.com/10019012

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11357 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-04-17 14:53:06 +00:00
erik.corry@gmail.com
b8691a78af Clean up multi byte nop support on x64 to more closely match IA32. 
Fix missing instruction in disassembler.
Fix wrong disassembly of multi-byte NOP on x64
Add test of disassembler on 64 bit!
Review URL: http://codereview.chromium.org/8773039

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10147 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-12-05 08:58:01 +00:00