Commit Graph

176 Commits

Author SHA1 Message Date
Ng Zhi An
e2f666184c [x64] Add some ops to disasm tests
While working on some AVX stuff, saw that these ops were missing from
the test cases.

Change-Id: Ie41be465a0715323096c6549b21aa9e994eaac3e
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2137472
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#67072}
2020-04-09 01:16:07 +00:00
Ng Zhi An
043ac205ec [wasm-simd][x64] Bitmask instructions
Implement i8x16.bitmask, i16x8.bitmask, i32x4.bitmask on x64.

Bug: v8:10308
Change-Id: Id47cb229de77d80d0a7ec91f4862a91258ff1979
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2127317
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#67022}
2020-04-06 18:33:15 +00:00
Ng Zhi An
2f83184db3 [wasm-simd][x64] Add AVX codegen
For a bunch of s8x16, s16x2 and s32x4 shuffle ops (generated by
s8x16shuffle).

Bug: v8:9561
Change-Id: I0e5cd8a90edba8bc15918c0ca1dc830475db2769
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2110952
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66865}
2020-03-25 20:12:03 +00:00
Ng Zhi An
307490b012 [wasm-simd][x64] Add AVX codegen for i32x4 conversions and hadd
Bug: v8:9561
Change-Id: I4a2c6217dea540b81256dcc833412da573f54795
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2069403
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66587}
2020-03-04 19:33:11 +00:00
Ng Zhi An
63d1879d94 [wasm-simd][x64] Add AVX codegen for all true ops
Bug: v8:9561
Change-Id: Ic57b38cefbdc21045d71601c67995d3568634c27
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2069400
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66479}
2020-02-27 10:38:22 +00:00
Ng Zhi An
b31ef394b6 [x64] Extract packed absolute value instructions
The AVX versions of pabsb, pabsw, and pabsd have an incorrect function
signature, they should only have two operands. So, extract them into
another macro list. And separately generate the right signatures and
implementations. Also update the disasm and tests.

Bug: v8:10233
Change-Id: I95ee0bf12bb285d10324ecedcec28e941f64d2dc
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2063199
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66382}
2020-02-21 03:48:28 +00:00
Ng Zhi An
9fba0cb07e [cleanup] Move some instructions into macro lists
These instructions were probably leftover from an earlier cleanup. We
can move them into respective macro lists, then delete away the
redundant declarations, definitions, disasm, and tests.

We were missing disasm tests for SSE2_INSTRUCTION_LIST_SD, so add that
in.

Change-Id: I8f27beaf57e7a338097690073910a0863f00b26a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2036833
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66123}
2020-02-05 01:57:17 +00:00
Ng Zhi An
d05d335e6a Fix assembler for sqrtpd
The assembly of sqrtpd when using Sqrtpd macro was wrong, since
Sqrtpd(xmm1, xmm1) will incorrect generated vsqrtpd(xmm1, xmm1, xmm1),
which is nonsensical, since vsqrtpd only takes two operands. The
expected instruction should be vsqrtpd(xmm1, xmm0, xmm1) in terms of the
encoding, which is vsqrtpd(xmm1, xmm1).

So, move sqrtpd and cvtps2dq out into their own macro list, because
they have two operands in their AVX form, unlike the rest of the
instructions in SSE2_INSTRUCTION_LIST.

Also updated disasm and tests to use this new list.

Fixed: v8:10170
Change-Id: Ia9343c9a3ae64596bbc876744556e1dcea2a443b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2032195
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66088}
2020-02-03 18:53:19 +00:00
Andreas Haas
911f38c411 [x64] Introduce negb and negw instructions
This CL introduces the negb and negw instructions (8-bit and 16-bit
versions of neg) in the x64 assembler. These instructions are needed to
implement I32AtomicSub8U and similar WebAssembly instructions
efficiently.

The existing implementation was embedded in a generic macro, and it was
difficult to change it without introducing also the 8-bit and 16-bit
versions of many other instructions. This would have introduced a lot
of dead code. Instead this CL extracted the neg instructions from the
macro and implements them directly. This should be fine because the
assembler does not change much, and approachability of the code is
improved.

R=clemensb@chromium.org

Bug: v8:10108
Change-Id: I46099bbebd47f864311a67da3ba8ddc4fe4cd35d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2019165
Commit-Queue: Andreas Haas <ahaas@chromium.org>
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65989}
2020-01-27 09:45:55 +00:00
Andreas Haas
f506c609bd [x64] Implement xadd in the assembler
This CL introduces the xadd instruction to the x64 assembler so it can
be used to implement WebAssembly's AtomicAdd. This is done in a
separate CL though.

R=clemensb@chromium.org

Bug: v8:10108
Change-Id: I36dcb900ed4c39b23c4996328774780afd8b816a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2011105
Commit-Queue: Andreas Haas <ahaas@chromium.org>
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65879}
2020-01-21 09:54:45 +00:00
Ng Zhi An
8078d6518b Small fixes for AVX disassembly
Add missing disasm tests for vroundss and vpalignr.
Fix disasm for vinsertps and vpinsrq.

Change-Id: I0f3907761b998d27ec00435a569084724af54ae2
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1990140
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65799}
2020-01-16 01:55:31 +00:00
Ng Zhi An
06fa66fec6 Fix assembler and disassembler for vblendvpd
blendvpd should not be defined in the macro list, since the AVX version
has 4 operands, not 3.

Change-Id: Id020b460fa1a3510a91490f3b2286024cc6c5994
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1990139
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65771}
2020-01-14 22:59:09 +00:00
Ng Zhi An
d60809aaf5 [wasm-simd] Add AVX for some i64x2 instructions
Also add missing disasm for SSE4_2 instruction.

Bug: v8:9561
Change-Id: Idc8d3c0e59f0e9aff57ebdcc5774bba375828597
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1986386
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65769}
2020-01-14 21:26:48 +00:00
Ng Zhi An
acc96e1f6a [wasm-simd] Add AVX for movlhps and some avx codegen
Bug: v8:9561
Change-Id: I18c832737cbea89e08af2ca166de7b01b7fe51b0
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1986256
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65674}
2020-01-09 21:57:06 +00:00
Ng Zhi An
4273416561 [wasm-simd] Add AVX for pextrq
Bug: v8:9561
Change-Id: I2259e72829c0ad688284dcecef8aaf418ad53022
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1980503
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65643}
2020-01-08 19:10:04 +00:00
Ng Zhi An
fd53519035 [wasm-simd] AVX codegen for some conversion opcodes
Bug: v8:9561
Change-Id: Ie3231038312495c2d8f77062ee5b81b2b55ab4d7
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1980502
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65617}
2020-01-07 21:27:21 +00:00
Ng Zhi An
c855532af8 Move FMA opcodes into a list macro
Bug: v8:9415
Bug: v8:10021
Change-Id: I77c24b58f575b612e5422bfcb9bb7ab83986659a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1986249
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65616}
2020-01-07 19:05:37 +00:00
Ng Zhi An
7cfbcefb5c Fix assembler for packed move instructions
The AVX version should only take one argument, so these instructions have
to be split from the main list of SSE4 instructions, whose AVX version
have two arguments.

Bug: v8:9886
Change-Id: Ie37e060711babd7760547e2aa01c9c0fb0c728b5
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1986215
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65588}
2020-01-06 19:42:13 +00:00
Ng Zhi An
1effe529c2 [wasm-simd] Add AVX codegen
Mostly for f32x4 instructions.

Bug: v8:9561
Change-Id: I3a3dc06305acb9e336c494fc399cf5d21518c0e8
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1950488
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65382}
2019-12-09 10:49:07 +00:00
Ng Zhi An
277381d85e Collate packed shift data instructions into macro list
Bug: v8:10021
Change-Id: Ibececfd23b852d7cecf609f6ae1a4b01ea8b55f6
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1950485
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65361}
2019-12-06 10:51:40 +00:00
Ng Zhi An
4972b2c84c Add AVX for movddup and pinsrq
Bug: v8:9561
Change-Id: I39a3148570664909eb08f1559b2cb418477a6c15
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1948717
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65322}
2019-12-04 12:28:12 +00:00
Ng Zhi An
785fa6b412 [liftoff] Change FillStackSlotsWithZero to use bytes
Bug: v8:9909
Change-Id: I997ae6f19c580f08eb9ff8ee039e0dd647091616
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1947350
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65320}
2019-12-04 10:07:02 +00:00
Ng Zhi An
83fc8559fa [wasm-simd] AVX codegen for load splat
Bug: v8:9886
Change-Id: I321e93d02971c6ba568d9d7c52d464ffc2754665
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1929837
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Bill Budge <bbudge@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65277}
2019-12-02 10:07:23 +00:00
Ng Zhi An
5d80a202dd Add missing diasm and impl of AVX instr
This change includes splitting the existing SSE_INSTRUCTION_LIST into two:
1. sse instructions with two-operand AVX
2. sse instructions with three-operand AVX

Also a drive by fix for disasm of pblendw, the printing of imm8 doesn't
not require AND-ing with 3, since all 8 bits are significant.

Bug: v8:9561
Change-Id: I56c93a24bb9905ae6422698c793b27f3b9e66d8f
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1933593
Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65274}
2019-12-02 09:13:53 +00:00
Michael Starzinger
330445cee4 [test][x64] Test disassembly of indirect call again.
R=clemensb@chromium.org
TEST=cctest/test-disasm-x64/DisasmX64

Change-Id: I011d0d5e25c472c5a62ad73edd42165e55b34e2b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1900460
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Commit-Queue: Michael Starzinger <mstarzinger@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64809}
2019-11-06 14:38:41 +00:00
Dan Elphick
352bbb1279 Reland "Reland: [builtins] Move non-JS linkage builtins code objects into RO_SPACE"
This is a reland of 855591a54d

Fixes break in builds that verify ReadOnlyHeap by relaxing the requirement for
Code objects to be in CODE_SPACE in PagedSpaceObjectIterator::FromCurrentPage.

Original change's description:
> Reland: [builtins] Move non-JS linkage builtins code objects into RO_SPACE
>
> Reland of https://chromium-review.googlesource.com/c/v8/v8/+/1795358.
>
> [builtins] Move non-JS linkage builtins code objects into RO_SPACE
>
> Creates an allow-list of builtins that can still go in code_space
> including all TFJ builtins and a small manual list that should be pared
> down in the future.
>
> For builtins that go in RO_SPACE a Code object is created that contains an
> immediate trap instruction. Generally these Code objects are still no
> smaller than CODE_SPACE Code objects because of the Code object alignment
> requirements. This will hopefully be addressed in a follow-up CL either by
> relaxing them or removing the instruction stream completely.
>
> In the snapshot, this reduces code_space from ~152k to ~40k (-112k) and
> increases by the same amount.
>
> Change-Id: I76661c35c7ea5866c1fb16e87e87122b3e3ca0ce
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1893336
> Commit-Queue: Dan Elphick <delphick@chromium.org>
> Reviewed-by: Jakob Gruber <jgruber@chromium.org>
> Reviewed-by: Ulan Degenbaev <ulan@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#64700}

Change-Id: I4eeb7dab3027b42fa58c5dfb2bad9873e9fff250
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1893192
Commit-Queue: Dan Elphick <delphick@chromium.org>
Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Reviewed-by: Ulan Degenbaev <ulan@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64728}
2019-11-04 10:45:10 +00:00
Bill Budge
8b104dee9c Revert "Reland: [builtins] Move non-JS linkage builtins code objects into RO_SPACE"
This reverts commit 855591a54d.

Reason for revert: Breaks arm64 sim tests
https://ci.chromium.org/p/v8/builders/ci/V8%20Linux%20-%20arm64%20-%20sim%20-%20debug/17957
https://ci.chromium.org/p/v8/builders/ci/V8%20Linux%20-%20arm64%20-%20sim%20-%20gc%20stress/16585

Original change's description:
> Reland: [builtins] Move non-JS linkage builtins code objects into RO_SPACE
> 
> Reland of https://chromium-review.googlesource.com/c/v8/v8/+/1795358.
> 
> [builtins] Move non-JS linkage builtins code objects into RO_SPACE
> 
> Creates an allow-list of builtins that can still go in code_space
> including all TFJ builtins and a small manual list that should be pared
> down in the future.
> 
> For builtins that go in RO_SPACE a Code object is created that contains an
> immediate trap instruction. Generally these Code objects are still no
> smaller than CODE_SPACE Code objects because of the Code object alignment
> requirements. This will hopefully be addressed in a follow-up CL either by
> relaxing them or removing the instruction stream completely.
> 
> In the snapshot, this reduces code_space from ~152k to ~40k (-112k) and
> increases by the same amount.
> 
> Change-Id: I76661c35c7ea5866c1fb16e87e87122b3e3ca0ce
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1893336
> Commit-Queue: Dan Elphick <delphick@chromium.org>
> Reviewed-by: Jakob Gruber <jgruber@chromium.org>
> Reviewed-by: Ulan Degenbaev <ulan@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#64700}

TBR=ulan@chromium.org,jgruber@chromium.org,delphick@chromium.org

Change-Id: I4211c3bb7fe4741e0ba3898f92ce382dfc93c4f3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1893636
Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Bill Budge <bbudge@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64701}
2019-10-31 20:30:07 +00:00
Dan Elphick
855591a54d Reland: [builtins] Move non-JS linkage builtins code objects into RO_SPACE
Reland of https://chromium-review.googlesource.com/c/v8/v8/+/1795358.

[builtins] Move non-JS linkage builtins code objects into RO_SPACE

Creates an allow-list of builtins that can still go in code_space
including all TFJ builtins and a small manual list that should be pared
down in the future.

For builtins that go in RO_SPACE a Code object is created that contains an
immediate trap instruction. Generally these Code objects are still no
smaller than CODE_SPACE Code objects because of the Code object alignment
requirements. This will hopefully be addressed in a follow-up CL either by
relaxing them or removing the instruction stream completely.

In the snapshot, this reduces code_space from ~152k to ~40k (-112k) and
increases by the same amount.

Change-Id: I76661c35c7ea5866c1fb16e87e87122b3e3ca0ce
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1893336
Commit-Queue: Dan Elphick <delphick@chromium.org>
Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Reviewed-by: Ulan Degenbaev <ulan@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64700}
2019-10-31 18:18:56 +00:00
Ng Zhi An
ceb0aef09e Move some instructions into to sse macro list
Move rcpps, rsqrtps, sqrtps to SSE_INSTRUCTION_LIST.

Bug: v8:9810
Change-Id: Ib95a789dbeb4fc4472da11359cafe76db2027934
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1874513
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64697}
2019-10-31 17:04:35 +00:00
Ng Zhi An
a742d8fb2f Create a macro list for X-sd instructions
These are SSE2 instructions that deal with scalar double precision
values, and look like the packed double precision variant of the
instructions, but with a prefix.

E.g. sqrtpd is 66 0F 51, sqrtss is F2 0F 51.

We don't put this in the same list, even though the implementation
is very similar, because SSE2_INSTRUCTION_LIST is used in other
macros which generate AVX versions of this, and that overlaps with
another macro which generates AVX versions of these X-sd instructions.
I will tease this apart and clean it up in subsequent changes.

Bug: v8:9810
Change-Id: I0db64fe0d37df5685158331ce9f48bd1c763cc59
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1874510
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64688}
2019-10-31 15:59:00 +00:00
Deepti Gandluri
3097891464 Reduce some duplication in the x64 assembler
Bug: v8:9810
Change-Id: I585d35d01acf77d15ccb0e7334786d15ba07fb41
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1876634
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64660}
2019-10-30 19:53:36 +00:00
Ng Zhi An
71958d2abf Create a macro list for X-ss instructions
These are SSE instructions that deal with scalar single precision
values, and look like the packed single precision variant of the
instructions, but with a prefix.

E.g. sqrtps is NP 0F 51, sqrtss is F3 0F 51.

Bug: v8:9810
Change-Id: I417ea6d4d85d8618ad6602a1b32d4428db0d66d2
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1874509
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64658}
2019-10-30 18:27:58 +00:00
Michael Starzinger
9cb82371d0 [execution] Remove outdated {JavaScriptFrameConstants}.
This class used to describe unoptimized but compiled frames. All such
frames are by now covered via the architecture-independent description
in the {StandardFrameConstants} class (or one of its subclasses).

R=clemensb@chromium.org
BUG=v8:9810

Change-Id: I294cc6eec7d4a05e88e7aa336f1ebedfa0eb6e98
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1878708
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Reviewed-by: Michael Stanton <mvstanton@chromium.org>
Commit-Queue: Michael Starzinger <mstarzinger@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64556}
2019-10-25 08:11:07 +00:00
Ng Zhi An
4a716fea07 [wasm-simd] Add AVX codegen for some x64 instructions
This adds avx for extractps, insertps, and cvtdq2ps. These require
SSE4_1, so modified AvxHelper to take another template arg for sse4
operations, and open the proper cpu scope before calling this arg.

Bug: v8:9561
Change-Id: Iad2be7ebab41b96f7eb74f4e2bd9776002e6a76c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1874378
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64529}
2019-10-23 21:41:20 +00:00
Deepti Gandluri
6c54a6a6b6 Remove unused pshufw instruction
Bug: v8:9810
Change-Id: I5eb359f9bc04be4c0855a5161b7c525c803f679f
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1873187
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64442}
2019-10-21 23:43:35 +00:00
Ng Zhi An
44d68718b1 Move SSE instructions into list macro
Bug: v8:9810
Change-Id: Ie7c497d8aae40db71c3039e457d0535fd8d5b3f1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1872015
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64440}
2019-10-21 23:13:24 +00:00
Deepti Gandluri
61eefd1395 Add disassembly for shufps
Change-Id: I335b31d07445d6e6f3739481ac8928b38793e233
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1869923
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64395}
2019-10-19 02:07:45 +00:00
Ng Zhi An
b48000acfb Add disassembly for movdqu
Change-Id: I1c430a2f57578767c216121384cd4e1873a80e86
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1869919
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64394}
2019-10-19 00:53:38 +00:00
Sathya Gunasekaran
f1ebde88b1 Revert "[builtins] Move non-JS linkage builtins code objects into RO_SPACE"
This reverts commit 83f8464ffc.

Reason for revert: speculative revert for blink linux failure
https://ci.chromium.org/p/v8/builders/ci/V8%20Blink%20Linux/1272

Original change's description:
> [builtins] Move non-JS linkage builtins code objects into RO_SPACE
> 
> Creates an allow-list of builtins that can still go in code_space
> including all TFJ builtins and a small manual list that should be pared
> down in the future.
> 
> For builtins that go in RO_SPACE a Code object is created that contains
> no code at all (shrinking its size from 96 bytes to 64 bytes on x64),
> but is there to allow the runtime to continue to work since it expects
> a Code object.
> 
> This reduces code_space from ~152k to ~40k (-112k) and increases
> read_only_space from 33k to 108k (+75k) in the snapshot.
> 
> Bug: v8:7464, v8:9821, v8:9338, v8:8127
> Change-Id: Icc8bfc722bb267a2bcc17e2f1e27bef7f02f2376
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1795358
> Commit-Queue: Dan Elphick <delphick@chromium.org>
> Reviewed-by: Jakob Gruber <jgruber@chromium.org>
> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#64377}

TBR=mstarzinger@chromium.org,jgruber@chromium.org,delphick@chromium.org

Change-Id: I4cf38e9370280acdd2de718ca527776ebc509003
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: v8:7464, v8:9821, v8:9338, v8:8127
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1868621
Reviewed-by: Sathya Gunasekaran  <gsathya@chromium.org>
Commit-Queue: Sathya Gunasekaran  <gsathya@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64383}
2019-10-18 14:14:09 +00:00
Dan Elphick
83f8464ffc [builtins] Move non-JS linkage builtins code objects into RO_SPACE
Creates an allow-list of builtins that can still go in code_space
including all TFJ builtins and a small manual list that should be pared
down in the future.

For builtins that go in RO_SPACE a Code object is created that contains
no code at all (shrinking its size from 96 bytes to 64 bytes on x64),
but is there to allow the runtime to continue to work since it expects
a Code object.

This reduces code_space from ~152k to ~40k (-112k) and increases
read_only_space from 33k to 108k (+75k) in the snapshot.

Bug: v8:7464, v8:9821, v8:9338, v8:8127
Change-Id: Icc8bfc722bb267a2bcc17e2f1e27bef7f02f2376
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1795358
Commit-Queue: Dan Elphick <delphick@chromium.org>
Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64377}
2019-10-18 12:02:23 +00:00
Ng Zhi An
b477d91c57 Reland "[wasm-simd] Implement F64x2ConvertI64x2 for x64"
This is a reland of 306bb635b7

Original change's description:
> [wasm-simd] Implement F64x2ConvertI64x2 for x64
> 
> Bug: v8:8460
> Change-Id: Icefb90c67af77ac93bd75b4e452ba426232de83a
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1710332
> Commit-Queue: Zhi An Ng <zhin@chromium.org>
> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
> Reviewed-by: Bill Budge <bbudge@chromium.org>
> Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#63627}

Bug: v8:8460
Change-Id: I08d2c88e81ce51d3d1cfdf3d7d6ba34792e34e9e
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1793902
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64365}
2019-10-17 23:22:47 +00:00
Ng Zhi An
c38a4a6b83 [wasm-simd] Disassembly for qfma on x64
Bug: v8:9415
Change-Id: I6cd413117fc5c949ed668d2dff2bbfbbc880ebcb
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863952
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64334}
2019-10-16 16:42:38 +00:00
Clemens Backes
a8cdda9947 [Liftoff] Improve initialization for many locals
WebAssembly locals are specified to be zero on function entry. Liftoff
implements this by just storing the constant 0 in the virtual stack for
integer types, and using one floating point register initialized to
zero for all floating point types.
For big counts of locals this leads to problems (manifesting as huge
blocks of code being generated) once we hit a merge point: All those
constants (for int) and all duplicate register uses (for floats) need to
be fixed up, by using separate registers for the locals or spilling to
the stack if no more registers are available. All this spilling
generates a lot of code, and can even happen multiple times within a
function.

This CL optimizes for such cases by spilling all locals to the stack
initially. All merges within the function body get much smaller then.
The spilled values rarely have to be loaded anyway, because the initial
zero value is usually overwritten before the first use.

To optimize the code size for initializing big numbers of locals on the
stack, this CL also introduces the platform-specific
{FillStackSlotsWithZero} method which uses a loop for bigger local
counts.

This often saves dozens of kilobytes for very big functions, and shows
an overall code size reduction of 4-5 percent for big modules.

R=jkummerow@chromium.org

Bug: v8:9830
Change-Id: I23fa4145847827420f09e043a11e0e7b606e94cc
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1856004
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Reviewed-by: Jakob Kummerow <jkummerow@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64282}
2019-10-15 09:06:43 +00:00
Zhi An Ng
08b9d21461 Revert "[wasm-simd] Implement F64x2ConvertI64x2 for x64"
This reverts commit 306bb635b7.

Reason for revert: Fails on Win64 msvc https://ci.chromium.org/p/v8/builders/ci/V8%20Win64%20-%20msvc/10601

Original change's description:
> [wasm-simd] Implement F64x2ConvertI64x2 for x64
> 
> Bug: v8:8460
> Change-Id: Icefb90c67af77ac93bd75b4e452ba426232de83a
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1710332
> Commit-Queue: Zhi An Ng <zhin@chromium.org>
> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
> Reviewed-by: Bill Budge <bbudge@chromium.org>
> Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#63627}

TBR=bbudge@chromium.org,mstarzinger@chromium.org,gdeepti@chromium.org,zhin@chromium.org

Change-Id: I3ad568ec01f93e89ccc758170681035413b8414e
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: v8:8460
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1792232
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#63628}
2019-09-09 18:04:14 +00:00
Ng Zhi An
306bb635b7 [wasm-simd] Implement F64x2ConvertI64x2 for x64
Bug: v8:8460
Change-Id: Icefb90c67af77ac93bd75b4e452ba426232de83a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1710332
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Bill Budge <bbudge@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#63627}
2019-09-09 17:27:13 +00:00
Deepti Gandluri
237e8c2c7b [wasm-simd] Use movddup instead of pshufd for 64x2 splats
Performance is comparable on newer hardware, movddup performs slightly
better on older chips

Change-Id: Ic3248dd2807bf2c49311cba45ba4f0e8baa47730
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1715981
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#62968}
2019-07-30 00:25:48 +00:00
Michael Starzinger
4ca8b4dd67 [wasm] Implement "atomic.fence" operator.
This adds decoding and compilation of the "atomic.fence" operator, which
is intended to preserve the synchronization guarantees of higher-level
languages.

Unlike other atomic operators, it does not target a particular linear
memory. It may occur in modules which declare no memory, or a non-shared
memory, without causing a validation error.

See proposal: https://github.com/WebAssembly/threads/pull/141
See discussion: https://github.com/WebAssembly/threads/issues/140

R=clemensh@chromium.org
TEST=cctest/test-run-wasm-atomics/RunWasmXXX_AtomicFence
BUG=v8:9452

Change-Id: Ibf7e46227f7edfe5c81c097cfc15924c59614067
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1701856
Commit-Queue: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Clemens Hammacher <clemensh@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#62821}
2019-07-19 09:14:42 +00:00
Ng Zhi An
b479bed1e0 Fix disassembly of pcmpgtq
pcmpgtq was added in https://crrev.com/c/1684362 but not to the
disasembler.

Bug: v8:8460
Change-Id: Id30f9ece015713e8597f5e218dc066ab75ccec96
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1703766
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#62750}
2019-07-17 00:46:19 +00:00
Ng Zhi An
8d797820dd [wasm simd] Implement I64x2ExtractLane and I64x2ReplaceLane for x64
Bug: v8:8460
Change-Id: I995996da621d84465d9bec4fc9e9d40308a92410
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1683929
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#62491}
2019-07-02 16:04:57 +00:00
Yang Guo
f9a88acbc9 Move remaining files in src/
TBR=mvstanton@chromium.org,neis@chromium.org,ahaas@chromium.org

Bug: v8:9247
Change-Id: I5433c863a54f3412d73df0d38aba3fdbcfac7ebe
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1627973
Commit-Queue: Yang Guo <yangguo@chromium.org>
Auto-Submit: Yang Guo <yangguo@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Cr-Commit-Position: refs/heads/master@{#61830}
2019-05-24 18:24:36 +00:00