AuroraMiddleware/v8
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159 Commits

Author SHA1 Message Date
jing.bao
f8df405cf3 [ia32] Add pextrb/pextrw, pinsrb, pshufb/pshuflw and AVX version 
Also add vpinsrw

BUG=

Review-Url: https://codereview.chromium.org/2931333002
Cr-Commit-Position: refs/heads/master@{#45883}
 2017-06-13 02:06:17 +00:00
Jakob Gruber
0a355777c3 [cleanup] Remove duplicate Callable accessors from CodeFactory 
Callables for TF builtins are autogenerated and accessible through
Builtins::CallableFor.  This removes the manually written accessors from
CodeFactory.

Bug: v8:6474,v8:5737
Change-Id: I9d8dec97995471c1bb258147220c190bf72e5de8
Reviewed-on: https://chromium-review.googlesource.com/530745
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Jakob Kummerow <jkummerow@chromium.org>
Commit-Queue: Jakob Gruber <jgruber@chromium.org>
Cr-Commit-Position: refs/heads/master@{#45839}
 2017-06-12 09:24:17 +00:00
jing.bao
6d18ae2589 [ia32][wasm] Support AVX instructions for I32x4Splat/ReplaceLane/ExtractLane 
Add vpinsrd, vpextrd, vmovd. Supplement pshufd and add vpshufd.
Add Movd and Pshufd macro. Add AVX support to Pextrd.
Fix disassembler to recognize "pinsrd/pextrd xmm,[mem],imm8".

BUG=

Review-Url: https://codereview.chromium.org/2916093002
Cr-Commit-Position: refs/heads/master@{#45833}
 2017-06-12 01:57:05 +00:00
neis
659e8f7b5c [compiler] Delay allocation of code-embedded heap numbers. 
Instead of allocating and embedding certain heap numbers into the code
during code assembly, emit dummies but record the allocation requests.
Later then, in Assembler::GetCode, allocate the heap numbers and patch
the code by replacing the dummies with the actual objects. The
RelocInfos for the embedded objects are already recorded correctly when
emitting the dummies.

R=jarin@chromium.org
BUG=v8:6048

Review-Url: https://codereview.chromium.org/2900683002
Cr-Commit-Position: refs/heads/master@{#45635}
 2017-05-31 14:00:11 +00:00
jing.bao
1073dc987b [ia32] Add rcpps, rsqrtps, cvtdq2ps, cvttps2dq 
instr(xmm, xmm/mem)
vinstr(xmm, xmm/mem)

BUG=

Review-Url: https://codereview.chromium.org/2870253003
Cr-Commit-Position: refs/heads/master@{#45293}
 2017-05-15 09:00:42 +00:00
jing.bao
0e0e1aa81a [ia32] Add cmpps/vcmpps for eq/lt/le/neq 
BUG=

Review-Url: https://codereview.chromium.org/2847683002
Cr-Commit-Position: refs/heads/master@{#44955}
 2017-04-28 01:56:26 +00:00
jing.bao
d598386db8 [ia32] Add minps/maxps and AVX v_ps/v_pd for add/sub/mul/div/min/max 
Also use vinstr for vps/vpd/vss/vsd

BUG=

Review-Url: https://codereview.chromium.org/2747103002
Cr-Commit-Position: refs/heads/master@{#43809}
 2017-03-15 02:01:05 +00:00
jing.bao
97254b0d23 [ia32] Supplement shift instructions for SIMD 
psll/rl/raw(xmm, imm)
psrad(xmm, imm)
vpsll/rl/raw(xmm, xmm, imm)
vpsll/rl/rad(xmm, xmm, imm)

BUG=

Review-Url: https://codereview.chromium.org/2747783004
Cr-Commit-Position: refs/heads/master@{#43762}
 2017-03-14 08:01:20 +00:00
jing.bao
3800ba6cc7 [ia32] Add some SSE2, SSE4 instructions and AVX version for SIMD 
Add instructions in following format:
instr(xmm, xmm/mem)
vinstr(xmm, xmm, xmm/mem)

BUG=

Review-Url: https://codereview.chromium.org/2744643004
Cr-Commit-Position: refs/heads/master@{#43760}
 2017-03-14 02:00:13 +00:00
jing.bao
b9614d4bd1 Add several SIMD opcodes to IA32 
CreateInt32x4, Int32x4ExtractLane, Int32x4ReplaceLane
Int32x4Add, Int32x4Sub

Also add paddd, psubd, vpaddd, vpsubd, pinsrw to ia32-assembler

BUG=

Review-Url: https://codereview.chromium.org/2695613004
Cr-Original-Commit-Position: refs/heads/master@{#43483}
Committed: 4deb9ffdec
Review-Url: https://codereview.chromium.org/2695613004
Cr-Commit-Position: refs/heads/master@{#43708}
 2017-03-10 02:40:06 +00:00
machenbach
a6b20adbf9 Revert of Add several SIMD opcodes to IA32 (patchset #9 id:160001 of https://codereview.chromium.org/2695613004/ ) 
Reason for revert:
Fails with nosse4:
https://build.chromium.org/p/client.v8/builders/V8%20Linux%20-%20debug/builds/13853

Original issue's description:
> Add several SIMD opcodes to IA32
>
> CreateInt32x4, Int32x4ExtractLane, Int32x4ReplaceLane
> Int32x4Add, Int32x4Sub
>
> Also add paddd and psubd to ia32-assembler
>
> BUG=
>
> Review-Url: https://codereview.chromium.org/2695613004
> Cr-Commit-Position: refs/heads/master@{#43483}
> Committed: 4deb9ffdec

TBR=bbudge@chromium.org,gdeepti@chromium.org,bmeurer@chromium.org,jing.bao@intel.com
# Skipping CQ checks because original CL landed less than 1 days ago.
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=

Review-Url: https://codereview.chromium.org/2717423003
Cr-Commit-Position: refs/heads/master@{#43489}
 2017-02-28 14:54:28 +00:00
jing.bao
4deb9ffdec Add several SIMD opcodes to IA32 
CreateInt32x4, Int32x4ExtractLane, Int32x4ReplaceLane
Int32x4Add, Int32x4Sub

Also add paddd and psubd to ia32-assembler

BUG=

Review-Url: https://codereview.chromium.org/2695613004
Cr-Commit-Position: refs/heads/master@{#43483}
 2017-02-28 13:35:22 +00:00
yangguo
3f47c63ded [liveedit] reimplement frame restarting. 
Previously, when restarting a frame, we would rewrite all frames
between the debugger activation and the frame to restart to squash
them, and replace the return address with that of a builtin to
leave that rewritten frame, and restart the function by calling it.

We now simply remember the frame to drop to, and upon returning
from the debugger, we check whether to drop the frame, load the
new FP, and restart the function.

R=jgruber@chromium.org, mstarzinger@chromium.org
BUG=v8:5587

Review-Url: https://codereview.chromium.org/2636913002
Cr-Commit-Position: refs/heads/master@{#42725}
 2017-01-27 07:31:03 +00:00
bbudge
26ecb4a1d7 [Turbofan] Add ia32 support for 4 and 16 byte moves and swaps. 
- Adds move/swap handling for 4 and 16 bytes to ia32.
- Register allocator now only requests 4 bytes for floats on ia32 and arm.
- We probably need similar support in mips.

LOG=N
BUG=v8:4124

Review-Url: https://codereview.chromium.org/2027043002
Cr-Commit-Position: refs/heads/master@{#37714}
 2016-07-13 13:54:39 +00:00
ishell
d9e8764f81 [ic] Split LoadIC into LoadGlobalIC and LoadIC. 
The former will handle loads of predeclared global variables (vars and
functions), lets, consts and undeclared variables. The latter will handle
named loads from explicit receiver. In addition, named loads does not
depend of the TypeofMode.

TypeofMode related cleanup will be done in the follow-up CL.

BUG=chromium:576312
LOG=Y
TBR=bmeurer@chromium.org

Review-Url: https://codereview.chromium.org/1912633002
Cr-Commit-Position: refs/heads/master@{#36965}
 2016-06-14 13:21:28 +00:00
machenbach
479de28c3a Revert of Adding ia32 simd assembler changes. (patchset #2 id:20001 of https://codereview.chromium.org/1991713002/ ) 
Reason for revert:
Crashes on win32 debug:
https://build.chromium.org/p/client.v8/builders/V8%20Win32%20-%20debug/builds/2305/steps/Check/logs/stdio

Also, would be nice if the test output could be a bit shorter and only print what's necessary to trace a failure. Or split things into more smaller tests. Like that, these logs must be processed, json-encoded/decoded and sent around through the infrastructure.

Some chars in the output make the json encoder unhappy, therefore the infrastructure can't nicely display the failures.

Original issue's description:
> Adding ia32 simd assembler support.
>
> Based on assembler changes from this patch:
> https://codereview.chromium.org/90643003/
>
> BUG=https://bugs.chromium.org/p/v8/issues/detail?id=4124
> R=titzer@chromium.org
> LOG=N
>
> Committed: https://crrev.com/fbf58a5af1d07a7fbb3763aa15f8ba26e2ce7d11
> Cr-Commit-Position: refs/heads/master@{#36349}

TBR=bbudge@chromium.org,titzer@chromium.org,gdeepti@chromium.org,aseemgarg@chromium.org,bradnelson@chromium.org
# Skipping CQ checks because original CL landed less than 1 days ago.
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=https://bugs.chromium.org/p/v8/issues/detail?id=4124

Review-Url: https://codereview.chromium.org/1992163002
Cr-Commit-Position: refs/heads/master@{#36353}
 2016-05-19 08:58:18 +00:00
bradnelson
fbf58a5af1 Adding ia32 simd assembler support. 
Based on assembler changes from this patch:
https://codereview.chromium.org/90643003/

BUG=https://bugs.chromium.org/p/v8/issues/detail?id=4124
R=titzer@chromium.org
LOG=N

Review-Url: https://codereview.chromium.org/1991713002
Cr-Commit-Position: refs/heads/master@{#36349}
 2016-05-19 08:04:10 +00:00
binji
5c22cf5ae7 Add cmpxchg and lock instructions to x64 and ia32 {dis,}assemblers 
Review-Url: https://codereview.chromium.org/1986113004
Cr-Commit-Position: refs/heads/master@{#36341}
 2016-05-19 00:56:08 +00:00
verwaest
911a5768dc Simplify IC interfaces 
BUG=

Review URL: https://codereview.chromium.org/1865873002

Cr-Commit-Position: refs/heads/master@{#35301}
 2016-04-06 13:38:33 +00:00
epertoso
22523f25b1 Extends testb and cmpb/cmpw instruction support in the ia32 assembler. 
This is in preparation for a CL that does the equivalent of http://crrev.com/1780193003 for ia32.

BUG=

Review URL: https://codereview.chromium.org/1815213002

Cr-Commit-Position: refs/heads/master@{#34925}
 2016-03-21 10:09:26 +00:00
ahaas
1b23079936 [wasm] Int64Lowering of Int64Add on ia32 and arm. 
Int64Add is lowered to a new turbofan operator, Int32AddPair. The new
operator takes 4 inputs an generates 2 outputs. The inputs are the low
word of the left input, high word of the left input, the low word of the
right input, and high word of the right input. The ouputs are the low
and high word of the result of the addition.

R=titzer@chromium.org, v8-arm-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1778493004

Cr-Commit-Position: refs/heads/master@{#34747}
 2016-03-14 15:34:19 +00:00
ahaas
240b7db9c7 [wasm] Int64Lowering of I64ShrU and I64ShrS on ia32. 
I implemented I64ShrU and I64ShrS the same as I64Shl in https://codereview.chromium.org/1756863002

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1768233002

Cr-Commit-Position: refs/heads/master@{#34630}
 2016-03-09 16:38:43 +00:00
ahaas
ddc626e1cf [wasm] Int64Lowering of I64Shl on ia32. 
I64Shl is lowered to a new turbofan operator, WasmWord64Shl. The new
operator takes 3 inputs, the low-word input, the high-word input, and
the shift, and produces 2 output, the low-word output and the high-word
output.

At the moment I implemented the lowering only for ia32, but I think the
CL is already big enough. I will add the other platforms in separate
CLs.

R=titzer@chromium.org

Review URL: https://codereview.chromium.org/1756863002

Cr-Commit-Position: refs/heads/master@{#34546}
 2016-03-07 15:19:44 +00:00
jochen
6f472db65a Disable soon to be deprecated APIs per default for v8 
Embedders still can use those APIs by default

test-api.cc still has an exception to use the old APIs...

BUG=v8:4143
R=vogelheim@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/1505803004

Cr-Commit-Position: refs/heads/master@{#32701}
 2015-12-09 10:35:04 +00:00
jochen
3cf6e040c4 Mark cctests that don't use deprecated APIs as such 
BUG=4134
R=epertoso@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/1451733002

Cr-Commit-Position: refs/heads/master@{#32011}
 2015-11-16 16:45:31 +00:00
mstarzinger
19a49abf02 Realize IWYU pattern for frames-inl.h header. 
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/1283183002

Cr-Commit-Position: refs/heads/master@{#30127}
 2015-08-12 10:28:47 +00:00
yangguo
1667c15e37 Debugger: move implementation to a separate folder. 
R=cbruni@chromium.org

Review URL: https://codereview.chromium.org/1265923002

Cr-Commit-Position: refs/heads/master@{#29951}
 2015-07-31 11:08:15 +00:00
ishell
fec3c9cba6 TypeofMode replaces TypeofState and ContextualMode. 
NON_CONTEXTUAL ~> INSIDE_TYPEOF
CONTEXTUAL ~> NOT_INSIDE_TYPEOF

Review URL: https://codereview.chromium.org/1227893005

Cr-Commit-Position: refs/heads/master@{#29611}
 2015-07-13 13:39:43 +00:00
Weiliang Lin
38e764f7ac [x86] Introduce vandps/vandpd/vxorps/vxorpd. 
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/1072343002

Cr-Commit-Position: refs/heads/master@{#27768}
 2015-04-11 00:58:38 +00:00
jing.bao
dba47f6486 [ia32] Introduce BMI instructions. 
BUG=v8:4015
LOG=n

Review URL: https://codereview.chromium.org/1069683002

Cr-Commit-Position: refs/heads/master@{#27683}
 2015-04-09 06:50:58 +00:00
bmeurer
8dad78cdbd [turbofan] Add backend support for float32 operations. 
This adds the basics necessary to support float32 operations in TurboFan.
The actual functionality required to detect safe float32 operations will
be added based on this later. Therefore this does not affect production
code except for some cleanup/refactoring.

In detail, this patchset contains the following features:
- Add support for float32 operations to arm, arm64, ia32 and x64
  backends.
- Add float32 machine operators.
- Add support for float32 constants to simplified lowering.
- Handle float32 representation for phis in simplified lowering.

In addition, contains the following (related) cleanups:
- Fix/unify naming of backend instructions.
- Use AVX comparisons when available.
- Extend ArchOpcodeField to 9 bits (required for arm64).
- Refactor some code duplication in instruction selectors.

BUG=v8:3589
LOG=n
R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/1044793002

Cr-Commit-Position: refs/heads/master@{#27509}
 2015-03-30 07:34:04 +00:00
yangguo
019096f829 Serializer: move to a subfolder and clean up includes. 
R=jochen@chromium.org

Review URL: https://codereview.chromium.org/1041743002

Cr-Commit-Position: refs/heads/master@{#27501}
 2015-03-27 15:29:07 +00:00
bmeurer
99f8d57f3c [turbofan] Introduce optional Float64Min and Float64Max machine operators. 
Basically recognize certain x < y ? x : y constructs and turn that into
Float64Min/Float64Max operations, if the target machine supports that.
On x86 we lower to (v)minsd/(v)maxsd.

R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/998283002

Cr-Commit-Position: refs/heads/master@{#27160}
 2015-03-12 14:07:39 +00:00
bmeurer
4436c2642a [turbofan] Support for %_DoubleHi, %_DoubleLo and %_ConstructDouble. 
This adds support for the double bits intrinsics to TurboFan, and is
a first step towards fast Math functions inlined into TurboFan code
or even compiled by themselves with TurboFan.

Review URL: https://codereview.chromium.org/974313002

Cr-Commit-Position: refs/heads/master@{#27006}
 2015-03-05 09:22:38 +00:00
weiliang.lin
4f3d27e64f [ia32] Introduce FMA3 instructions on scalar data elements. 
port 83a635e0d7

BUG=

Review URL: https://codereview.chromium.org/773783002

Cr-Commit-Position: refs/heads/master@{#25619}
 2014-12-02 15:30:09 +00:00
weiliang.lin
2ad1c224b8 [ia32] Introduce vex prefix version of float64 arithmetic binop 
port 50c4d8826b

BUG=

Review URL: https://codereview.chromium.org/770183002

Cr-Commit-Position: refs/heads/master@{#25595}
 2014-12-02 08:09:53 +00:00
bmeurer@chromium.org
8c5fdd0575 IA: Double arithmetic binops support memory operand 
BUG=
R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/662813002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

Cr-Commit-Position: refs/heads/master@{#25052}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25052 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-11-03 05:57:17 +00:00
dcarney@chromium.org
907ad65dce [turbofan]IA: ChangeFloat32ToFloat64 supports mem operand 
BUG=
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/641153003

Patch from Jing Bao <jing.bao@intel.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24542 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-10-13 07:42:35 +00:00
dcarney@chromium.org
3396c2badd [turbofan] IA: TruncateFloat64ToFloat32 supports mem operand 
BUG=
R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/639283003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24541 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-10-13 07:12:57 +00:00
dcarney@chromium.org
e9fcaa4be9 [turbofan] support all shift operands on ia32 
R=bmeurer@chromium.org

BUG=

Review URL: https://codereview.chromium.org/619663002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24387 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-10-02 09:04:04 +00:00
titzer@chromium.org
8892385565 [turbofan] IA: Float64ToUint32 supports mem operand 
BUG=
R=titzer@chromium.org

Review URL: https://codereview.chromium.org/582713002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24092 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-09-19 14:25:13 +00:00
verwaest@chromium.org
30c3981c2c Move IC code into a subdir and move ic-compilation related code from stub-cache into ic-compiler 
BUG=
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/483683005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23306 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-22 11:43:39 +00:00
danno@chromium.org
a1383e2250 Land the Fan (disabled) 
R=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/426233002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22709 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-30 13:54:45 +00:00
svenpanne@chromium.org
018ef484b9 More OStreamsUse OStreams more often. 
This is a mostly mechanical CL (more than 90% Emacs macros and
query-replace-regexp) moving FILE*/StringStream*-based APIs to
OStream-based APIs. There are a few places where this had to stop,
otherwise the CL would be even bigger, but this can easily and
incrementally cleaned up later.

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/363323003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22232 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-07-07 09:57:29 +00:00
jochen@chromium.org
56a486c322 Use full include paths everywhere 
- this avoids using relative include paths which are forbidden by the style guide
- makes the code more readable since it's clear which header is meant
- allows for starting to use checkdeps

BUG=none
R=jkummerow@chromium.org, danno@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/304153016

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21625 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-06-03 08:12:43 +00:00
yangguo@chromium.org
6fd69c2476 Remove special debug ExternalReferences. 
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/296043002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21421 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-05-22 07:57:33 +00:00
yangguo@chromium.org
a7a6abbde6 Require CMOV support for the ia32 port. 
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/275253004

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21279 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-05-13 08:16:26 +00:00
yangguo@chromium.org
3fa6100ed3 Require SSE2 support for the ia32 port. 
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/275433004

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21223 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-05-09 13:01:50 +00:00
yangguo@chromium.org
cb2f43cb14 Always include debugger support. 
Motivation: we do not have test coverage for debuggersupport=off.

R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/256653004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20969 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-25 11:00:37 +00:00
yangguo@chromium.org
5e02daca21 Fix unused variable warnings. 
TBR=jarin@chromium.org

Review URL: https://codereview.chromium.org/238543008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20797 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-16 11:50:24 +00:00
yangguo@chromium.org
17b33fa1da Handlify code allocation. 
R=mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/235153003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20795 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-04-16 11:38:56 +00:00
mstarzinger@chromium.org
9ab32061ed Print properly signed displacement in disassembler. 
R=titzer@chromium.org
BUG=

Review URL: https://codereview.chromium.org/178193028

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19667 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-03-05 09:28:26 +00:00
yangguo@chromium.org
6f95c0b11b [x64] add disasm for two fp instructions 
BUG=
R=yangguo@chromium.org

Review URL: https://codereview.chromium.org/146583002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19022 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-02-03 08:13:12 +00:00
mvstanton@chromium.org
e3e7daf01c We need to know if a load, store or call IC is assumed 
to be on the global object. Previously, this information
was stored in RelocInfo. A more logical place for this kind
of structural information is ExtraICState. Storing it there
makes it easier for us to gather type feedback from these
sites too.

R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/96083005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@18466 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-01-07 14:14:34 +00:00
svenpanne@chromium.org
c524efd759 Introduce addps/subps/mulps/divps for IA32/X64 
BUG=
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/60093005

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@17842 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-11-18 15:24:41 +00:00
svenpanne@chromium.org
74ad230a8e Introduce orps for IA32/X64 
BUG=
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/53573004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@17479 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-11-05 12:04:46 +00:00
svenpanne@chromium.org
19a2e803bb Introduce andps for IA32/X64 
replace andpd and pand in Math.abs

BUG=
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/44153002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@17413 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-10-28 10:38:40 +00:00
jkummerow@chromium.org
4e96d4dee6 Tweak Math.log on ia32/x64 
ia32 and x64 more consistent now
1. use non-transcendental cache version of log for x64
2. use negative infinity constant instead of pushing to stack and loading to XMM register
3. remove movdbl, use movsd directly. movdbl seems confusing

BUG=
R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/27197013

Patch from Weiliang Lin <weiliang.lin2@gmail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@17268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-10-18 10:54:45 +00:00
svenpanne@chromium.org
258cee8f72 Fixed bug in extractps instruction on ia32 and x64 
This is a fixed version of https://codereview.chromium.org/27097002/
which was originally written by weiliang.lin@intel.com.

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/27301003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@17217 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-10-15 12:51:58 +00:00
bmeurer@chromium.org
5768fcf12c Fix the CPU feature detection. 
Move all of the CPU detection logic to the CPU class, and make
all other code use the CPU class for feature detection.

This also fixes the ARM CPU feature detection logic, which was
based on fragile string search in /proc/cpuinfo. Now we use
ELF hwcaps if available, falling back to sane(!!) parsing of
/proc/cpuinfo for CPU features.

The ia32 and x64 code was also cleaned up to make it usable
outside the assembler.

R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/23401002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@16315 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-08-26 09:37:39 +00:00
bmeurer@chromium.org
ee718489fe Drop unused rdtsc instruction. 
We do not use rdtsc anywhere and we won't ever use that in the
future, as it is totally unusable with multicore and out of
order execution.

R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/23112016

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@16268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-08-22 11:58:20 +00:00
mstarzinger@chromium.org
f8db2414f2 Deprecate FACTORY helper macro. 
This removes the FACTORY helper macro to avoid accidental TLS access
when using the factory. Most internal code has access to the Isolate by
now whereas tests which are not performance critical still heavily use
TLS access through explicit Isolate::Current() calls.

R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/16337005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14931 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-06-04 10:30:05 +00:00
dcarney@chromium.org
ff2a76b5d5 remove most V8_ALLOW_ACCESS_TO_* defines from test classes 
R=svenpanne@chromium.org
BUG=

Review URL: https://codereview.chromium.org/15964004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14849 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-05-28 11:54:52 +00:00
dcarney@chromium.org
cf5ff5a14c first step to remove unsafe handles 
R=svenpanne@chromium.org
BUG=

Review URL: https://codereview.chromium.org/12729023

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14530 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-05-02 20:18:42 +00:00
mstarzinger@chromium.org
dd70ce29d1 Unify the way cctest initalizes the VM for each test case. 
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/13483017

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@14199 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-04-10 08:29:39 +00:00
svenpanne@chromium.org
53310ac152 Added a version of the v8::HandleScope constructor with an Isolate and use that consistently. 
I tried to limit the use of v8::Isolate::GetCurrent() and v8::internal::Isolate::Current() as much as possible, but sometimes this would have involved restructuring tests quite a bit, which is better left for a separate CL.

BUG=v8:2487

Review URL: https://codereview.chromium.org/12716010

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13953 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-03-15 12:06:53 +00:00
svenpanne@chromium.org
e4edbb0535 Cleaned up CpuFeature scope handling. 
First of all, it has nothing to do with Isolates, it is related to the assembler
at hand. Furthermore, the saving/restoring is platform-independent. Cleaned up
some platform-specific stuff on the way.

Note that there are some things which still need some cleanup, like e.g. using
EnumSet instead of uint64_t, making Probe() more uniform across platforms etc.,
but the CL is already big enough.

BUG=v8:2487

Review URL: https://codereview.chromium.org/12391055

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13823 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-03-05 10:48:16 +00:00
svenpanne@chromium.org
fb6776e84a Made Isolate a mandatory parameter for everything Handle-related. 
Unified parameter order of CreateHandle with the rest of v8 on the way. A few
Isolate::Current()s had to be introduced, which is not nice, and not every place
will win a beauty contest, but we can clean this up later easily in smaller steps.

Review URL: https://codereview.chromium.org/12300018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13717 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-02-25 14:46:09 +00:00
ulan@chromium.org
0606abbaab Rename RelocInfo::NONE to RelocInfo::NONE32. 
This CL only does renaming, nothing else.

Followup to:
https://chromiumcodereview.appspot.com/11695006/

There are now NONE and NONE64 RelocInfo types, but only ARM uses them
both at the same time. They were added in:
https://chromiumcodereview.appspot.com/11191029/

R= ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11744020
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13311 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-01-04 10:56:24 +00:00
danno@chromium.org
1f4b4625ff Re-land Crankshaft-generated KeyedLoad stubs. 
R=jkummerow@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11528003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13236 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-12-18 16:25:45 +00:00
danno@chromium.org
64fc1f99cb Revert 13157, 13145 and 13140: Crankshaft code stubs. 
R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/11498006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13179 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-12-10 11:09:12 +00:00
danno@chromium.org
39f6c8ef69 Fix nosse2 tests 
R=jkummerow@chromoum.org

Review URL: https://chromiumcodereview.appspot.com/11439028

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13157 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-12-07 07:09:57 +00:00
erik.corry@gmail.com
701790fd34 Support multi-byte nop instructions as recommended by 
the optimization guides from AMD and Intel.
Review URL: http://codereview.chromium.org/8776033

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10134 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-12-02 10:01:50 +00:00
kmillikin@chromium.org
a4e0103708 Clean up the x86 assembler API. 
The API is inconsistent about when a register must be coerced to an operand
and when it can be used as a register.  Simplify usage by never requiring it
to be wrapped.

R=fschneider@chromium.org
BUG=
TEST=

Review URL: http://codereview.chromium.org/8086021

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9507 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-10-03 11:44:39 +00:00
vegorov@chromium.org
ac36cb4504 Merge experimental/gc branch to the bleeding_edge. 
Review URL: http://codereview.chromium.org/7945009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9328 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-09-19 18:36:47 +00:00
fschneider@chromium.org
48077e89e9 Remove support for branch hints from the IA32 and X64 assembler. 
They were not on by default and should not be needed on modern
platforms.
Review URL: http://codereview.chromium.org/7001025

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7866 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-05-11 13:26:07 +00:00
vitalyr@chromium.org
179aef2b8f VM initialization refactoring. 
This patch introduces global once per-process initialization and moves
the OS and CPU setup there. This makes CPU features isolate-independent.

Review URL: http://codereview.chromium.org/6670119

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7462 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-31 16:17:37 +00:00
ager@chromium.org
1bdc8031fa Introduce accessors on builtins instance and use them to avoid TLS access when getting builtins. 
R=vitalyr@chromium.org

Review URL: http://codereview.chromium.org/6717018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7327 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-23 13:40:07 +00:00
ager@chromium.org
b69591bc0f Require an isolate parameter for most external reference creation to 
avoid TLS access in connection with external references.

Make the isolate accessible via the assembler.

Only for ia32 at this point. If this looks OK to you I will port it.

R=vitalyr@chromium.org

Review URL: http://codereview.chromium.org/6713074

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7305 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-22 13:20:04 +00:00
vitalyr@chromium.org
7976ca2cbc Merge isolates to bleeding_edge. 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7271 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-18 20:35:07 +00:00
vitalyr@chromium.org
76e226f832 Revert r7268: it borked the history. 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7269 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-18 19:41:05 +00:00
vitalyr@chromium.org
6ff7fdebd3 Merge isolates to bleeding_edge. 
Review URL: http://codereview.chromium.org/6685088

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-18 18:49:56 +00:00
fschneider@chromium.org
eec7bc8e60 Change the code for materializing double constants on ia32. 
Instead of using the stack, use a temporary integer register
and avoid memory access.

Review URL: http://codereview.chromium.org/6452002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6696 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-02-09 12:39:15 +00:00
vitalyr@chromium.org
404fbb5b0b SSE2 truncating double-to-i. 
Review URL: http://codereview.chromium.org/6049008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6269 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-01-11 13:48:49 +00:00
sgjesse@chromium.org
2a259f9df4 Changed #define symbols in test to OBJECT_PRINT from PRINT_OBJECT 
because this is actually what is being used.

Patch by Mark Lam from Hewlett-Packard Development Company, LP

Review URL: http://codereview.chromium.org/6037015


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6128 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-01-03 09:32:42 +00:00
sgjesse@chromium.org
716e6282e9 Refactoring out object printing functions into objects-printer.cc. 
Patch by Mark Lam from Hewlett-Packard Development Company, LP

Review URL: http://codereview.chromium.org/6083001


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6110 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-12-22 13:04:47 +00:00
erik.corry@gmail.com
0dcaac1939 Make Failure inherit from MaybeObject instead of Object. 
Review URL: http://codereview.chromium.org/3970005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5698 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-10-25 15:22:03 +00:00
kaznacheev@chromium.org
c39194e06f Implemented missing instructions in ia32 and x64 disassembler. 
ia32: fld(i), fldpi
x64: fld(i), fldpi, cvtsd2si, cvttsd2si

Review URL: http://codereview.chromium.org/3471011

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5525 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-09-24 12:55:17 +00:00
kaznacheev@chromium.org
5e572e4622 Support dec_b instruction in ia32 and x64 disassembler. 
Review URL: http://codereview.chromium.org/3412028

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5515 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-09-23 19:01:56 +00:00
vitalyr@chromium.org
a6bbe9820e Custom call IC for Math.floor. 
Review URL: http://codereview.chromium.org/3327022

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5499 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-09-21 12:54:12 +00:00
erik.corry@gmail.com
a2d1dad441 Add rcr to disassembler. 
Review URL: http://codereview.chromium.org/3108023

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-08-16 11:18:42 +00:00
kaznacheev@chromium.org
0243bc875c Move serialized scope info from Code object to SharedFunctionInfo. 
The scope info is now stored in a FixedArray referenced from SharedFunctionInfo.


Review URL: http://codereview.chromium.org/2918001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5056 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-07-13 13:06:33 +00:00
sgjesse@chromium.org
685cae6021 API: Resolve linker issues with using V8 as a DLL 
This changes the way the constants kJSObjectType, kFirstNonstringType and kProxyType are made available to the inlined part of the V8 API. This change to fixed constants resolves linker this linker error Windows

error LNK2001: unresolved external symbol "public: static int v8::internal::Internals::kJSObjectType" (?kJSObjectType@Internals@internal@v8@@2HA)

when linking against a V8 DLL.

This change also makes it possible to build all the C++ tests with ENABLE_DEBUGGER_SUPPORT not defined. Now C++ tests run ENABLE_DEBUGGER_SUPPORT not defined, and only the JavaScript tests which tests the debugger fails when ENABLE_DEBUGGER_SUPPORT is not defined.
Review URL: http://codereview.chromium.org/2820016

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4898 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-18 10:52:59 +00:00
ager@chromium.org
2043956c54 Remove the comisd instruction from the ia32 and x64 assemblers. We 
should always use ucomisd.

Add missing pop from floating-point stack in case of allocation failure.
Review URL: http://codereview.chromium.org/2831009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4878 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-16 12:32:34 +00:00
whesse@chromium.org
b93382d9ff Add test_b(Operand, imm8) to ia32 disassembler. 
Review URL: http://codereview.chromium.org/2765001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4822 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-08 12:44:24 +00:00
antonm@chromium.org
c7b2af37ba Use direct loop when filling small arrays. 
r3995 (http://code.google.com/p/v8/source/detail?r=3995) introduce performance
regression for the case when arrat size is small (think new Array(4)).

It turns out that in those cases rep stos is slower than plain loop (apprently
due to ecx increment, but I didn't check this hypothesis.)  The next thing
to try could be direct jump into right place of long sequence of stos'es.

Review URL: http://codereview.chromium.org/2082006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4664 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-17 14:14:34 +00:00
sgjesse@chromium.org
a43c533d2f Make the C++ tests run without SSE2 support. 
Review URL: http://codereview.chromium.org/982007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4158 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-03-17 10:28:44 +00:00
antonm@chromium.org
38acad676a Faster filling newly allocated arrays with the holes from the Array construction stub. 
Review URL: http://codereview.chromium.org/661245

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3995 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-03-02 12:42:15 +00:00
lrn@chromium.org
9c6335929b Implement inline string compare on ARM. 
Backport optimizations from x64 version to ia32.

Review URL: http://codereview.chromium.org/546087

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3670 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-21 12:10:56 +00:00
sgjesse@chromium.org
658ca2f174 Add missing instructions to the IA-32 disasembler 
Added newly added instructions to test-disasem-ia32.cc and implemented the missi
ng ones in the disasembler.

Added some asserts to 8-bit instructions which only work with eax, ebx, ecx and
edx (al, bl, cl and dl).

Removed the loope instruction.
Review URL: http://codereview.chromium.org/548002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3577 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-11 15:19:53 +00:00