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162 Commits

Author SHA1 Message Date
ricow@chromium.org
3d245133a3 Enable compilation of very simple functions in x64 crankshaft. 
This change includes support for safepointtables and adding deoptimization info (but not for deoptimizing).

Implemented crankshaft functions:
CallCode
GenerateSafepointTable
RegisterEnvironmentForDeoptimization
EmitGoto


This change allows us to compile very simple functions with crankshaft:
An empty function
A function returning a constant.
A function returning a parameter.

There is 6 disabled tests that require us to be able to deoptimize
which is currently not supported.


Review URL: http://codereview.chromium.org/6310009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6350 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-01-17 13:11:39 +00:00
lrn@chromium.org
2b4767b584 X64: Fix allocated register name table. 
BUG=
TEST=

Review URL: http://codereview.chromium.org/6247006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6325 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-01-14 14:03:05 +00:00
ricow@chromium.org
5e557d3624 Add implementations of some more x64 lithium methods. 
This puts us very close to being able to compile the empty function.

This changes only has a small number of 64 bit specific assembler instructions.

The remaining changes are much more platform specific and will go in another change.

Review URL: http://codereview.chromium.org/6247005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6306 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-01-14 10:27:25 +00:00
lrn@chromium.org
ba023c5405 X64 Crankshaft: Ported lots of boilerplate code. 
Small tweaks to make X64 compliant.
A few UNIMPLEMENTED left, but most empty functions call Abort to bail out.

Review URL: http://codereview.chromium.org/6201006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6297 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-01-13 10:04:02 +00:00
whesse@chromium.org
7fa57552fa Cleanup of x64 code. Rearrange functions in ic-x64.cc to match order in ic-ia32.cc. Remove unused declarations, and move a constant to assembler-x64.h. 
Review URL: http://codereview.chromium.org/6020012

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6143 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-01-04 09:50:35 +00:00
kasperl@chromium.org
90b3370374 Update V8 to version 3.0 (re-land r5920). 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5922 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-12-07 11:31:57 +00:00
kasperl@chromium.org
51b494d096 Revert r5920. Will re-land shortly. 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5921 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-12-07 11:01:02 +00:00
kasperl@chromium.org
e5860bd6a8 Update V8 to version 3.0. 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5920 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-12-07 09:11:56 +00:00
whesse@chromium.org
66836efbba Add generated code to calculate Math.log and to search Transcendental cache for logs. Implemented on all platforms. 
Review URL: http://codereview.chromium.org/5437002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5912 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-12-02 11:20:44 +00:00
vegorov@chromium.org
746d72420c Improve positions recording for calls. 
Review URL: http://codereview.chromium.org/4469002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5768 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-11-04 15:12:03 +00:00
kmillikin@chromium.org
9c503a8330 Fix some inconsistent formatting. 
I noticed we sometimes had extra spaces before and after the "const"
keyword.  Probably the result of a search and replace gone wrong.

This is a whitespace only change.

Review URL: http://codereview.chromium.org/3427021

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5519 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-09-24 08:25:31 +00:00
ricow@chromium.org
240cee91e4 Add support for near labels. 
This change introduces near labels in the assembler, allowing us to
uptimize forward jumps (conditional and unconditional) if we can
guarantee that the jump is witin range -128 to +127.

I changed a large fractions of the existing Labels to NearLabels, and
left out cases where it was not immediately clear if it could be used
or not (not immediately clear means labels covering a large code
block, or used in function calls which we could potentially change to
accept near labels). 

Review URL: http://codereview.chromium.org/3388004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5460 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-09-15 11:43:12 +00:00
antonm@chromium.org
9d6fd08276 Port faster callbacks invocation to x64. 
It's a port of http://code.google.com/p/v8/source/detail?r=3209 to x64 platform.
That allows invocation of callbacks without going into runtime.

Review URL: http://codereview.chromium.org/2801008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5141 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-07-28 09:36:53 +00:00
lrn@chromium.org
40d86c616c X64: Remove more fpu code. Unroll more local initialization loops. 
Review URL: http://codereview.chromium.org/2815028

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4934 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-24 09:03:49 +00:00
lrn@chromium.org
0dee9a7942 X64: Change some fpu operations to use XMM registers. 
Review URL: http://codereview.chromium.org/2827022

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4930 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-23 14:05:18 +00:00
lrn@chromium.org
a2fc244de2 X64: A bunch of small fixes. 
Make push/pop use emit_optional_rex32.
Fix bug in disassembler (swapped name of comisd/ucomisd).
Use fstp in FCmp macro.

Review URL: http://codereview.chromium.org/2818026

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4928 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-23 11:48:30 +00:00
lrn@chromium.org
2bd8d3323b X64: Change strategy for spilling to match ia32. It's just better. 
Align deferred code blocks to 16-byte address boundaries.

Review URL: http://codereview.chromium.org/2855018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4914 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-22 10:07:57 +00:00
lrn@chromium.org
26e692af2f X64: Change some smi operations to work on untagged integers instead. 
Use direct reading and writing of integers from Smi fields.
Change RecordWrite with 0 offset to take untagged index instead of
smi tagged index.

Review URL: http://codereview.chromium.org/2872005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4893 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-17 15:48:43 +00:00
ager@chromium.org
6702ace935 Move definition of NegateConditon from assembler*-inl.h files to 
assembler*.h files to make clang happy. There was no reason for having
the definition in the -inl.h files in the first place.

Review URL: http://codereview.chromium.org/2825008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4888 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-17 08:41:48 +00:00
ager@chromium.org
2043956c54 Remove the comisd instruction from the ia32 and x64 assemblers. We 
should always use ucomisd.

Add missing pop from floating-point stack in case of allocation failure.
Review URL: http://codereview.chromium.org/2831009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4878 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-16 12:32:34 +00:00
sgjesse@chromium.org
634fb9152c More precise break points and stepping when debugging 
Added support for more precise break points when debugging and stepping. To achieve that additional nop instructions are inserted where breaking would otherwise be impossible. The number of nop instructions inserted are sufficient to make place for patching with a call to a debug break code stub. On Intel that is 5 nop's for 32-bit and 13 for 64-bit. Om ARM 3 nop instructions (12 bytes) are required.

In order to avoid inserting nop's in to many places a simple ast checker have been added to check whether there are breakable code in a statement or expression. If it is possible to break in an expression no additional break enabeling code is inserted.

Added break locations to the true and false part of a conditional expression.

Added stepping tests to cover more constructs.

These changes are only in the full compiler.

Changed the default value for the option --debugger in teh d8 shell from true to false. The reason for this is that with --debugger turned on the full compiler will be used for all code in when running d8, which can be unexpeceted.

Review URL: http://codereview.chromium.org/2693002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4820 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-06-08 12:04:49 +00:00
lrn@chromium.org
7bfe569088 X64: Many small tweaks and more usages of "load smi as int32". 
Review URL: http://codereview.chromium.org/2266003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4739 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-27 10:25:33 +00:00
lrn@chromium.org
4afc3d3c4f X64: Make smi memory operations work directly on the embedded value. 
Adds Operand-relative Operand constructor.

Review URL: http://codereview.chromium.org/2242002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4725 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-26 10:02:07 +00:00
lrn@chromium.org
7410865adb X64: Make all arithmetic ops, and a few other, try to avoid rsp and r12 as base register. 
Using rsp or r12 as the "base" register of the ModR/M byte forces a SIB byte,
even with no index register. Some operations can avoid this by using another,
equivalent, encoding that swaps the meaning of the base and register parts.

Review URL: http://codereview.chromium.org/2075010

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4678 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-19 08:16:52 +00:00
lrn@chromium.org
44fb6cc8d3 X64: Made bit-fiddling fallback for double-to-int32 conversion. 
Review URL: http://codereview.chromium.org/2048007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4648 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-12 11:16:35 +00:00
lrn@chromium.org
9f859fef26 Make X64 double-to-int32 conversion use the 64-bit version of cvttsd2si. 
Use type info to allow ia32 to use the 32-bit versions in some cases.
Remove sse3-specific code from X64 GenericBinaryOpStub.

Review URL: http://codereview.chromium.org/1992011

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4632 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-10 11:38:58 +00:00
lrn@chromium.org
1790c3534a X64: Port inline transcendental cache to X64. 
Review URL: http://codereview.chromium.org/1860001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4567 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-03 10:43:49 +00:00
ager@chromium.org
62e8d5a789 Port inline version of Math.sqrt and Math.pow from ia32 to x64. 
Review URL: http://codereview.chromium.org/1774010

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4541 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-04-28 14:43:51 +00:00
whesse@chromium.org
a8e817161a Optimize the assembly code generated for Math.random() 
Review URL: http://codereview.chromium.org/1631008

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4384 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-04-12 10:07:50 +00:00
ager@chromium.org
a8a7a74bb3 Fix presubmit errors. 
I will lint my code, I will lint my code, I will lint my code. :)

TBR=sgjesse@chromium.org
Review URL: http://codereview.chromium.org/1115007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4193 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-03-19 12:53:55 +00:00
ager@chromium.org
1bf60267e7 Port number-dictionary probing in generated code to x64. 
BUG=640
Review URL: http://codereview.chromium.org/1113001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4192 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-03-19 12:26:45 +00:00
whesse@chromium.org
df9544d598 Declare register names as constants in assembler-x64.h. Fix for issue 615. 
Review URL: http://codereview.chromium.org/650136

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3924 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-22 11:41:52 +00:00
sgjesse@chromium.org
f937e7daa5 Fix array allocation in generated code on x64 
The porting of array allocation in generated code from ia32 to x64 wrongly assumed that a smi contained the actual number times 2. Removed the constant times_half_pointer_size, as it will probably not be needed.
Review URL: http://codereview.chromium.org/596084

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3845 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-12 13:49:57 +00:00
lrn@chromium.org
96127b68e5 Ported ia32 optimization of revision 3487 to x64. 
Review URL: http://codereview.chromium.org/597005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3821 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-09 13:10:32 +00:00
sgjesse@chromium.org
9b4312fd76 Fixed random style violations. 
Review URL: http://codereview.chromium.org/574009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3801 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-04 21:32:02 +00:00
sgjesse@chromium.org
0528427a1b Change to src/x64/assembler-x64.h missing from r3740 
TBR=lrn@chromium.org

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3741 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-29 10:56:26 +00:00
ager@chromium.org
68f537d2b1 Port code to load an integer directly from a heap number from ia32 to x64. 
For now, this is a direct port from ia32, so there is probably still
stuff that can be improved here.
Review URL: http://codereview.chromium.org/555131

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3717 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-27 13:34:29 +00:00
lrn@chromium.org
76774115c0 Ported SubStringStub to X64. 
Review URL: http://codereview.chromium.org/555049

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3683 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-25 08:55:08 +00:00
lrn@chromium.org
55177a2644 X64 implementation of native ascii string compare. 
Review URL: http://codereview.chromium.org/545108

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3627 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-18 11:22:03 +00:00
lrn@chromium.org
eee6c6405e RegExp bitmap test for word character. 
Review URL: http://codereview.chromium.org/547024

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3626 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-18 09:49:50 +00:00
fschneider@chromium.org
5debbc3693 Move CPU-specific constants from debug.h into the platform-specific directories. 
The constant for the return sequence length (JSReturnSequenceLength) was
defined in debug.h. Since this constant are also needed outside the debugger code
I moved them into assembler-xxx.h. Otherwise compiling with debuggersupport=off
would fail on ARM.

BUG=http://code.google.com/p/v8/issues/detail?id=533

Review URL: http://codereview.chromium.org/456001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3383 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-11-30 15:09:49 +00:00
sgjesse@chromium.org
459e4c6b0c Changes to Intel shift functions 
Change name of shifts picking the shift count from cl to sal_cl, shl_cl and shr_cl.

Add special encoding of shift by one for shr which was missing it.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3314 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-11-17 08:35:43 +00:00
erik.corry@gmail.com
df4f52347b Allow a platform to indicate that some CPU features are always 
available.  We use this to ensure that snapshots on MacOSX can
use SSE2 instructions.  Also clean up and assertify the
handling of things we can't do when we are generating a
snapshot.  Fix a bug in the new serialization tests where
they activated Snapshot::enable() too late after code had been
generated that assumed no snapshots.
Review URL: http://codereview.chromium.org/391051

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3301 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-11-13 12:32:57 +00:00
lrn@chromium.org
d53f05e3e2 Fix warnings on Win64. 
Set warning level to /W3 and change implicit conversions from size_t
to int. Most "fixes" are simply manifesting the implicit casts or using
a special strlen replacement that returns int.

Review URL: http://codereview.chromium.org/390004


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3273 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-11-11 09:50:06 +00:00
erik.corry@gmail.com
dbd7f20d2d Introduce a switch for the new snapshot code and switch 
it on by default.  Includes bug fixes for new snapshots.
Review URL: http://codereview.chromium.org/342054

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3184 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-30 10:23:12 +00:00
erik.corry@gmail.com
97de363ef5 * Fix new snapshot code on ARM. 
Review URL: http://codereview.chromium.org/344011

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3161 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-28 12:37:54 +00:00
erik.corry@gmail.com
fb2317b63b New snapshot framework. Doesn't work on ARM yet (code targets 
are different).  Is able to deserialize the whole heap and run
some stuff.  Not available as the primary snapshot system yet.
Review URL: http://codereview.chromium.org/335009

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3142 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-27 11:54:01 +00:00
fschneider@chromium.org
dcee14979f Generate more compact XOR on 64-bit architecture when using xor to zero out registers. 
When using xor to zero a 64-bit register, generate 32-bit instruction instead.
(according to Intel 64-bit mode coding guidelines) 

previous code for zeroing RAX:
  xor rax, rax  

==>

new code for zeroing RAX: 
  xor eax, eax

The 32-bit operand form has the same semantics: It also zeroes the upper 
32-bit of rax and its encoding uses 1 byte less.

Review URL: http://codereview.chromium.org/330018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3132 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-26 14:38:22 +00:00
lrn@chromium.org
6f1d641fb6 X64/Win64: Alternative implementation of fmod in general. 
Review URL: http://codereview.chromium.org/303034


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3116 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-23 09:18:19 +00:00
kbr@chromium.org
d5f00cf6cc Add optimized ICs for new CanvasArray types introduced in WebGL 
specification under development. This is a follow-on CL to
http://codereview.chromium.org/293023 .

Based on review feedback, defined the behavior of storing NaN and
+/-Infinity into external arrays of integer types as storing 0. Added
test cases. Added fucomi instruction to assembler. Fixed bug in
KeyedLoadIC::GenerateExternalArray when allocation of HeapNumber
failed. Fixed bug in encoding of 16-bit immediate arithmetic
instructions in 64-bit port.

Removed raising of exceptions for negative array indices passed to
external arrays and associated tests. Based on current discussion in
WebGL working group, will probably end up removing the exception
throwing altogether.

Review URL: http://codereview.chromium.org/294022

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3113 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-22 14:49:00 +00:00
whesse@chromium.org
2a63594602 Commit fucomip change 197037 http://codereview.chromium.org/197037/show 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3100 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-21 09:24:25 +00:00
kbr@chromium.org
46e6297e3e Added infrastructure for optimizing new CanvasArray types in WebGL 
specification under development. The optimizations are patterned after
those previously done for CanvasPixelArray. This CL adds all of the
necessary framework but continues to use the generic KeyedLoadIC and
KeyedStoreIC code, to create a baseline for benchmarking purposes. The
next CL will add the optimized ICs to ic-ia32.cc and ic-x64.cc.

These new CanvasArray types have different semantics than
CanvasPixelArray; out-of-range values are clamped via C cast
semantics, which is cheaper than the clamping behavior specified by
CanvasPixelArray. Out-of-range indices raise exceptions instead of
being silently ignored.

As part of this work, pulled FloatingPointHelper::AllocateHeapNumber
up to MacroAssembler on ia32 and x64 platforms. Slightly refactored
KeyedLoadIC and KeyedStoreIC. Fixed encoding for fistp_d on x64 and
added a few more instructions that are needed for the new ICs. The
test cases in test-api.cc have been verified by hand to exercise all
of the generated code paths in the forthcoming specialized ICs.

Review URL: http://codereview.chromium.org/293023

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3096 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-20 15:26:17 +00:00
sgjesse@chromium.org
8105ae3106 Optimize calls to GenericBinaryStub. 
The calls to GenericBinaryStub can now pass the arguments in registers instead of on the stack. It is supported for ADD, SUB, MUL and DIV. The convention in GenericBinaryStub is not changed so the left operand is passed in edx and the right one in eax. When the stub contains smi code arguments are always passed on the stack as the smi code has to have left and right operands on eax and ebx, so moving from edx,eax to eax,ebx is not worth it and the smi code also trashes the registers so if arguments where passed in registers they would have to be saved on the stack anyway.

Added flags to disable the use of certain Intel CPU features to make it easier to test different code paths.
Review URL: http://codereview.chromium.org/246075

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3041 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-08 14:27:46 +00:00
lrn@chromium.org
aed6a37c10 X64: Convert smis to holding 32 bits of payload. 
Review URL: http://codereview.chromium.org/196139


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3037 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-08 12:36:12 +00:00
sgjesse@chromium.org
cab2794e95 Change clamping 0..255 instruction sequence for pixel array code. 
The subb instruction added to the IA-32 assembler is not used as dec_b ended up being used instead.

There is a mesurable difference.
Review URL: http://codereview.chromium.org/246076

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3033 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-08 07:09:46 +00:00
whesse@chromium.org
cc0c626d70 Add near calls (32-bit displacement) to Code objects on X64 platform. 
Review URL: http://codereview.chromium.org/200095

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3021 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-10-06 13:11:05 +00:00
sgjesse@chromium.org
ab34189c30 Handle array construction in native code (x64 version). 
Ported the handle array construction in native code to x64. See http://codereview.chromium.org/193125 for details.

Please take a closer look of my use of the macro assembler Smi abstractions.
Review URL: http://codereview.chromium.org/209048

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2960 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-23 13:04:07 +00:00
whesse@chromium.org
996f1d4ee3 Rename a constant to kCallTargetAddressOffset 
Review URL: http://codereview.chromium.org/192075

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2876 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-11 12:41:27 +00:00
lrn@chromium.org
158dcbc39d X64: Extract all smi operations into MacroAssembler macros. 
First step in changing Smi representation.

Review URL: http://codereview.chromium.org/196077


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2869 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-10 12:55:27 +00:00
whesse@chromium.org
0f20431c36 X64: Use sahf instruction only on processors that support it. 
Review URL: http://codereview.chromium.org/183028

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2793 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-01 11:32:20 +00:00
lrn@chromium.org
fdf31f7f5e X64: Implement debugger hooks. 
Debugger is now fully functional.
Fix difference in emitting statement positions to match ia32.

Review URL: http://codereview.chromium.org/171107


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2716 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-08-19 10:18:30 +00:00
lrn@chromium.org
4254388c14 X64: Implement RegExp natively. 
Review URL: http://codereview.chromium.org/165443


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2688 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-08-14 11:24:32 +00:00
lrn@chromium.org
6ad8b09efb X64: Implement fast charCodeAt. 
Review URL: http://codereview.chromium.org/164135


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2648 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-08-07 11:16:26 +00:00
lrn@chromium.org
fd8b376989 X64: Reenabled RSet. 
Review URL: http://codereview.chromium.org/160453


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2607 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-08-03 11:05:26 +00:00
lrn@chromium.org
dc8ca16931 X64: Added inline keyed load/store and a bunch of other missing functions. 
Review URL: http://codereview.chromium.org/160272


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2585 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-30 09:18:14 +00:00
whesse@chromium.org
79b52509d3 X64: Fix error in division & modulus, adjust mjsunit test status, fix lint error in objects.h 
Review URL: http://codereview.chromium.org/159584

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2581 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-30 07:31:54 +00:00
whesse@chromium.org
500e10b648 Add inline caching for keyed loads and stores. Remove extra parentheses from some files. 
Review URL: http://codereview.chromium.org/159266

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2534 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-24 11:22:35 +00:00
whesse@chromium.org
ff242173c3 Make stub cache hash work on X64 platform. Stub cache now works. 
Switch arguments of 32-bit arithmetic instructions so they are consistent
with 64-bit arithmetic instructions (all on X64 platforms).
Review URL: http://codereview.chromium.org/155849

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2516 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-21 13:30:46 +00:00
whesse@chromium.org
894af58c82 Change tests status for x64, make test runner pass --arch flag to Scons, add to x64 disassembler. Copied from http://codereview.chromium.org/155346 so it can be committed. 
Review URL: http://codereview.chromium.org/149608

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2456 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-14 11:39:45 +00:00
lrn@chromium.org
e3bb851efb X64: Fix bug in left-shift. 
Also changed a few other places that looked suspicious in the same way.
Added more info to failing test case and rewrote incorrect uses of mjsunit "fail" function.

Review URL: http://codereview.chromium.org/155279


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2409 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-09 08:00:12 +00:00
lrn@chromium.org
9cecee80f1 X64: Disassembler updated to using REX, extended registers and some X64 opcodes. 
Not all opcodes fixed yet (some should be invalid in 64-bit mode, others should be added).

Review URL: http://codereview.chromium.org/155087


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2375 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-07 12:40:15 +00:00
whesse@chromium.org
6cf6824c17 X64: Make comparisons work on zero-extended smis. 
Review URL: http://codereview.chromium.org/155083

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2364 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-06 13:21:39 +00:00
whesse@chromium.org
0a774c9c18 X64: Use low bits of registers in emit_sse_operand. Enable --stop-at flag. 
Review URL: http://codereview.chromium.org/155052

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2356 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-03 13:30:15 +00:00
whesse@chromium.org
d53e5f8d8a X64: Remove optimistic smi operations on non-smis. They cannot be undone on X64. 
Review URL: http://codereview.chromium.org/151200

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2348 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-07-03 09:24:53 +00:00
erik.corry@gmail.com
4a30e3f58e * Add missing imul instruction on Intel. 
* Fix incorrect signedness in disassembly of umull/mull on ARM.
* Fix incorrect register order in disassembly of umull/mull.
* Fix incorrect assembly of umull on ARM.
* Remove retroactively obsoleted restriction on choice of
  registers in mul instructions on ARM.
Review URL: http://codereview.chromium.org/150002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2292 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-29 09:32:06 +00:00
lrn@chromium.org
fa03347706 X64: Count operations (increment, decrement) 
Review URL: http://codereview.chromium.org/149002


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2273 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-25 11:48:27 +00:00
whesse@chromium.org
cc271fe751 X64 implementation: Start compiling native functions. 
Review URL: http://codereview.chromium.org/146083

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2265 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-24 13:48:09 +00:00
whesse@chromium.org
a367522a1a X64 implementation: comparison operations. 
Review URL: http://codereview.chromium.org/146082

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2264 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-24 13:46:07 +00:00
ager@chromium.org
5b4bacdd69 x64 code generation for construct calls, declaring global variables 
and for runtime calls.

We could not handle functions with no explicit return statement.  I
added support for that as well.  The place was hard to find because
code was left out from the codegenerator with no TODO comment.  We
need to make sure to comment if we leave out code when porting
something. :-)

Review URL: http://codereview.chromium.org/146029

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2257 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-24 08:28:42 +00:00
lrn@chromium.org
69764a5d2a X64: Addition binary operation. 
Review URL: http://codereview.chromium.org/146022


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2255 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-23 11:26:05 +00:00
whesse@chromium.org
c19fde4f1c X64 implementation: Change argument to relocator to take a 64-bit delta. Change maximum relocation info encoding length. 
Review URL: http://codereview.chromium.org/146021

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2252 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-23 09:50:51 +00:00
whesse@chromium.org
dcd25643bd X64 implementation: Correct kTargetAddrToReturnAddrDist value for x64. 
Review URL: http://codereview.chromium.org/140063

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2240 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-22 14:46:33 +00:00
whesse@chromium.org
83ad579ac5 X64 implementation: Add high_bit() and low_bits() to register methods. 
Review URL: http://codereview.chromium.org/141032

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2231 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-22 08:17:44 +00:00
whesse@chromium.org
8ad2edb6b5 Clarify precedence of operations involving bitwise and(&) in x64/assembler. 
Review URL: http://codereview.chromium.org/131099

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2223 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-19 09:12:20 +00:00
lrn@chromium.org
e9b13d9c39 X64: Implementation of a bunch of stubs, and some new opcodes. 
Review URL: http://codereview.chromium.org/125185


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2203 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-17 11:50:33 +00:00
kmillikin@chromium.org
73fe551048 Remove the unused support for jump-table switch statements. 
Review URL: http://codereview.chromium.org/126193

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2183 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-16 09:50:37 +00:00
whesse@chromium.org
f1fcab31c2 X64 implementation starts using virtual frame and register allocators. 
Review URL: http://codereview.chromium.org/123018

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2146 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-11 13:51:46 +00:00
lrn@chromium.org
525b72a4d5 X64: Implemented InvokeFunction 
Review URL: http://codereview.chromium.org/122030


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2142 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-11 10:46:28 +00:00
whesse@chromium.org
2de98f8e55 Add statistics operations and long calls and jumps to x64 macro assembler. 
Remove unimplemented instructions from x64 assembler.  Add operand-size
suffixes to add, sub, inc, dec, and cmp.
Review URL: http://codereview.chromium.org/118380

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2139 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-10 15:53:46 +00:00
lrn@chromium.org
13e548af1d X64: Implement CEntryStub and JSEntryTrampoline. 
Still some supporting functions missing.

Review URL: http://codereview.chromium.org/114085


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2130 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-10 09:48:15 +00:00
lrn@chromium.org
b918e64dc3 X64: JSEntry Stub 
Review URL: http://codereview.chromium.org/118115


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2104 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-04 11:54:14 +00:00
whesse@chromium.org
34de62698c Add multiplication and division to x64 assembler. Add emit_modrm() function. 
Review URL: http://codereview.chromium.org/119078

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2098 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-03 13:30:31 +00:00
lrn@chromium.org
5e83c2cc9c X64: Added implementations of Set(..., Immediate) to macro assembler. 
Removed duplicates comments in assembler-x64.cc.

Review URL: http://codereview.chromium.org/119035


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2091 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-03 10:30:50 +00:00
whesse@chromium.org
ea0644506d Add miscellaneous operations to x64 assembler. 
Review URL: http://codereview.chromium.org/113997

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2089 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-02 13:40:52 +00:00
whesse@chromium.org
8c78e673ad Add shift operations to x64 assembler. 
Review URL: http://codereview.chromium.org/118107

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2088 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-02 11:43:26 +00:00
lrn@chromium.org
734f1fd135 X64: Added jmp and call and nop(n) to X64 assembler. 
Review URL: http://codereview.chromium.org/115920


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2085 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-02 07:21:05 +00:00
whesse@chromium.org
b4a219774a Add test, neg, and not instructions to x64 assembler 
Review URL: http://codereview.chromium.org/112066

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2076 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-05-29 08:56:31 +00:00
whesse@chromium.org
ac5eabddee Add more arithmetic to x64 assembler. 
Review URL: http://codereview.chromium.org/115857

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2070 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-05-28 10:06:48 +00:00
whesse@chromium.org
76d5e4e06d Add immediate operands and arithmetic operations to the x64 assembler. 
Review URL: http://codereview.chromium.org/115816

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2069 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-05-28 09:18:17 +00:00
whesse@chromium.org
88635e401e Implement memory operands for instructions in the x64 assembler. 
Review URL: http://codereview.chromium.org/113841

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2062 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-05-27 08:15:31 +00:00