2016-08-23 19:59:19 +00:00
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// Copyright 2016 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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2020-11-02 07:23:29 +00:00
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#include <algorithm>
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#include <array>
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#include <cmath>
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#include <cstdint>
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#include <cstring>
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2020-05-18 22:40:02 +00:00
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#include <limits>
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2021-03-18 21:41:50 +00:00
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#include <map>
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2020-11-02 07:23:29 +00:00
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#include <tuple>
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2019-01-10 11:47:08 +00:00
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#include <type_traits>
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2021-03-18 21:41:50 +00:00
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#include <utility>
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2020-11-02 07:23:29 +00:00
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#include <vector>
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2019-01-10 11:47:08 +00:00
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2018-07-13 18:24:42 +00:00
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#include "src/base/bits.h"
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2020-11-02 07:23:29 +00:00
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#include "src/base/logging.h"
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#include "src/base/macros.h"
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#include "src/base/memory.h"
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2019-01-10 11:47:08 +00:00
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#include "src/base/overflowing-math.h"
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2021-01-19 23:19:03 +00:00
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#include "src/base/safe_conversions.h"
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2020-11-02 07:23:29 +00:00
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#include "src/base/utils/random-number-generator.h"
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#include "src/codegen/cpu-features.h"
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#include "src/codegen/machine-type.h"
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2020-10-28 02:43:49 +00:00
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#include "src/common/globals.h"
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2020-11-02 07:23:29 +00:00
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#include "src/flags/flags.h"
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#include "src/utils/utils.h"
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#include "src/utils/vector.h"
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#include "src/wasm/compilation-environment.h"
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#include "src/wasm/value-type.h"
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#include "src/wasm/wasm-constants.h"
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2020-10-12 17:09:03 +00:00
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#include "src/wasm/wasm-opcodes.h"
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2016-08-23 19:59:19 +00:00
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#include "test/cctest/cctest.h"
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#include "test/cctest/compiler/value-helper.h"
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#include "test/cctest/wasm/wasm-run-utils.h"
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#include "test/cctest/wasm/wasm-simd-utils.h"
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#include "test/common/flag-utils.h"
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#include "test/common/wasm/flag-utils.h"
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2017-04-25 11:29:17 +00:00
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#include "test/common/wasm/wasm-macro-gen.h"
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2016-08-23 19:59:19 +00:00
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2017-09-01 12:57:34 +00:00
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namespace v8 {
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namespace internal {
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namespace wasm {
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2017-09-21 03:29:52 +00:00
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namespace test_run_wasm_simd {
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2016-08-23 19:59:19 +00:00
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[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
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namespace {
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2021-03-22 17:59:57 +00:00
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using Shuffle = std::array<int8_t, kSimd128Size>;
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[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
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2020-08-04 11:09:23 +00:00
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#define WASM_SIMD_TEST(name) \
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void RunWasm_##name##_Impl(LowerSimd lower_simd, \
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TestExecutionTier execution_tier); \
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TEST(RunWasm_##name##_turbofan) { \
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EXPERIMENTAL_FLAG_SCOPE(simd); \
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RunWasm_##name##_Impl(kNoLowerSimd, TestExecutionTier::kTurbofan); \
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} \
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TEST(RunWasm_##name##_liftoff) { \
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EXPERIMENTAL_FLAG_SCOPE(simd); \
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RunWasm_##name##_Impl(kNoLowerSimd, TestExecutionTier::kLiftoff); \
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} \
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TEST(RunWasm_##name##_interpreter) { \
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EXPERIMENTAL_FLAG_SCOPE(simd); \
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RunWasm_##name##_Impl(kNoLowerSimd, TestExecutionTier::kInterpreter); \
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} \
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void RunWasm_##name##_Impl(LowerSimd lower_simd, \
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TestExecutionTier execution_tier)
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2020-01-23 21:02:10 +00:00
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2019-01-10 11:47:08 +00:00
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// For signed integral types, use base::AddWithWraparound.
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template <typename T, typename = typename std::enable_if<
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std::is_floating_point<T>::value>::type>
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[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
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T Add(T a, T b) {
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return a + b;
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}
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2019-01-10 11:47:08 +00:00
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// For signed integral types, use base::SubWithWraparound.
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template <typename T, typename = typename std::enable_if<
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std::is_floating_point<T>::value>::type>
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[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
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T Sub(T a, T b) {
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return a - b;
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}
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2019-01-10 11:47:08 +00:00
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// For signed integral types, use base::MulWithWraparound.
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template <typename T, typename = typename std::enable_if<
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std::is_floating_point<T>::value>::type>
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2017-01-26 02:18:00 +00:00
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T Mul(T a, T b) {
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return a * b;
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[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
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}
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2017-02-07 17:33:37 +00:00
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template <typename T>
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T Minimum(T a, T b) {
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return std::min(a, b);
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2017-02-07 17:33:37 +00:00
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}
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template <typename T>
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T Maximum(T a, T b) {
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return std::max(a, b);
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2017-02-07 17:33:37 +00:00
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}
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template <typename T>
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T UnsignedMinimum(T a, T b) {
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using UnsignedT = typename std::make_unsigned<T>::type;
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return static_cast<UnsignedT>(a) <= static_cast<UnsignedT>(b) ? a : b;
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}
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template <typename T>
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T UnsignedMaximum(T a, T b) {
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using UnsignedT = typename std::make_unsigned<T>::type;
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return static_cast<UnsignedT>(a) >= static_cast<UnsignedT>(b) ? a : b;
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}
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2021-03-29 22:45:22 +00:00
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template <typename T, typename U = T>
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U Equal(T a, T b) {
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return a == b ? -1 : 0;
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}
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2019-03-08 00:43:11 +00:00
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2021-03-29 22:45:22 +00:00
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template <>
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int32_t Equal(float a, float b) {
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2017-06-20 22:04:57 +00:00
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return a == b ? -1 : 0;
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[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
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}
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2021-03-29 22:45:22 +00:00
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template <>
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int64_t Equal(double a, double b) {
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return a == b ? -1 : 0;
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}
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2019-03-08 00:43:11 +00:00
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2021-03-29 22:45:22 +00:00
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template <typename T, typename U = T>
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U NotEqual(T a, T b) {
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return a != b ? -1 : 0;
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2017-01-26 02:18:00 +00:00
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}
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2016-12-20 16:49:53 +00:00
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2021-03-29 22:45:22 +00:00
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template <>
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int32_t NotEqual(float a, float b) {
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return a != b ? -1 : 0;
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}
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2019-03-08 00:43:11 +00:00
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2021-03-29 22:45:22 +00:00
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template <>
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int64_t NotEqual(double a, double b) {
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return a != b ? -1 : 0;
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}
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template <typename T, typename U = T>
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U Less(T a, T b) {
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return a < b ? -1 : 0;
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2017-01-26 02:18:00 +00:00
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}
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2021-03-29 22:45:22 +00:00
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template <>
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int32_t Less(float a, float b) {
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return a < b ? -1 : 0;
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}
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2019-03-08 00:43:11 +00:00
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2021-03-29 22:45:22 +00:00
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template <>
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int64_t Less(double a, double b) {
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return a < b ? -1 : 0;
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}
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template <typename T, typename U = T>
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U LessEqual(T a, T b) {
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return a <= b ? -1 : 0;
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}
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template <>
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int32_t LessEqual(float a, float b) {
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return a <= b ? -1 : 0;
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2017-01-26 02:18:00 +00:00
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}
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2021-03-29 22:45:22 +00:00
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template <>
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int64_t LessEqual(double a, double b) {
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return a <= b ? -1 : 0;
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}
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2019-03-08 00:43:11 +00:00
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2021-03-29 22:45:22 +00:00
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template <typename T, typename U = T>
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U Greater(T a, T b) {
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return a > b ? -1 : 0;
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}
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template <>
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int32_t Greater(float a, float b) {
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return a > b ? -1 : 0;
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2017-01-26 02:18:00 +00:00
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}
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2021-03-29 22:45:22 +00:00
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template <>
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int64_t Greater(double a, double b) {
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return a > b ? -1 : 0;
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}
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2019-03-08 00:43:11 +00:00
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2021-03-29 22:45:22 +00:00
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template <typename T, typename U = T>
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U GreaterEqual(T a, T b) {
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return a >= b ? -1 : 0;
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}
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template <>
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int32_t GreaterEqual(float a, float b) {
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return a >= b ? -1 : 0;
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}
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template <>
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int64_t GreaterEqual(double a, double b) {
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return a >= b ? -1 : 0;
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2017-01-26 02:18:00 +00:00
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}
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template <typename T>
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2019-03-08 00:43:11 +00:00
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T UnsignedLess(T a, T b) {
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2017-01-26 02:18:00 +00:00
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using UnsignedT = typename std::make_unsigned<T>::type;
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2017-06-20 22:04:57 +00:00
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return static_cast<UnsignedT>(a) < static_cast<UnsignedT>(b) ? -1 : 0;
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2017-01-26 02:18:00 +00:00
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}
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template <typename T>
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2019-03-08 00:43:11 +00:00
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T UnsignedLessEqual(T a, T b) {
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2017-01-26 02:18:00 +00:00
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using UnsignedT = typename std::make_unsigned<T>::type;
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2017-06-20 22:04:57 +00:00
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return static_cast<UnsignedT>(a) <= static_cast<UnsignedT>(b) ? -1 : 0;
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2017-01-26 02:18:00 +00:00
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}
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template <typename T>
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T UnsignedGreater(T a, T b) {
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2017-01-26 02:18:00 +00:00
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using UnsignedT = typename std::make_unsigned<T>::type;
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2017-06-20 22:04:57 +00:00
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return static_cast<UnsignedT>(a) > static_cast<UnsignedT>(b) ? -1 : 0;
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2017-01-26 02:18:00 +00:00
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}
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template <typename T>
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2019-03-08 00:43:11 +00:00
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T UnsignedGreaterEqual(T a, T b) {
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2017-01-26 02:18:00 +00:00
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using UnsignedT = typename std::make_unsigned<T>::type;
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2017-06-20 22:04:57 +00:00
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return static_cast<UnsignedT>(a) >= static_cast<UnsignedT>(b) ? -1 : 0;
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2017-01-26 02:18:00 +00:00
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}
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2016-12-20 16:49:53 +00:00
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2017-02-07 17:33:37 +00:00
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template <typename T>
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T LogicalShiftLeft(T a, int shift) {
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2019-01-25 00:33:28 +00:00
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using UnsignedT = typename std::make_unsigned<T>::type;
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2019-08-29 23:55:57 +00:00
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return static_cast<UnsignedT>(a) << (shift % (sizeof(T) * 8));
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2017-02-07 17:33:37 +00:00
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}
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template <typename T>
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T LogicalShiftRight(T a, int shift) {
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using UnsignedT = typename std::make_unsigned<T>::type;
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2019-08-29 23:55:57 +00:00
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return static_cast<UnsignedT>(a) >> (shift % (sizeof(T) * 8));
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}
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// Define our own ArithmeticShiftRight instead of using the one from utils.h
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// because the shift amount needs to be taken modulo lane width.
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template <typename T>
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T ArithmeticShiftRight(T a, int shift) {
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return a >> (shift % (sizeof(T) * 8));
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2017-02-07 17:33:37 +00:00
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}
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2020-02-21 04:14:53 +00:00
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template <typename T>
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T Abs(T a) {
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return std::abs(a);
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}
|
[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
|
|
|
} // namespace
|
|
|
|
|
2019-10-08 23:43:15 +00:00
|
|
|
#define WASM_SIMD_CHECK_LANE_S(TYPE, value, LANE_TYPE, lane_value, lane_index) \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_IF(WASM_##LANE_TYPE##_NE(WASM_LOCAL_GET(lane_value), \
|
2019-10-08 23:43:15 +00:00
|
|
|
WASM_SIMD_##TYPE##_EXTRACT_LANE( \
|
2020-12-17 16:55:33 +00:00
|
|
|
lane_index, WASM_LOCAL_GET(value))), \
|
2019-10-08 23:43:15 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO))
|
|
|
|
|
|
|
|
// Unsigned Extracts are only available for I8x16, I16x8 types
|
|
|
|
#define WASM_SIMD_CHECK_LANE_U(TYPE, value, LANE_TYPE, lane_value, lane_index) \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_IF(WASM_##LANE_TYPE##_NE(WASM_LOCAL_GET(lane_value), \
|
2019-10-08 23:43:15 +00:00
|
|
|
WASM_SIMD_##TYPE##_EXTRACT_LANE_U( \
|
2020-12-17 16:55:33 +00:00
|
|
|
lane_index, WASM_LOCAL_GET(value))), \
|
2016-12-06 01:12:15 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO))
|
|
|
|
|
2019-11-15 12:56:22 +00:00
|
|
|
WASM_SIMD_TEST(S128Globals) {
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Set up a global to hold input and output vectors.
|
|
|
|
int32_t* g0 = r.builder().AddGlobal<int32_t>(kWasmS128);
|
|
|
|
int32_t* g1 = r.builder().AddGlobal<int32_t>(kWasmS128);
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(1, WASM_GLOBAL_GET(0)), WASM_ONE);
|
2019-11-15 12:56:22 +00:00
|
|
|
|
|
|
|
FOR_INT32_INPUTS(x) {
|
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
WriteLittleEndianValue<int32_t>(&g0[i], x);
|
|
|
|
}
|
|
|
|
r.Call();
|
|
|
|
int32_t expected = x;
|
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
int32_t actual = ReadLittleEndianValue<int32_t>(&g1[i]);
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-01-29 23:44:10 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Splat) {
|
2019-03-05 01:44:05 +00:00
|
|
|
WasmRunner<int32_t, float> r(execution_tier, lower_simd);
|
|
|
|
// Set up a global to hold output vector.
|
|
|
|
float* g = r.builder().AddGlobal<float>(kWasmS128);
|
|
|
|
byte param1 = 0;
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(param1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-03-05 01:44:05 +00:00
|
|
|
|
|
|
|
FOR_FLOAT32_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
float expected = x;
|
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
float actual = ReadLittleEndianValue<float>(&g[i]);
|
|
|
|
if (std::isnan(expected)) {
|
|
|
|
CHECK(std::isnan(actual));
|
|
|
|
} else {
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
WASM_SIMD_TEST(F32x4ReplaceLane) {
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Set up a global to hold input/output vector.
|
|
|
|
float* g = r.builder().AddGlobal<float>(kWasmS128);
|
|
|
|
// Build function to replace each lane with its (FP) index.
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_F32x4_SPLAT(WASM_F32(3.14159f))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_F32x4_REPLACE_LANE(
|
|
|
|
0, WASM_LOCAL_GET(temp1), WASM_F32(0.0f))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_F32x4_REPLACE_LANE(
|
|
|
|
1, WASM_LOCAL_GET(temp1), WASM_F32(1.0f))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_F32x4_REPLACE_LANE(
|
|
|
|
2, WASM_LOCAL_GET(temp1), WASM_F32(2.0f))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_F32x4_REPLACE_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
3, WASM_LOCAL_GET(temp1), WASM_F32(3.0f))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-03-05 01:44:05 +00:00
|
|
|
|
|
|
|
r.Call();
|
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
CHECK_EQ(static_cast<float>(i), ReadLittleEndianValue<float>(&g[i]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
|
|
|
// Tests both signed and unsigned conversion.
|
2020-07-07 23:53:13 +00:00
|
|
|
WASM_SIMD_TEST(F32x4ConvertI32x4) {
|
2019-03-05 01:44:05 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Create two output vectors to hold signed and unsigned results.
|
|
|
|
float* g0 = r.builder().AddGlobal<float>(kWasmS128);
|
|
|
|
float* g1 = r.builder().AddGlobal<float>(kWasmS128);
|
|
|
|
// Build fn to splat test value, perform conversions, and write the results.
|
|
|
|
byte value = 0;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I32x4_SPLAT(WASM_LOCAL_GET(value))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
0, WASM_SIMD_UNOP(kExprF32x4SConvertI32x4, WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
1, WASM_SIMD_UNOP(kExprF32x4UConvertI32x4, WASM_LOCAL_GET(temp1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
|
|
|
|
2019-03-05 01:44:05 +00:00
|
|
|
FOR_INT32_INPUTS(x) {
|
|
|
|
r.Call(x);
|
2019-03-08 00:43:11 +00:00
|
|
|
float expected_signed = static_cast<float>(x);
|
|
|
|
float expected_unsigned = static_cast<float>(static_cast<uint32_t>(x));
|
2019-03-05 01:44:05 +00:00
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<float>(&g0[i]));
|
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<float>(&g1[i]));
|
|
|
|
}
|
[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-05-23 23:24:10 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Abs) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4Abs, std::abs);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2019-09-25 21:58:07 +00:00
|
|
|
|
2018-05-23 23:24:10 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Neg) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4Neg, Negate);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-03-01 11:13:00 +00:00
|
|
|
|
2019-09-11 16:33:44 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Sqrt) {
|
2020-10-09 00:09:39 +00:00
|
|
|
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4Sqrt, std::sqrt);
|
2019-09-11 16:33:44 +00:00
|
|
|
}
|
|
|
|
|
2020-10-08 20:10:44 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Ceil) {
|
2020-05-26 18:26:17 +00:00
|
|
|
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4Ceil, ceilf, true);
|
|
|
|
}
|
|
|
|
|
2020-10-08 20:10:44 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Floor) {
|
2020-05-26 18:26:17 +00:00
|
|
|
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4Floor, floorf, true);
|
|
|
|
}
|
|
|
|
|
2020-10-08 20:10:44 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Trunc) {
|
2020-05-26 18:26:17 +00:00
|
|
|
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4Trunc, truncf, true);
|
|
|
|
}
|
|
|
|
|
2020-10-08 20:10:44 +00:00
|
|
|
WASM_SIMD_TEST(F32x4NearestInt) {
|
2020-05-26 18:26:17 +00:00
|
|
|
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4NearestInt, nearbyintf,
|
|
|
|
true);
|
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Add) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4BinOpTest(execution_tier, lower_simd, kExprF32x4Add, Add);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Sub) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4BinOpTest(execution_tier, lower_simd, kExprF32x4Sub, Sub);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Mul) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4BinOpTest(execution_tier, lower_simd, kExprF32x4Mul, Mul);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2019-08-23 16:47:41 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Div) {
|
2020-10-09 00:09:39 +00:00
|
|
|
RunF32x4BinOpTest(execution_tier, lower_simd, kExprF32x4Div, base::Divide);
|
2019-08-23 16:47:41 +00:00
|
|
|
}
|
2019-07-29 23:17:15 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Min) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4BinOpTest(execution_tier, lower_simd, kExprF32x4Min, JSMin);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2019-07-29 23:17:15 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Max) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4BinOpTest(execution_tier, lower_simd, kExprF32x4Max, JSMax);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2016-12-20 16:49:53 +00:00
|
|
|
|
2020-10-08 23:41:02 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Pmin) {
|
[wasm-simd] Prototype f32x4 and f64x2 pmin and pmax
This patch implements f32x4.pmin, f32x4.pmax, f64x2.pmin, and f64x2.pmax
for x64 and interpreter.
Pseudo-min and Pseudo-max instructions were proposed in
https://github.com/WebAssembly/simd/pull/122. These instructions
exactly match std::min and std::max in C++ STL, and thus have different
semantics from the existing min and max.
The instruction-selector for x64 switches the operands around, because
it allows for defining the dst to be same as first (really the second
input node), allowing better codegen.
For example, b = f32x4.pmin(a, b) directly maps to vminps(b, b, a) or
minps(b, a), as long as we can define dst == b, and switching the
instruction operands around allows us to do that.
Bug: v8:10501
Change-Id: I06f983fc1764caf673e600ac91d9c0ac5166e17e
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2186630
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#67688}
2020-05-08 16:47:19 +00:00
|
|
|
RunF32x4BinOpTest(execution_tier, lower_simd, kExprF32x4Pmin, Minimum);
|
|
|
|
}
|
|
|
|
|
2020-10-08 23:41:02 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Pmax) {
|
[wasm-simd] Prototype f32x4 and f64x2 pmin and pmax
This patch implements f32x4.pmin, f32x4.pmax, f64x2.pmin, and f64x2.pmax
for x64 and interpreter.
Pseudo-min and Pseudo-max instructions were proposed in
https://github.com/WebAssembly/simd/pull/122. These instructions
exactly match std::min and std::max in C++ STL, and thus have different
semantics from the existing min and max.
The instruction-selector for x64 switches the operands around, because
it allows for defining the dst to be same as first (really the second
input node), allowing better codegen.
For example, b = f32x4.pmin(a, b) directly maps to vminps(b, b, a) or
minps(b, a), as long as we can define dst == b, and switching the
instruction operands around allows us to do that.
Bug: v8:10501
Change-Id: I06f983fc1764caf673e600ac91d9c0ac5166e17e
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2186630
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#67688}
2020-05-08 16:47:19 +00:00
|
|
|
RunF32x4BinOpTest(execution_tier, lower_simd, kExprF32x4Pmax, Maximum);
|
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Eq) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4CompareOpTest(execution_tier, lower_simd, kExprF32x4Eq, Equal);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-27 23:45:03 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Ne) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4CompareOpTest(execution_tier, lower_simd, kExprF32x4Ne, NotEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-03-03 02:31:44 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Gt) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4CompareOpTest(execution_tier, lower_simd, kExprF32x4Gt, Greater);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-03-08 00:01:36 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Ge) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4CompareOpTest(execution_tier, lower_simd, kExprF32x4Ge, GreaterEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-03-08 00:01:36 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Lt) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4CompareOpTest(execution_tier, lower_simd, kExprF32x4Lt, Less);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-03-08 00:01:36 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(F32x4Le) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunF32x4CompareOpTest(execution_tier, lower_simd, kExprF32x4Le, LessEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2Splat) {
|
2019-07-25 21:57:55 +00:00
|
|
|
WasmRunner<int32_t, int64_t> r(execution_tier, lower_simd);
|
|
|
|
// Set up a global to hold output vector.
|
|
|
|
int64_t* g = r.builder().AddGlobal<int64_t>(kWasmS128);
|
|
|
|
byte param1 = 0;
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_I64x2_SPLAT(WASM_LOCAL_GET(param1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-07-25 21:57:55 +00:00
|
|
|
|
|
|
|
FOR_INT64_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
int64_t expected = x;
|
|
|
|
for (int i = 0; i < 2; i++) {
|
|
|
|
int64_t actual = ReadLittleEndianValue<int64_t>(&g[i]);
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ExtractLane) {
|
2019-07-25 21:57:55 +00:00
|
|
|
WasmRunner<int64_t> r(execution_tier, lower_simd);
|
|
|
|
r.AllocateLocal(kWasmI64);
|
|
|
|
r.AllocateLocal(kWasmS128);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(
|
2019-07-25 21:57:55 +00:00
|
|
|
r,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_SIMD_I64x2_EXTRACT_LANE(
|
2019-07-25 21:57:55 +00:00
|
|
|
0, WASM_SIMD_I64x2_SPLAT(WASM_I64V(0xFFFFFFFFFF)))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_SIMD_I64x2_SPLAT(WASM_LOCAL_GET(0))),
|
|
|
|
WASM_SIMD_I64x2_EXTRACT_LANE(1, WASM_LOCAL_GET(1)));
|
2019-07-25 21:57:55 +00:00
|
|
|
CHECK_EQ(0xFFFFFFFFFF, r.Call());
|
|
|
|
}
|
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ReplaceLane) {
|
2019-07-25 21:57:55 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Set up a global to hold input/output vector.
|
|
|
|
int64_t* g = r.builder().AddGlobal<int64_t>(kWasmS128);
|
|
|
|
// Build function to replace each lane with its index.
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I64x2_SPLAT(WASM_I64V(-1))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I64x2_REPLACE_LANE(
|
|
|
|
0, WASM_LOCAL_GET(temp1), WASM_I64V(0))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_I64x2_REPLACE_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
1, WASM_LOCAL_GET(temp1), WASM_I64V(1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-07-25 21:57:55 +00:00
|
|
|
|
|
|
|
r.Call();
|
|
|
|
for (int64_t i = 0; i < 2; i++) {
|
|
|
|
CHECK_EQ(i, ReadLittleEndianValue<int64_t>(&g[i]));
|
|
|
|
}
|
|
|
|
}
|
2019-07-25 23:46:34 +00:00
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2Neg) {
|
2019-07-26 16:44:20 +00:00
|
|
|
RunI64x2UnOpTest(execution_tier, lower_simd, kExprI64x2Neg,
|
|
|
|
base::NegateWithWraparound);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I64x2Abs) {
|
2021-02-09 21:42:15 +00:00
|
|
|
RunI64x2UnOpTest(execution_tier, lower_simd, kExprI64x2Abs, std::abs);
|
|
|
|
}
|
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2Shl) {
|
2019-07-25 23:46:34 +00:00
|
|
|
RunI64x2ShiftOpTest(execution_tier, lower_simd, kExprI64x2Shl,
|
|
|
|
LogicalShiftLeft);
|
|
|
|
}
|
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ShrS) {
|
2019-07-25 23:46:34 +00:00
|
|
|
RunI64x2ShiftOpTest(execution_tier, lower_simd, kExprI64x2ShrS,
|
|
|
|
ArithmeticShiftRight);
|
|
|
|
}
|
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ShrU) {
|
2019-07-25 23:46:34 +00:00
|
|
|
RunI64x2ShiftOpTest(execution_tier, lower_simd, kExprI64x2ShrU,
|
|
|
|
LogicalShiftRight);
|
|
|
|
}
|
2019-07-29 16:58:53 +00:00
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2Add) {
|
2019-07-29 16:58:53 +00:00
|
|
|
RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2Add,
|
|
|
|
base::AddWithWraparound);
|
|
|
|
}
|
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2Sub) {
|
2019-07-29 16:58:53 +00:00
|
|
|
RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2Sub,
|
|
|
|
base::SubWithWraparound);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I64x2Eq) {
|
2019-07-29 16:58:53 +00:00
|
|
|
RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2Eq, Equal);
|
|
|
|
}
|
2019-07-25 21:57:55 +00:00
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I64x2Ne) {
|
2021-02-01 21:40:17 +00:00
|
|
|
RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2Ne, NotEqual);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I64x2LtS) {
|
2021-02-09 21:56:43 +00:00
|
|
|
RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2LtS, Less);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I64x2LeS) {
|
2021-02-09 21:56:43 +00:00
|
|
|
RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2LeS, LessEqual);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I64x2GtS) {
|
2021-02-09 21:56:43 +00:00
|
|
|
RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2GtS, Greater);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I64x2GeS) {
|
2021-02-09 21:56:43 +00:00
|
|
|
RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2GeS, GreaterEqual);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Splat) {
|
2019-07-10 04:22:46 +00:00
|
|
|
WasmRunner<int32_t, double> r(execution_tier, lower_simd);
|
|
|
|
// Set up a global to hold output vector.
|
|
|
|
double* g = r.builder().AddGlobal<double>(kWasmS128);
|
|
|
|
byte param1 = 0;
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(param1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-07-10 04:22:46 +00:00
|
|
|
|
|
|
|
FOR_FLOAT64_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
double expected = x;
|
|
|
|
for (int i = 0; i < 2; i++) {
|
|
|
|
double actual = ReadLittleEndianValue<double>(&g[i]);
|
|
|
|
if (std::isnan(expected)) {
|
|
|
|
CHECK(std::isnan(actual));
|
|
|
|
} else {
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2ExtractLane) {
|
2019-07-10 04:22:46 +00:00
|
|
|
WasmRunner<double, double> r(execution_tier, lower_simd);
|
|
|
|
byte param1 = 0;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmF64);
|
|
|
|
byte temp2 = r.AllocateLocal(kWasmS128);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(temp1,
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_SIMD_F64x2_EXTRACT_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
0, WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(param1)))),
|
|
|
|
WASM_LOCAL_SET(temp2, WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(temp1))),
|
|
|
|
WASM_SIMD_F64x2_EXTRACT_LANE(1, WASM_LOCAL_GET(temp2)));
|
2019-07-10 04:22:46 +00:00
|
|
|
FOR_FLOAT64_INPUTS(x) {
|
|
|
|
double actual = r.Call(x);
|
|
|
|
double expected = x;
|
|
|
|
if (std::isnan(expected)) {
|
|
|
|
CHECK(std::isnan(actual));
|
|
|
|
} else {
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2ReplaceLane) {
|
2019-07-10 04:22:46 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2019-10-23 21:32:34 +00:00
|
|
|
// Set up globals to hold input/output vector.
|
|
|
|
double* g0 = r.builder().AddGlobal<double>(kWasmS128);
|
|
|
|
double* g1 = r.builder().AddGlobal<double>(kWasmS128);
|
2019-07-10 04:22:46 +00:00
|
|
|
// Build function to replace each lane with its (FP) index.
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_F64x2_SPLAT(WASM_F64(1e100))),
|
2020-05-05 18:04:33 +00:00
|
|
|
// Replace lane 0.
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_F64x2_REPLACE_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
0, WASM_LOCAL_GET(temp1), WASM_F64(0.0f))),
|
2020-05-05 18:04:33 +00:00
|
|
|
// Replace lane 1.
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(1, WASM_SIMD_F64x2_REPLACE_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
1, WASM_LOCAL_GET(temp1), WASM_F64(1.0f))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-07-10 04:22:46 +00:00
|
|
|
|
|
|
|
r.Call();
|
2019-10-23 21:32:34 +00:00
|
|
|
CHECK_EQ(0., ReadLittleEndianValue<double>(&g0[0]));
|
|
|
|
CHECK_EQ(1e100, ReadLittleEndianValue<double>(&g0[1]));
|
|
|
|
CHECK_EQ(1e100, ReadLittleEndianValue<double>(&g1[0]));
|
|
|
|
CHECK_EQ(1., ReadLittleEndianValue<double>(&g1[1]));
|
2019-07-10 04:22:46 +00:00
|
|
|
}
|
2019-07-16 04:40:33 +00:00
|
|
|
|
2020-09-22 23:58:40 +00:00
|
|
|
WASM_SIMD_TEST(F64x2ExtractLaneWithI64x2) {
|
2019-10-16 22:59:32 +00:00
|
|
|
WasmRunner<int64_t> r(execution_tier, lower_simd);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r, WASM_IF_ELSE_L(
|
|
|
|
WASM_F64_EQ(WASM_SIMD_F64x2_EXTRACT_LANE(
|
|
|
|
0, WASM_SIMD_I64x2_SPLAT(WASM_I64V(1e15))),
|
|
|
|
WASM_F64_REINTERPRET_I64(WASM_I64V(1e15))),
|
|
|
|
WASM_I64V(1), WASM_I64V(0)));
|
2019-10-16 22:59:32 +00:00
|
|
|
CHECK_EQ(1, r.Call());
|
|
|
|
}
|
|
|
|
|
2020-09-22 23:58:40 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ExtractWithF64x2) {
|
2019-10-16 22:59:32 +00:00
|
|
|
WasmRunner<int64_t> r(execution_tier, lower_simd);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r, WASM_IF_ELSE_L(
|
|
|
|
WASM_I64_EQ(WASM_SIMD_I64x2_EXTRACT_LANE(
|
|
|
|
0, WASM_SIMD_F64x2_SPLAT(WASM_F64(1e15))),
|
|
|
|
WASM_I64_REINTERPRET_F64(WASM_F64(1e15))),
|
|
|
|
WASM_I64V(1), WASM_I64V(0)));
|
2019-10-16 22:59:32 +00:00
|
|
|
CHECK_EQ(1, r.Call());
|
|
|
|
}
|
2019-07-18 09:03:02 +00:00
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Abs) {
|
2019-07-18 09:03:02 +00:00
|
|
|
RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2Abs, std::abs);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Neg) {
|
2019-07-17 06:44:49 +00:00
|
|
|
RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2Neg, Negate);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Sqrt) {
|
2020-10-09 00:09:39 +00:00
|
|
|
RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2Sqrt, std::sqrt);
|
2019-09-11 16:33:44 +00:00
|
|
|
}
|
|
|
|
|
2020-10-08 20:10:44 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Ceil) {
|
2020-06-08 16:45:43 +00:00
|
|
|
RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2Ceil, ceil, true);
|
|
|
|
}
|
2020-06-25 20:08:55 +00:00
|
|
|
|
2020-10-08 20:10:44 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Floor) {
|
2020-06-08 16:45:43 +00:00
|
|
|
RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2Floor, floor, true);
|
|
|
|
}
|
2020-06-29 17:58:15 +00:00
|
|
|
|
2020-10-08 20:10:44 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Trunc) {
|
2020-06-08 16:45:43 +00:00
|
|
|
RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2Trunc, trunc, true);
|
|
|
|
}
|
2020-06-29 20:46:22 +00:00
|
|
|
|
2020-10-08 20:10:44 +00:00
|
|
|
WASM_SIMD_TEST(F64x2NearestInt) {
|
2020-06-08 16:45:43 +00:00
|
|
|
RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2NearestInt, nearbyint,
|
|
|
|
true);
|
|
|
|
}
|
|
|
|
|
2021-01-19 23:19:03 +00:00
|
|
|
template <typename SrcType>
|
|
|
|
void RunF64x2ConvertLowI32x4Test(TestExecutionTier execution_tier,
|
|
|
|
LowerSimd lower_simd, WasmOpcode opcode) {
|
|
|
|
WasmRunner<int32_t, SrcType> r(execution_tier, lower_simd);
|
|
|
|
double* g = r.builder().template AddGlobal<double>(kWasmS128);
|
2021-03-19 22:35:57 +00:00
|
|
|
BUILD(r,
|
|
|
|
WASM_GLOBAL_SET(
|
|
|
|
0,
|
|
|
|
WASM_SIMD_UNOP(
|
|
|
|
opcode,
|
|
|
|
// Set top lane of i64x2 == set top 2 lanes of i32x4.
|
|
|
|
WASM_SIMD_I64x2_REPLACE_LANE(
|
|
|
|
1, WASM_SIMD_I32x4_SPLAT(WASM_LOCAL_GET(0)), WASM_ZERO64))),
|
|
|
|
WASM_ONE);
|
2021-01-19 23:19:03 +00:00
|
|
|
|
|
|
|
for (SrcType x : compiler::ValueHelper::GetVector<SrcType>()) {
|
|
|
|
r.Call(x);
|
|
|
|
double expected = static_cast<double>(x);
|
|
|
|
for (int i = 0; i < 2; i++) {
|
|
|
|
double actual = ReadLittleEndianValue<double>(&g[i]);
|
|
|
|
CheckDoubleResult(x, x, expected, actual, true);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(F64x2ConvertLowI32x4S) {
|
2021-01-19 23:19:03 +00:00
|
|
|
RunF64x2ConvertLowI32x4Test<int32_t>(execution_tier, lower_simd,
|
|
|
|
kExprF64x2ConvertLowI32x4S);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(F64x2ConvertLowI32x4U) {
|
2021-01-19 23:19:03 +00:00
|
|
|
RunF64x2ConvertLowI32x4Test<uint32_t>(execution_tier, lower_simd,
|
|
|
|
kExprF64x2ConvertLowI32x4U);
|
|
|
|
}
|
|
|
|
|
|
|
|
template <typename SrcType>
|
|
|
|
void RunI32x4TruncSatF64x2Test(TestExecutionTier execution_tier,
|
|
|
|
LowerSimd lower_simd, WasmOpcode opcode) {
|
|
|
|
WasmRunner<int32_t, double> r(execution_tier, lower_simd);
|
|
|
|
SrcType* g = r.builder().AddGlobal<SrcType>(kWasmS128);
|
|
|
|
BUILD(
|
|
|
|
r,
|
|
|
|
WASM_GLOBAL_SET(
|
|
|
|
0, WASM_SIMD_UNOP(opcode, WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(0)))),
|
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
FOR_FLOAT64_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
SrcType expected = base::saturated_cast<SrcType>(x);
|
|
|
|
for (int i = 0; i < 2; i++) {
|
|
|
|
SrcType actual = ReadLittleEndianValue<SrcType>(&g[i]);
|
|
|
|
CHECK_EQ(expected, actual);
|
|
|
|
}
|
|
|
|
// Top lanes are zero-ed.
|
|
|
|
for (int i = 2; i < 4; i++) {
|
|
|
|
CHECK_EQ(0, ReadLittleEndianValue<SrcType>(&g[i]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I32x4TruncSatF64x2SZero) {
|
2021-01-19 23:19:03 +00:00
|
|
|
RunI32x4TruncSatF64x2Test<int32_t>(execution_tier, lower_simd,
|
|
|
|
kExprI32x4TruncSatF64x2SZero);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I32x4TruncSatF64x2UZero) {
|
2021-01-19 23:19:03 +00:00
|
|
|
RunI32x4TruncSatF64x2Test<uint32_t>(execution_tier, lower_simd,
|
|
|
|
kExprI32x4TruncSatF64x2UZero);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(F32x4DemoteF64x2Zero) {
|
2021-01-19 23:19:03 +00:00
|
|
|
WasmRunner<int32_t, double> r(execution_tier, lower_simd);
|
|
|
|
float* g = r.builder().AddGlobal<float>(kWasmS128);
|
|
|
|
BUILD(r,
|
|
|
|
WASM_GLOBAL_SET(
|
|
|
|
0, WASM_SIMD_UNOP(kExprF32x4DemoteF64x2Zero,
|
|
|
|
WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(0)))),
|
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
FOR_FLOAT64_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
float expected = DoubleToFloat32(x);
|
|
|
|
for (int i = 0; i < 2; i++) {
|
|
|
|
float actual = ReadLittleEndianValue<float>(&g[i]);
|
|
|
|
CheckFloatResult(x, x, expected, actual, true);
|
|
|
|
}
|
|
|
|
for (int i = 2; i < 4; i++) {
|
|
|
|
float actual = ReadLittleEndianValue<float>(&g[i]);
|
|
|
|
CheckFloatResult(x, x, 0, actual, true);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(F64x2PromoteLowF32x4) {
|
2021-01-19 23:19:03 +00:00
|
|
|
WasmRunner<int32_t, float> r(execution_tier, lower_simd);
|
|
|
|
double* g = r.builder().AddGlobal<double>(kWasmS128);
|
|
|
|
BUILD(r,
|
|
|
|
WASM_GLOBAL_SET(
|
|
|
|
0, WASM_SIMD_UNOP(kExprF64x2PromoteLowF32x4,
|
|
|
|
WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(0)))),
|
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
FOR_FLOAT32_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
double expected = static_cast<double>(x);
|
|
|
|
for (int i = 0; i < 2; i++) {
|
|
|
|
double actual = ReadLittleEndianValue<double>(&g[i]);
|
|
|
|
CheckDoubleResult(x, x, expected, actual, true);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Add) {
|
2019-07-24 20:01:43 +00:00
|
|
|
RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Add, Add);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Sub) {
|
2019-07-24 20:01:43 +00:00
|
|
|
RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Sub, Sub);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Mul) {
|
2019-07-24 20:01:43 +00:00
|
|
|
RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Mul, Mul);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Div) {
|
2020-10-09 00:09:39 +00:00
|
|
|
RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Div, base::Divide);
|
2019-08-13 16:17:38 +00:00
|
|
|
}
|
2019-08-14 17:46:10 +00:00
|
|
|
|
2020-10-08 23:41:02 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Pmin) {
|
[wasm-simd] Prototype f32x4 and f64x2 pmin and pmax
This patch implements f32x4.pmin, f32x4.pmax, f64x2.pmin, and f64x2.pmax
for x64 and interpreter.
Pseudo-min and Pseudo-max instructions were proposed in
https://github.com/WebAssembly/simd/pull/122. These instructions
exactly match std::min and std::max in C++ STL, and thus have different
semantics from the existing min and max.
The instruction-selector for x64 switches the operands around, because
it allows for defining the dst to be same as first (really the second
input node), allowing better codegen.
For example, b = f32x4.pmin(a, b) directly maps to vminps(b, b, a) or
minps(b, a), as long as we can define dst == b, and switching the
instruction operands around allows us to do that.
Bug: v8:10501
Change-Id: I06f983fc1764caf673e600ac91d9c0ac5166e17e
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2186630
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#67688}
2020-05-08 16:47:19 +00:00
|
|
|
RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Pmin, Minimum);
|
|
|
|
}
|
|
|
|
|
2020-10-08 23:41:02 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Pmax) {
|
[wasm-simd] Prototype f32x4 and f64x2 pmin and pmax
This patch implements f32x4.pmin, f32x4.pmax, f64x2.pmin, and f64x2.pmax
for x64 and interpreter.
Pseudo-min and Pseudo-max instructions were proposed in
https://github.com/WebAssembly/simd/pull/122. These instructions
exactly match std::min and std::max in C++ STL, and thus have different
semantics from the existing min and max.
The instruction-selector for x64 switches the operands around, because
it allows for defining the dst to be same as first (really the second
input node), allowing better codegen.
For example, b = f32x4.pmin(a, b) directly maps to vminps(b, b, a) or
minps(b, a), as long as we can define dst == b, and switching the
instruction operands around allows us to do that.
Bug: v8:10501
Change-Id: I06f983fc1764caf673e600ac91d9c0ac5166e17e
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2186630
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#67688}
2020-05-08 16:47:19 +00:00
|
|
|
RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Pmax, Maximum);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Eq) {
|
2019-08-14 17:46:10 +00:00
|
|
|
RunF64x2CompareOpTest(execution_tier, lower_simd, kExprF64x2Eq, Equal);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Ne) {
|
2019-08-14 17:46:10 +00:00
|
|
|
RunF64x2CompareOpTest(execution_tier, lower_simd, kExprF64x2Ne, NotEqual);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Gt) {
|
2019-08-14 17:46:10 +00:00
|
|
|
RunF64x2CompareOpTest(execution_tier, lower_simd, kExprF64x2Gt, Greater);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Ge) {
|
2019-08-14 17:46:10 +00:00
|
|
|
RunF64x2CompareOpTest(execution_tier, lower_simd, kExprF64x2Ge, GreaterEqual);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Lt) {
|
2019-08-14 17:46:10 +00:00
|
|
|
RunF64x2CompareOpTest(execution_tier, lower_simd, kExprF64x2Lt, Less);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Le) {
|
2019-08-14 17:46:10 +00:00
|
|
|
RunF64x2CompareOpTest(execution_tier, lower_simd, kExprF64x2Le, LessEqual);
|
|
|
|
}
|
2019-08-13 16:17:38 +00:00
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Min) {
|
2019-07-31 20:13:36 +00:00
|
|
|
RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Min, JSMin);
|
|
|
|
}
|
|
|
|
|
2020-09-08 21:55:21 +00:00
|
|
|
WASM_SIMD_TEST(F64x2Max) {
|
2019-07-31 20:13:36 +00:00
|
|
|
RunF64x2BinOpTest(execution_tier, lower_simd, kExprF64x2Max, JSMax);
|
|
|
|
}
|
|
|
|
|
2020-09-10 04:02:36 +00:00
|
|
|
WASM_SIMD_TEST(I64x2Mul) {
|
2019-07-08 04:56:33 +00:00
|
|
|
RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2Mul,
|
|
|
|
base::MulWithWraparound);
|
|
|
|
}
|
|
|
|
|
2020-01-29 23:44:10 +00:00
|
|
|
WASM_SIMD_TEST(I32x4Splat) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
2019-03-08 00:43:11 +00:00
|
|
|
// Set up a global to hold output vector.
|
|
|
|
int32_t* g = r.builder().AddGlobal<int32_t>(kWasmS128);
|
|
|
|
byte param1 = 0;
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_I32x4_SPLAT(WASM_LOCAL_GET(param1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2016-12-06 01:12:15 +00:00
|
|
|
|
2019-03-08 00:43:11 +00:00
|
|
|
FOR_INT32_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
int32_t expected = x;
|
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
int32_t actual = ReadLittleEndianValue<int32_t>(&g[i]);
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
2016-12-06 01:12:15 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ReplaceLane) {
|
2019-03-08 00:43:11 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Set up a global to hold input/output vector.
|
|
|
|
int32_t* g = r.builder().AddGlobal<int32_t>(kWasmS128);
|
|
|
|
// Build function to replace each lane with its index.
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I32x4_SPLAT(WASM_I32V(-1))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I32x4_REPLACE_LANE(
|
|
|
|
0, WASM_LOCAL_GET(temp1), WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I32x4_REPLACE_LANE(
|
|
|
|
1, WASM_LOCAL_GET(temp1), WASM_I32V(1))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I32x4_REPLACE_LANE(
|
|
|
|
2, WASM_LOCAL_GET(temp1), WASM_I32V(2))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_I32x4_REPLACE_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
3, WASM_LOCAL_GET(temp1), WASM_I32V(3))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-03-08 00:43:11 +00:00
|
|
|
|
|
|
|
r.Call();
|
|
|
|
for (int32_t i = 0; i < 4; i++) {
|
|
|
|
CHECK_EQ(i, ReadLittleEndianValue<int32_t>(&g[i]));
|
|
|
|
}
|
2016-12-06 01:12:15 +00:00
|
|
|
}
|
|
|
|
|
2017-05-31 13:31:52 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Splat) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
2019-03-08 00:43:11 +00:00
|
|
|
// Set up a global to hold output vector.
|
|
|
|
int16_t* g = r.builder().AddGlobal<int16_t>(kWasmS128);
|
|
|
|
byte param1 = 0;
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_I16x8_SPLAT(WASM_LOCAL_GET(param1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2019-03-08 00:43:11 +00:00
|
|
|
FOR_INT16_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
int16_t expected = x;
|
|
|
|
for (int i = 0; i < 8; i++) {
|
|
|
|
int16_t actual = ReadLittleEndianValue<int16_t>(&g[i]);
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
2020-01-03 19:01:21 +00:00
|
|
|
|
|
|
|
// Test values that do not fit in a int16.
|
|
|
|
FOR_INT32_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
int16_t expected = truncate_to_int16(x);
|
|
|
|
for (int i = 0; i < 8; i++) {
|
|
|
|
int16_t actual = ReadLittleEndianValue<int16_t>(&g[i]);
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ReplaceLane) {
|
2019-03-08 00:43:11 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Set up a global to hold input/output vector.
|
|
|
|
int16_t* g = r.builder().AddGlobal<int16_t>(kWasmS128);
|
|
|
|
// Build function to replace each lane with its index.
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_SPLAT(WASM_I32V(-1))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_REPLACE_LANE(
|
|
|
|
0, WASM_LOCAL_GET(temp1), WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_REPLACE_LANE(
|
|
|
|
1, WASM_LOCAL_GET(temp1), WASM_I32V(1))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_REPLACE_LANE(
|
|
|
|
2, WASM_LOCAL_GET(temp1), WASM_I32V(2))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_REPLACE_LANE(
|
|
|
|
3, WASM_LOCAL_GET(temp1), WASM_I32V(3))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_REPLACE_LANE(
|
|
|
|
4, WASM_LOCAL_GET(temp1), WASM_I32V(4))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_REPLACE_LANE(
|
|
|
|
5, WASM_LOCAL_GET(temp1), WASM_I32V(5))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_REPLACE_LANE(
|
|
|
|
6, WASM_LOCAL_GET(temp1), WASM_I32V(6))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_I16x8_REPLACE_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
7, WASM_LOCAL_GET(temp1), WASM_I32V(7))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-03-08 00:43:11 +00:00
|
|
|
|
|
|
|
r.Call();
|
|
|
|
for (int16_t i = 0; i < 8; i++) {
|
|
|
|
CHECK_EQ(i, ReadLittleEndianValue<int16_t>(&g[i]));
|
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2020-06-18 23:38:01 +00:00
|
|
|
WASM_SIMD_TEST(I8x16BitMask) {
|
2020-03-18 23:14:40 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
byte value1 = r.AllocateLocal(kWasmS128);
|
|
|
|
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(value1, WASM_SIMD_I8x16_SPLAT(WASM_LOCAL_GET(0))),
|
|
|
|
WASM_LOCAL_SET(value1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
0, WASM_LOCAL_GET(value1), WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_SET(value1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
1, WASM_LOCAL_GET(value1), WASM_I32V(-1))),
|
|
|
|
WASM_SIMD_UNOP(kExprI8x16BitMask, WASM_LOCAL_GET(value1)));
|
2020-03-18 23:14:40 +00:00
|
|
|
|
|
|
|
FOR_INT8_INPUTS(x) {
|
|
|
|
int32_t actual = r.Call(x);
|
|
|
|
// Lane 0 is always 0 (positive), lane 1 is always -1.
|
2020-03-23 18:45:25 +00:00
|
|
|
int32_t expected = std::signbit(static_cast<double>(x)) ? 0xFFFE : 0x0002;
|
2020-03-18 23:14:40 +00:00
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-06-18 23:38:01 +00:00
|
|
|
WASM_SIMD_TEST(I16x8BitMask) {
|
2020-03-18 23:14:40 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
byte value1 = r.AllocateLocal(kWasmS128);
|
|
|
|
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(value1, WASM_SIMD_I16x8_SPLAT(WASM_LOCAL_GET(0))),
|
|
|
|
WASM_LOCAL_SET(value1, WASM_SIMD_I16x8_REPLACE_LANE(
|
|
|
|
0, WASM_LOCAL_GET(value1), WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_SET(value1, WASM_SIMD_I16x8_REPLACE_LANE(
|
|
|
|
1, WASM_LOCAL_GET(value1), WASM_I32V(-1))),
|
|
|
|
WASM_SIMD_UNOP(kExprI16x8BitMask, WASM_LOCAL_GET(value1)));
|
2020-03-18 23:14:40 +00:00
|
|
|
|
|
|
|
FOR_INT16_INPUTS(x) {
|
|
|
|
int32_t actual = r.Call(x);
|
|
|
|
// Lane 0 is always 0 (positive), lane 1 is always -1.
|
2020-03-23 18:45:25 +00:00
|
|
|
int32_t expected = std::signbit(static_cast<double>(x)) ? 0xFE : 2;
|
2020-03-18 23:14:40 +00:00
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-06-18 23:38:01 +00:00
|
|
|
WASM_SIMD_TEST(I32x4BitMask) {
|
2020-03-18 23:14:40 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
byte value1 = r.AllocateLocal(kWasmS128);
|
|
|
|
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(value1, WASM_SIMD_I32x4_SPLAT(WASM_LOCAL_GET(0))),
|
|
|
|
WASM_LOCAL_SET(value1, WASM_SIMD_I32x4_REPLACE_LANE(
|
|
|
|
0, WASM_LOCAL_GET(value1), WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_SET(value1, WASM_SIMD_I32x4_REPLACE_LANE(
|
|
|
|
1, WASM_LOCAL_GET(value1), WASM_I32V(-1))),
|
|
|
|
WASM_SIMD_UNOP(kExprI32x4BitMask, WASM_LOCAL_GET(value1)));
|
2020-03-18 23:14:40 +00:00
|
|
|
|
|
|
|
FOR_INT32_INPUTS(x) {
|
|
|
|
int32_t actual = r.Call(x);
|
|
|
|
// Lane 0 is always 0 (positive), lane 1 is always -1.
|
2020-03-23 18:45:25 +00:00
|
|
|
int32_t expected = std::signbit(static_cast<double>(x)) ? 0xE : 2;
|
2020-03-18 23:14:40 +00:00
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I64x2BitMask) {
|
2020-10-12 18:11:52 +00:00
|
|
|
WasmRunner<int32_t, int64_t> r(execution_tier, lower_simd);
|
|
|
|
byte value1 = r.AllocateLocal(kWasmS128);
|
|
|
|
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(value1, WASM_SIMD_I64x2_SPLAT(WASM_LOCAL_GET(0))),
|
|
|
|
WASM_LOCAL_SET(value1, WASM_SIMD_I64x2_REPLACE_LANE(
|
|
|
|
0, WASM_LOCAL_GET(value1), WASM_I64V_1(0))),
|
|
|
|
WASM_SIMD_UNOP(kExprI64x2BitMask, WASM_LOCAL_GET(value1)));
|
2020-10-12 18:11:52 +00:00
|
|
|
|
|
|
|
for (int64_t x : compiler::ValueHelper::GetVector<int64_t>()) {
|
|
|
|
int32_t actual = r.Call(x);
|
|
|
|
// Lane 0 is always 0 (positive).
|
|
|
|
int32_t expected = std::signbit(static_cast<double>(x)) ? 0x2 : 0x0;
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-05-31 13:31:52 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Splat) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
2019-03-08 00:43:11 +00:00
|
|
|
// Set up a global to hold output vector.
|
|
|
|
int8_t* g = r.builder().AddGlobal<int8_t>(kWasmS128);
|
|
|
|
byte param1 = 0;
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_I8x16_SPLAT(WASM_LOCAL_GET(param1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2019-03-08 00:43:11 +00:00
|
|
|
FOR_INT8_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
int8_t expected = x;
|
|
|
|
for (int i = 0; i < 16; i++) {
|
|
|
|
int8_t actual = ReadLittleEndianValue<int8_t>(&g[i]);
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
2020-01-03 19:01:21 +00:00
|
|
|
|
|
|
|
// Test values that do not fit in a int16.
|
|
|
|
FOR_INT16_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
int8_t expected = truncate_to_int8(x);
|
|
|
|
for (int i = 0; i < 16; i++) {
|
|
|
|
int8_t actual = ReadLittleEndianValue<int8_t>(&g[i]);
|
|
|
|
CHECK_EQ(actual, expected);
|
|
|
|
}
|
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(I8x16ReplaceLane) {
|
2019-03-08 00:43:11 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Set up a global to hold input/output vector.
|
|
|
|
int8_t* g = r.builder().AddGlobal<int8_t>(kWasmS128);
|
|
|
|
// Build function to replace each lane with its index.
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_SPLAT(WASM_I32V(-1))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
0, WASM_LOCAL_GET(temp1), WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
1, WASM_LOCAL_GET(temp1), WASM_I32V(1))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
2, WASM_LOCAL_GET(temp1), WASM_I32V(2))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
3, WASM_LOCAL_GET(temp1), WASM_I32V(3))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
4, WASM_LOCAL_GET(temp1), WASM_I32V(4))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
5, WASM_LOCAL_GET(temp1), WASM_I32V(5))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
6, WASM_LOCAL_GET(temp1), WASM_I32V(6))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
7, WASM_LOCAL_GET(temp1), WASM_I32V(7))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
8, WASM_LOCAL_GET(temp1), WASM_I32V(8))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
9, WASM_LOCAL_GET(temp1), WASM_I32V(9))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
10, WASM_LOCAL_GET(temp1), WASM_I32V(10))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
11, WASM_LOCAL_GET(temp1), WASM_I32V(11))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
12, WASM_LOCAL_GET(temp1), WASM_I32V(12))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
13, WASM_LOCAL_GET(temp1), WASM_I32V(13))),
|
|
|
|
WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_REPLACE_LANE(
|
|
|
|
14, WASM_LOCAL_GET(temp1), WASM_I32V(14))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_I8x16_REPLACE_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
15, WASM_LOCAL_GET(temp1), WASM_I32V(15))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-03-08 00:43:11 +00:00
|
|
|
|
|
|
|
r.Call();
|
|
|
|
for (int8_t i = 0; i < 16; i++) {
|
|
|
|
CHECK_EQ(i, ReadLittleEndianValue<int8_t>(&g[i]));
|
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2019-03-08 00:43:11 +00:00
|
|
|
// Use doubles to ensure exact conversion.
|
[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
|
|
|
int32_t ConvertToInt(double val, bool unsigned_integer) {
|
2018-04-17 00:59:05 +00:00
|
|
|
if (std::isnan(val)) return 0;
|
|
|
|
if (unsigned_integer) {
|
|
|
|
if (val < 0) return 0;
|
|
|
|
if (val > kMaxUInt32) return kMaxUInt32;
|
|
|
|
return static_cast<uint32_t>(val);
|
|
|
|
} else {
|
|
|
|
if (val < kMinInt) return kMinInt;
|
|
|
|
if (val > kMaxInt) return kMaxInt;
|
|
|
|
return static_cast<int>(val);
|
[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Tests both signed and unsigned conversion.
|
2018-06-20 06:03:44 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ConvertF32x4) {
|
2019-03-05 01:44:05 +00:00
|
|
|
WasmRunner<int32_t, float> r(execution_tier, lower_simd);
|
|
|
|
// Create two output vectors to hold signed and unsigned results.
|
|
|
|
int32_t* g0 = r.builder().AddGlobal<int32_t>(kWasmS128);
|
|
|
|
int32_t* g1 = r.builder().AddGlobal<int32_t>(kWasmS128);
|
|
|
|
// Build fn to splat test value, perform conversions, and write the results.
|
|
|
|
byte value = 0;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(value))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
0, WASM_SIMD_UNOP(kExprI32x4SConvertF32x4, WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
1, WASM_SIMD_UNOP(kExprI32x4UConvertF32x4, WASM_LOCAL_GET(temp1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2016-08-23 19:59:19 +00:00
|
|
|
|
2019-03-05 01:44:05 +00:00
|
|
|
FOR_FLOAT32_INPUTS(x) {
|
|
|
|
if (!PlatformCanRepresent(x)) continue;
|
|
|
|
r.Call(x);
|
|
|
|
int32_t expected_signed = ConvertToInt(x, false);
|
|
|
|
int32_t expected_unsigned = ConvertToInt(x, true);
|
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<int32_t>(&g0[i]));
|
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<int32_t>(&g1[i]));
|
|
|
|
}
|
2016-12-06 01:12:15 +00:00
|
|
|
}
|
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
[WASM SIMD] Implement packing and unpacking integer conversions.
- Adds WASM opcodes I32x4SConvertI16x8Low, I32x4SConvertI16x8High,
I32x4UConvertI16x8Low, I32x4UConvertI16x8High, which unpack half of
an I16x8 register into a whole I32x4 register, with signed or unsigned
extension. Having separate Low/High opcodes works around the difficulty
of having multiple output registers, which would be necessary if we unpacked
the entire I16x8 register.
- Adds WASM opcodes I16x8SConvertI8x16Low, I16x8SConvertI8x16High,
I16x8UConvertI8x16Low, I16x8UConvertI8x16High, similarly to above.
- Adds WASM opcodes I16x8SConvertI32x4, I16x8UConvertI32x4,
I8x16SConvert16x8, I8x16UConvertI16x8, which pack two source registers
into a single destination register with signed or unsigned saturation. These
could have been separated into half operations, but this is simpler to
implement with SSE, AVX, and is acceptable on ARM. It also avoids adding
operations that only modify half of their destination register.
- Implements these opcodes for ARM.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2800523002
Cr-Commit-Position: refs/heads/master@{#44541}
2017-04-10 23:07:30 +00:00
|
|
|
// Tests both signed and unsigned conversion from I16x8 (unpacking).
|
2018-06-20 06:03:44 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ConvertI16x8) {
|
2019-03-08 00:43:11 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Create four output vectors to hold signed and unsigned results.
|
|
|
|
int32_t* g0 = r.builder().AddGlobal<int32_t>(kWasmS128);
|
|
|
|
int32_t* g1 = r.builder().AddGlobal<int32_t>(kWasmS128);
|
|
|
|
int32_t* g2 = r.builder().AddGlobal<int32_t>(kWasmS128);
|
|
|
|
int32_t* g3 = r.builder().AddGlobal<int32_t>(kWasmS128);
|
|
|
|
// Build fn to splat test value, perform conversions, and write the results.
|
|
|
|
byte value = 0;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_SPLAT(WASM_LOCAL_GET(value))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_UNOP(kExprI32x4SConvertI16x8High,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(1, WASM_SIMD_UNOP(kExprI32x4SConvertI16x8Low,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(2, WASM_SIMD_UNOP(kExprI32x4UConvertI16x8High,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(3, WASM_SIMD_UNOP(kExprI32x4UConvertI16x8Low,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
[WASM SIMD] Implement packing and unpacking integer conversions.
- Adds WASM opcodes I32x4SConvertI16x8Low, I32x4SConvertI16x8High,
I32x4UConvertI16x8Low, I32x4UConvertI16x8High, which unpack half of
an I16x8 register into a whole I32x4 register, with signed or unsigned
extension. Having separate Low/High opcodes works around the difficulty
of having multiple output registers, which would be necessary if we unpacked
the entire I16x8 register.
- Adds WASM opcodes I16x8SConvertI8x16Low, I16x8SConvertI8x16High,
I16x8UConvertI8x16Low, I16x8UConvertI8x16High, similarly to above.
- Adds WASM opcodes I16x8SConvertI32x4, I16x8UConvertI32x4,
I8x16SConvert16x8, I8x16UConvertI16x8, which pack two source registers
into a single destination register with signed or unsigned saturation. These
could have been separated into half operations, but this is simpler to
implement with SSE, AVX, and is acceptable on ARM. It also avoids adding
operations that only modify half of their destination register.
- Implements these opcodes for ARM.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2800523002
Cr-Commit-Position: refs/heads/master@{#44541}
2017-04-10 23:07:30 +00:00
|
|
|
|
2019-03-08 00:43:11 +00:00
|
|
|
FOR_INT16_INPUTS(x) {
|
|
|
|
r.Call(x);
|
2020-11-02 07:23:29 +00:00
|
|
|
int32_t expected_signed = static_cast<int32_t>(x);
|
|
|
|
int32_t expected_unsigned = static_cast<int32_t>(static_cast<uint16_t>(x));
|
2019-03-08 00:43:11 +00:00
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<int32_t>(&g0[i]));
|
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<int32_t>(&g1[i]));
|
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<int32_t>(&g2[i]));
|
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<int32_t>(&g3[i]));
|
|
|
|
}
|
[WASM SIMD] Implement packing and unpacking integer conversions.
- Adds WASM opcodes I32x4SConvertI16x8Low, I32x4SConvertI16x8High,
I32x4UConvertI16x8Low, I32x4UConvertI16x8High, which unpack half of
an I16x8 register into a whole I32x4 register, with signed or unsigned
extension. Having separate Low/High opcodes works around the difficulty
of having multiple output registers, which would be necessary if we unpacked
the entire I16x8 register.
- Adds WASM opcodes I16x8SConvertI8x16Low, I16x8SConvertI8x16High,
I16x8UConvertI8x16Low, I16x8UConvertI8x16High, similarly to above.
- Adds WASM opcodes I16x8SConvertI32x4, I16x8UConvertI32x4,
I8x16SConvert16x8, I8x16UConvertI16x8, which pack two source registers
into a single destination register with signed or unsigned saturation. These
could have been separated into half operations, but this is simpler to
implement with SSE, AVX, and is acceptable on ARM. It also avoids adding
operations that only modify half of their destination register.
- Implements these opcodes for ARM.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2800523002
Cr-Commit-Position: refs/heads/master@{#44541}
2017-04-10 23:07:30 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-10-06 20:45:45 +00:00
|
|
|
// Tests both signed and unsigned conversion from I32x4 (unpacking).
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ConvertI32x4) {
|
2020-10-06 20:45:45 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Create four output vectors to hold signed and unsigned results.
|
|
|
|
int64_t* g0 = r.builder().AddGlobal<int64_t>(kWasmS128);
|
|
|
|
int64_t* g1 = r.builder().AddGlobal<int64_t>(kWasmS128);
|
2021-01-13 10:16:50 +00:00
|
|
|
uint64_t* g2 = r.builder().AddGlobal<uint64_t>(kWasmS128);
|
|
|
|
uint64_t* g3 = r.builder().AddGlobal<uint64_t>(kWasmS128);
|
2020-10-06 20:45:45 +00:00
|
|
|
// Build fn to splat test value, perform conversions, and write the results.
|
|
|
|
byte value = 0;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I32x4_SPLAT(WASM_LOCAL_GET(value))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_UNOP(kExprI64x2SConvertI32x4High,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(1, WASM_SIMD_UNOP(kExprI64x2SConvertI32x4Low,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(2, WASM_SIMD_UNOP(kExprI64x2UConvertI32x4High,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(3, WASM_SIMD_UNOP(kExprI64x2UConvertI32x4Low,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-10-06 20:45:45 +00:00
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
FOR_INT32_INPUTS(x) {
|
|
|
|
r.Call(x);
|
2020-11-02 07:23:29 +00:00
|
|
|
int64_t expected_signed = static_cast<int64_t>(x);
|
2021-01-13 10:16:50 +00:00
|
|
|
uint64_t expected_unsigned =
|
|
|
|
static_cast<uint64_t>(static_cast<uint32_t>(x));
|
2020-10-06 20:45:45 +00:00
|
|
|
for (int i = 0; i < 2; i++) {
|
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<int64_t>(&g0[i]));
|
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<int64_t>(&g1[i]));
|
2021-01-13 10:16:50 +00:00
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<uint64_t>(&g2[i]));
|
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<uint64_t>(&g3[i]));
|
2020-10-06 20:45:45 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-05-23 23:24:10 +00:00
|
|
|
WASM_SIMD_TEST(I32x4Neg) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI32x4UnOpTest(execution_tier, lower_simd, kExprI32x4Neg,
|
|
|
|
base::NegateWithWraparound);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-13 20:24:43 +00:00
|
|
|
|
2020-03-03 06:56:03 +00:00
|
|
|
WASM_SIMD_TEST(I32x4Abs) {
|
2020-11-02 07:23:29 +00:00
|
|
|
RunI32x4UnOpTest(execution_tier, lower_simd, kExprI32x4Abs, std::abs);
|
2020-02-21 04:14:53 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 23:24:10 +00:00
|
|
|
WASM_SIMD_TEST(S128Not) {
|
2020-11-02 07:23:29 +00:00
|
|
|
RunI32x4UnOpTest(execution_tier, lower_simd, kExprS128Not,
|
|
|
|
[](int32_t x) { return ~x; });
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2016-12-06 01:12:15 +00:00
|
|
|
|
2020-11-02 09:16:52 +00:00
|
|
|
template <typename Narrow, typename Wide>
|
|
|
|
void RunExtAddPairwiseTest(TestExecutionTier execution_tier,
|
|
|
|
LowerSimd lower_simd, WasmOpcode ext_add_pairwise,
|
2021-03-22 17:59:57 +00:00
|
|
|
WasmOpcode splat, Shuffle interleaving_shuffle) {
|
2020-11-02 09:16:52 +00:00
|
|
|
constexpr int num_lanes = kSimd128Size / sizeof(Wide);
|
2021-03-22 17:59:57 +00:00
|
|
|
WasmRunner<int32_t, Narrow, Narrow> r(execution_tier, lower_simd);
|
2020-11-02 09:16:52 +00:00
|
|
|
Wide* g = r.builder().template AddGlobal<Wide>(kWasmS128);
|
|
|
|
|
2021-03-22 17:59:57 +00:00
|
|
|
BUILD(r,
|
|
|
|
WASM_SIMD_I8x16_SHUFFLE_OP(kExprI8x16Shuffle, interleaving_shuffle,
|
|
|
|
WASM_SIMD_UNOP(splat, WASM_LOCAL_GET(0)),
|
|
|
|
WASM_SIMD_UNOP(splat, WASM_LOCAL_GET(1))),
|
2020-11-02 09:16:52 +00:00
|
|
|
WASM_SIMD_OP(ext_add_pairwise), kExprGlobalSet, 0, WASM_ONE);
|
|
|
|
|
2021-03-22 17:59:57 +00:00
|
|
|
auto v = compiler::ValueHelper::GetVector<Narrow>();
|
|
|
|
// Iterate vector from both ends to try and splat two different values.
|
|
|
|
for (auto i = v.begin(), j = v.end() - 1; i < v.end(); i++, j--) {
|
|
|
|
r.Call(*i, *j);
|
|
|
|
Wide expected = AddLong<Wide>(*i, *j);
|
2020-11-02 09:16:52 +00:00
|
|
|
for (int i = 0; i < num_lanes; i++) {
|
|
|
|
CHECK_EQ(expected, ReadLittleEndianValue<Wide>(&g[i]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-22 17:59:57 +00:00
|
|
|
// interleave even lanes from one input and odd lanes from another.
|
|
|
|
constexpr Shuffle interleave_16x8_shuffle = {0, 1, 18, 19, 4, 5, 22, 23,
|
|
|
|
8, 9, 26, 27, 12, 13, 30, 31};
|
|
|
|
constexpr Shuffle interleave_8x16_shuffle = {0, 17, 2, 19, 4, 21, 6, 23,
|
|
|
|
8, 25, 10, 27, 12, 29, 14, 31};
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ExtAddPairwiseI16x8S) {
|
2021-03-22 17:59:57 +00:00
|
|
|
RunExtAddPairwiseTest<int16_t, int32_t>(
|
|
|
|
execution_tier, lower_simd, kExprI32x4ExtAddPairwiseI16x8S,
|
|
|
|
kExprI16x8Splat, interleave_16x8_shuffle);
|
2020-11-02 09:16:52 +00:00
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ExtAddPairwiseI16x8U) {
|
2021-03-22 17:59:57 +00:00
|
|
|
RunExtAddPairwiseTest<uint16_t, uint32_t>(
|
|
|
|
execution_tier, lower_simd, kExprI32x4ExtAddPairwiseI16x8U,
|
|
|
|
kExprI16x8Splat, interleave_16x8_shuffle);
|
2020-11-02 09:16:52 +00:00
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ExtAddPairwiseI8x16S) {
|
2021-03-22 17:59:57 +00:00
|
|
|
RunExtAddPairwiseTest<int8_t, int16_t>(
|
|
|
|
execution_tier, lower_simd, kExprI16x8ExtAddPairwiseI8x16S,
|
|
|
|
kExprI8x16Splat, interleave_8x16_shuffle);
|
2020-11-02 09:16:52 +00:00
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ExtAddPairwiseI8x16U) {
|
2021-03-22 17:59:57 +00:00
|
|
|
RunExtAddPairwiseTest<uint8_t, uint16_t>(
|
|
|
|
execution_tier, lower_simd, kExprI16x8ExtAddPairwiseI8x16U,
|
|
|
|
kExprI8x16Splat, interleave_8x16_shuffle);
|
2020-11-02 09:16:52 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I32x4Add) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4Add,
|
|
|
|
base::AddWithWraparound);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I32x4Sub) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4Sub,
|
|
|
|
base::SubWithWraparound);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
[Turbofan] Add native ARM support for basic SIMD 32x4 operations.
- Adds Float32x4 ExtractLane, ReplaceLane, Splat, Add, Sub,
and conversions to Int32x4 and Uint32x4.
- Adds Int32x4 ExtractLane, ReplaceLane, Splat, Add, Sub and
conversions to Float32x4 (int and unsigned int).
- Adds Int32x4 CompareEqual, CompareNotEqual.
- Adds S32x4 Select.
- Adds tests for all new SIMD operations.
LOG=N
BUG=v8:4124
Review-Url: https://codereview.chromium.org/2584863002
Cr-Commit-Position: refs/heads/master@{#41828}
2016-12-19 22:23:03 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I32x4Mul) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4Mul,
|
|
|
|
base::MulWithWraparound);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2017-02-27 23:45:03 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I32x4MinS) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4MinS, Minimum);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-27 23:45:03 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I32x4MaxS) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4MaxS, Maximum);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-27 23:45:03 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I32x4MinU) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4MinU,
|
2018-05-18 21:47:59 +00:00
|
|
|
UnsignedMinimum);
|
2017-02-21 16:45:30 +00:00
|
|
|
}
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I32x4MaxU) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4MaxU,
|
2018-05-23 22:21:05 +00:00
|
|
|
|
2018-05-18 21:47:59 +00:00
|
|
|
UnsignedMaximum);
|
2017-02-21 16:45:30 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(S128And) {
|
2020-11-02 07:23:29 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprS128And,
|
|
|
|
[](int32_t x, int32_t y) { return x & y; });
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2017-07-26 11:55:18 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(S128Or) {
|
2020-11-02 07:23:29 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprS128Or,
|
|
|
|
[](int32_t x, int32_t y) { return x | y; });
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2017-07-26 11:55:18 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(S128Xor) {
|
2020-11-02 07:23:29 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprS128Xor,
|
|
|
|
[](int32_t x, int32_t y) { return x ^ y; });
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2017-07-26 11:55:18 +00:00
|
|
|
|
2020-01-10 17:45:02 +00:00
|
|
|
// Bitwise operation, doesn't really matter what simd type we test it with.
|
2020-01-23 00:36:20 +00:00
|
|
|
WASM_SIMD_TEST(S128AndNot) {
|
2020-11-02 07:23:29 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprS128AndNot,
|
|
|
|
[](int32_t x, int32_t y) { return x & ~y; });
|
2020-01-10 17:45:02 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4Eq) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4Eq, Equal);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4Ne) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4Ne, NotEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4LtS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4LtS, Less);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4LeS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4LeS, LessEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-07 17:33:37 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4GtS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4GtS, Greater);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4GeS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4GeS, GreaterEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4LtU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4LtU, UnsignedLess);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4LeU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4LeU,
|
|
|
|
UnsignedLessEqual);
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4GtU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4GtU, UnsignedGreater);
|
2017-03-08 00:01:36 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I32x4GeU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI32x4BinOpTest(execution_tier, lower_simd, kExprI32x4GeU,
|
|
|
|
UnsignedGreaterEqual);
|
2017-03-08 00:01:36 +00:00
|
|
|
}
|
|
|
|
|
2020-04-03 23:14:14 +00:00
|
|
|
WASM_SIMD_TEST(I32x4Shl) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI32x4ShiftOpTest(execution_tier, lower_simd, kExprI32x4Shl,
|
2018-07-03 17:14:07 +00:00
|
|
|
LogicalShiftLeft);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2020-04-03 23:14:14 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ShrS) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI32x4ShiftOpTest(execution_tier, lower_simd, kExprI32x4ShrS,
|
2018-07-03 17:14:07 +00:00
|
|
|
ArithmeticShiftRight);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2020-04-03 23:14:14 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ShrU) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI32x4ShiftOpTest(execution_tier, lower_simd, kExprI32x4ShrU,
|
2018-07-03 17:14:07 +00:00
|
|
|
LogicalShiftRight);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
2017-03-03 02:04:07 +00:00
|
|
|
|
[WASM SIMD] Implement packing and unpacking integer conversions.
- Adds WASM opcodes I32x4SConvertI16x8Low, I32x4SConvertI16x8High,
I32x4UConvertI16x8Low, I32x4UConvertI16x8High, which unpack half of
an I16x8 register into a whole I32x4 register, with signed or unsigned
extension. Having separate Low/High opcodes works around the difficulty
of having multiple output registers, which would be necessary if we unpacked
the entire I16x8 register.
- Adds WASM opcodes I16x8SConvertI8x16Low, I16x8SConvertI8x16High,
I16x8UConvertI8x16Low, I16x8UConvertI8x16High, similarly to above.
- Adds WASM opcodes I16x8SConvertI32x4, I16x8UConvertI32x4,
I8x16SConvert16x8, I8x16UConvertI16x8, which pack two source registers
into a single destination register with signed or unsigned saturation. These
could have been separated into half operations, but this is simpler to
implement with SSE, AVX, and is acceptable on ARM. It also avoids adding
operations that only modify half of their destination register.
- Implements these opcodes for ARM.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2800523002
Cr-Commit-Position: refs/heads/master@{#44541}
2017-04-10 23:07:30 +00:00
|
|
|
// Tests both signed and unsigned conversion from I8x16 (unpacking).
|
2018-06-20 06:03:44 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ConvertI8x16) {
|
2019-03-08 00:43:11 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Create four output vectors to hold signed and unsigned results.
|
|
|
|
int16_t* g0 = r.builder().AddGlobal<int16_t>(kWasmS128);
|
|
|
|
int16_t* g1 = r.builder().AddGlobal<int16_t>(kWasmS128);
|
|
|
|
int16_t* g2 = r.builder().AddGlobal<int16_t>(kWasmS128);
|
|
|
|
int16_t* g3 = r.builder().AddGlobal<int16_t>(kWasmS128);
|
|
|
|
// Build fn to splat test value, perform conversions, and write the results.
|
|
|
|
byte value = 0;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_SPLAT(WASM_LOCAL_GET(value))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_UNOP(kExprI16x8SConvertI8x16High,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(1, WASM_SIMD_UNOP(kExprI16x8SConvertI8x16Low,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(2, WASM_SIMD_UNOP(kExprI16x8UConvertI8x16High,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(3, WASM_SIMD_UNOP(kExprI16x8UConvertI8x16Low,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-03-08 00:43:11 +00:00
|
|
|
|
|
|
|
FOR_INT8_INPUTS(x) {
|
|
|
|
r.Call(x);
|
2020-11-02 07:23:29 +00:00
|
|
|
int16_t expected_signed = static_cast<int16_t>(x);
|
|
|
|
int16_t expected_unsigned = static_cast<int16_t>(static_cast<uint8_t>(x));
|
2019-03-08 00:43:11 +00:00
|
|
|
for (int i = 0; i < 8; i++) {
|
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<int16_t>(&g0[i]));
|
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<int16_t>(&g1[i]));
|
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<int16_t>(&g2[i]));
|
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<int16_t>(&g3[i]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Tests both signed and unsigned conversion from I32x4 (packing).
|
|
|
|
WASM_SIMD_TEST(I16x8ConvertI32x4) {
|
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Create output vectors to hold signed and unsigned results.
|
|
|
|
int16_t* g0 = r.builder().AddGlobal<int16_t>(kWasmS128);
|
|
|
|
int16_t* g1 = r.builder().AddGlobal<int16_t>(kWasmS128);
|
|
|
|
// Build fn to splat test value, perform conversions, and write the results.
|
|
|
|
byte value = 0;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I32x4_SPLAT(WASM_LOCAL_GET(value))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
0, WASM_SIMD_BINOP(kExprI16x8SConvertI32x4, WASM_LOCAL_GET(temp1),
|
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
1, WASM_SIMD_BINOP(kExprI16x8UConvertI32x4, WASM_LOCAL_GET(temp1),
|
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2019-03-08 00:43:11 +00:00
|
|
|
|
|
|
|
FOR_INT32_INPUTS(x) {
|
|
|
|
r.Call(x);
|
2021-01-29 01:47:22 +00:00
|
|
|
int16_t expected_signed = base::saturated_cast<int16_t>(x);
|
|
|
|
int16_t expected_unsigned = base::saturated_cast<uint16_t>(x);
|
2019-03-08 00:43:11 +00:00
|
|
|
for (int i = 0; i < 8; i++) {
|
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<int16_t>(&g0[i]));
|
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<int16_t>(&g1[i]));
|
|
|
|
}
|
[WASM SIMD] Implement packing and unpacking integer conversions.
- Adds WASM opcodes I32x4SConvertI16x8Low, I32x4SConvertI16x8High,
I32x4UConvertI16x8Low, I32x4UConvertI16x8High, which unpack half of
an I16x8 register into a whole I32x4 register, with signed or unsigned
extension. Having separate Low/High opcodes works around the difficulty
of having multiple output registers, which would be necessary if we unpacked
the entire I16x8 register.
- Adds WASM opcodes I16x8SConvertI8x16Low, I16x8SConvertI8x16High,
I16x8UConvertI8x16Low, I16x8UConvertI8x16High, similarly to above.
- Adds WASM opcodes I16x8SConvertI32x4, I16x8UConvertI32x4,
I8x16SConvert16x8, I8x16UConvertI16x8, which pack two source registers
into a single destination register with signed or unsigned saturation. These
could have been separated into half operations, but this is simpler to
implement with SSE, AVX, and is acceptable on ARM. It also avoids adding
operations that only modify half of their destination register.
- Implements these opcodes for ARM.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2800523002
Cr-Commit-Position: refs/heads/master@{#44541}
2017-04-10 23:07:30 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-05-23 23:24:10 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Neg) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI16x8UnOpTest(execution_tier, lower_simd, kExprI16x8Neg,
|
|
|
|
base::NegateWithWraparound);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2020-03-03 06:56:03 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Abs) {
|
2020-02-21 04:14:53 +00:00
|
|
|
RunI16x8UnOpTest(execution_tier, lower_simd, kExprI16x8Abs, Abs);
|
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Add) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8Add,
|
|
|
|
base::AddWithWraparound);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2020-10-09 20:59:22 +00:00
|
|
|
WASM_SIMD_TEST(I16x8AddSatS) {
|
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8AddSatS,
|
2020-10-09 00:09:39 +00:00
|
|
|
SaturateAdd<int16_t>);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Sub) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8Sub,
|
|
|
|
base::SubWithWraparound);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2020-10-09 20:59:22 +00:00
|
|
|
WASM_SIMD_TEST(I16x8SubSatS) {
|
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8SubSatS,
|
2020-10-09 00:09:39 +00:00
|
|
|
SaturateSub<int16_t>);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Mul) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8Mul,
|
|
|
|
base::MulWithWraparound);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I16x8MinS) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8MinS, Minimum);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-07 17:33:37 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I16x8MaxS) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8MaxS, Maximum);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-07 17:33:37 +00:00
|
|
|
|
2020-10-09 20:59:22 +00:00
|
|
|
WASM_SIMD_TEST(I16x8AddSatU) {
|
2021-03-29 22:45:22 +00:00
|
|
|
RunI16x8BinOpTest<uint16_t>(execution_tier, lower_simd, kExprI16x8AddSatU,
|
|
|
|
SaturateAdd<uint16_t>);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2020-10-09 20:59:22 +00:00
|
|
|
WASM_SIMD_TEST(I16x8SubSatU) {
|
2021-03-29 22:45:22 +00:00
|
|
|
RunI16x8BinOpTest<uint16_t>(execution_tier, lower_simd, kExprI16x8SubSatU,
|
|
|
|
SaturateSub<uint16_t>);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I16x8MinU) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8MinU,
|
2018-05-18 21:47:59 +00:00
|
|
|
UnsignedMinimum);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I16x8MaxU) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8MaxU,
|
2018-05-18 21:47:59 +00:00
|
|
|
UnsignedMaximum);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Eq) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8Eq, Equal);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Ne) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8Ne, NotEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8LtS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8LtS, Less);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8LeS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8LeS, LessEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8GtS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8GtS, Greater);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8GeS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8GeS, GreaterEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8GtU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8GtU, UnsignedGreater);
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8GeU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8GeU,
|
|
|
|
UnsignedGreaterEqual);
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8LtU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8LtU, UnsignedLess);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I16x8LeU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI16x8BinOpTest(execution_tier, lower_simd, kExprI16x8LeU,
|
|
|
|
UnsignedLessEqual);
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2020-02-06 21:00:57 +00:00
|
|
|
WASM_SIMD_TEST(I16x8RoundingAverageU) {
|
2019-12-09 10:32:55 +00:00
|
|
|
RunI16x8BinOpTest<uint16_t>(execution_tier, lower_simd,
|
|
|
|
kExprI16x8RoundingAverageU,
|
2021-03-18 21:41:50 +00:00
|
|
|
RoundingAverageUnsigned);
|
2019-12-09 10:32:55 +00:00
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Q15MulRSatS) {
|
2020-10-01 20:08:54 +00:00
|
|
|
RunI16x8BinOpTest<int16_t>(execution_tier, lower_simd, kExprI16x8Q15MulRSatS,
|
|
|
|
SaturateRoundingQMul<int16_t>);
|
|
|
|
}
|
2020-10-16 19:54:50 +00:00
|
|
|
|
|
|
|
namespace {
|
|
|
|
enum class MulHalf { kLow, kHigh };
|
|
|
|
|
|
|
|
// Helper to run ext mul tests. It will splat 2 input values into 2 v128, call
|
|
|
|
// the mul op on these operands, and set the result into a global.
|
|
|
|
// It will zero the top or bottom half of one of the operands, this will catch
|
|
|
|
// mistakes if we are multiply the incorrect halves.
|
|
|
|
template <typename S, typename T, typename OpType = T (*)(S, S)>
|
|
|
|
void RunExtMulTest(TestExecutionTier execution_tier, LowerSimd lower_simd,
|
|
|
|
WasmOpcode opcode, OpType expected_op, WasmOpcode splat,
|
|
|
|
MulHalf half) {
|
|
|
|
WasmRunner<int32_t, S, S> r(execution_tier, lower_simd);
|
|
|
|
int lane_to_zero = half == MulHalf::kLow ? 1 : 0;
|
|
|
|
T* g = r.builder().template AddGlobal<T>(kWasmS128);
|
|
|
|
|
|
|
|
BUILD(r,
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-10-16 19:54:50 +00:00
|
|
|
0, WASM_SIMD_BINOP(
|
|
|
|
opcode,
|
|
|
|
WASM_SIMD_I64x2_REPLACE_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
lane_to_zero, WASM_SIMD_UNOP(splat, WASM_LOCAL_GET(0)),
|
2020-10-16 19:54:50 +00:00
|
|
|
WASM_I64V_1(0)),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_SIMD_UNOP(splat, WASM_LOCAL_GET(1)))),
|
2020-10-16 19:54:50 +00:00
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
constexpr int lanes = kSimd128Size / sizeof(T);
|
|
|
|
for (S x : compiler::ValueHelper::GetVector<S>()) {
|
|
|
|
for (S y : compiler::ValueHelper::GetVector<S>()) {
|
|
|
|
r.Call(x, y);
|
|
|
|
T expected = expected_op(x, y);
|
|
|
|
for (int i = 0; i < lanes; i++) {
|
|
|
|
CHECK_EQ(expected, ReadLittleEndianValue<T>(&g[i]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} // namespace
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ExtMulLowI8x16S) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<int8_t, int16_t>(execution_tier, lower_simd,
|
|
|
|
kExprI16x8ExtMulLowI8x16S, MultiplyLong,
|
|
|
|
kExprI8x16Splat, MulHalf::kLow);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ExtMulHighI8x16S) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<int8_t, int16_t>(execution_tier, lower_simd,
|
|
|
|
kExprI16x8ExtMulHighI8x16S, MultiplyLong,
|
|
|
|
kExprI8x16Splat, MulHalf::kHigh);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ExtMulLowI8x16U) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<uint8_t, uint16_t>(execution_tier, lower_simd,
|
|
|
|
kExprI16x8ExtMulLowI8x16U, MultiplyLong,
|
|
|
|
kExprI8x16Splat, MulHalf::kLow);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ExtMulHighI8x16U) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<uint8_t, uint16_t>(execution_tier, lower_simd,
|
|
|
|
kExprI16x8ExtMulHighI8x16U, MultiplyLong,
|
|
|
|
kExprI8x16Splat, MulHalf::kHigh);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ExtMulLowI16x8S) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<int16_t, int32_t>(execution_tier, lower_simd,
|
|
|
|
kExprI32x4ExtMulLowI16x8S, MultiplyLong,
|
|
|
|
kExprI16x8Splat, MulHalf::kLow);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ExtMulHighI16x8S) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<int16_t, int32_t>(execution_tier, lower_simd,
|
|
|
|
kExprI32x4ExtMulHighI16x8S, MultiplyLong,
|
|
|
|
kExprI16x8Splat, MulHalf::kHigh);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ExtMulLowI16x8U) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<uint16_t, uint32_t>(execution_tier, lower_simd,
|
|
|
|
kExprI32x4ExtMulLowI16x8U, MultiplyLong,
|
|
|
|
kExprI16x8Splat, MulHalf::kLow);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I32x4ExtMulHighI16x8U) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<uint16_t, uint32_t>(execution_tier, lower_simd,
|
|
|
|
kExprI32x4ExtMulHighI16x8U, MultiplyLong,
|
|
|
|
kExprI16x8Splat, MulHalf::kHigh);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ExtMulLowI32x4S) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<int32_t, int64_t>(execution_tier, lower_simd,
|
|
|
|
kExprI64x2ExtMulLowI32x4S, MultiplyLong,
|
|
|
|
kExprI32x4Splat, MulHalf::kLow);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ExtMulHighI32x4S) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<int32_t, int64_t>(execution_tier, lower_simd,
|
|
|
|
kExprI64x2ExtMulHighI32x4S, MultiplyLong,
|
|
|
|
kExprI32x4Splat, MulHalf::kHigh);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ExtMulLowI32x4U) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<uint32_t, uint64_t>(execution_tier, lower_simd,
|
|
|
|
kExprI64x2ExtMulLowI32x4U, MultiplyLong,
|
|
|
|
kExprI32x4Splat, MulHalf::kLow);
|
|
|
|
}
|
|
|
|
|
2021-01-05 09:09:33 +00:00
|
|
|
WASM_SIMD_TEST(I64x2ExtMulHighI32x4U) {
|
2020-10-16 19:54:50 +00:00
|
|
|
RunExtMulTest<uint32_t, uint64_t>(execution_tier, lower_simd,
|
|
|
|
kExprI64x2ExtMulHighI32x4U, MultiplyLong,
|
|
|
|
kExprI32x4Splat, MulHalf::kHigh);
|
|
|
|
}
|
2020-10-01 20:08:54 +00:00
|
|
|
|
2020-10-16 18:27:45 +00:00
|
|
|
WASM_SIMD_TEST(I32x4DotI16x8S) {
|
2020-06-12 00:05:20 +00:00
|
|
|
WasmRunner<int32_t, int16_t, int16_t> r(execution_tier, lower_simd);
|
|
|
|
int32_t* g = r.builder().template AddGlobal<int32_t>(kWasmS128);
|
|
|
|
byte value1 = 0, value2 = 1;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
|
|
|
byte temp2 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_SPLAT(WASM_LOCAL_GET(value1))),
|
|
|
|
WASM_LOCAL_SET(temp2, WASM_SIMD_I16x8_SPLAT(WASM_LOCAL_GET(value2))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
0, WASM_SIMD_BINOP(kExprI32x4DotI16x8S, WASM_LOCAL_GET(temp1),
|
|
|
|
WASM_LOCAL_GET(temp2))),
|
2020-06-12 00:05:20 +00:00
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
for (int16_t x : compiler::ValueHelper::GetVector<int16_t>()) {
|
|
|
|
for (int16_t y : compiler::ValueHelper::GetVector<int16_t>()) {
|
|
|
|
r.Call(x, y);
|
|
|
|
// x * y * 2 can overflow (0x8000), the behavior is to wraparound.
|
|
|
|
int32_t expected = base::MulWithWraparound(x * y, 2);
|
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
CHECK_EQ(expected, ReadLittleEndianValue<int32_t>(&g[i]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-04-03 23:14:14 +00:00
|
|
|
WASM_SIMD_TEST(I16x8Shl) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI16x8ShiftOpTest(execution_tier, lower_simd, kExprI16x8Shl,
|
2018-07-03 17:14:07 +00:00
|
|
|
LogicalShiftLeft);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2020-04-03 23:14:14 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ShrS) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI16x8ShiftOpTest(execution_tier, lower_simd, kExprI16x8ShrS,
|
2018-07-03 17:14:07 +00:00
|
|
|
ArithmeticShiftRight);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2020-04-03 23:14:14 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ShrU) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI16x8ShiftOpTest(execution_tier, lower_simd, kExprI16x8ShrU,
|
2018-07-03 17:14:07 +00:00
|
|
|
LogicalShiftRight);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 23:24:10 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Neg) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI8x16UnOpTest(execution_tier, lower_simd, kExprI8x16Neg,
|
|
|
|
base::NegateWithWraparound);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2020-03-03 06:56:03 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Abs) {
|
2020-02-21 04:14:53 +00:00
|
|
|
RunI8x16UnOpTest(execution_tier, lower_simd, kExprI8x16Abs, Abs);
|
|
|
|
}
|
|
|
|
|
2021-03-24 20:32:23 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Popcnt) {
|
2020-10-09 19:57:22 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Global to hold output.
|
|
|
|
int8_t* g = r.builder().AddGlobal<int8_t>(kWasmS128);
|
|
|
|
// Build fn to splat test value, perform unop, and write the result.
|
|
|
|
byte value = 0;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I8x16_SPLAT(WASM_LOCAL_GET(value))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
0, WASM_SIMD_UNOP(kExprI8x16Popcnt, WASM_LOCAL_GET(temp1))),
|
2020-10-09 19:57:22 +00:00
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
FOR_UINT8_INPUTS(x) {
|
|
|
|
r.Call(x);
|
|
|
|
unsigned expected = base::bits::CountPopulation(x);
|
|
|
|
for (int i = 0; i < 16; i++) {
|
|
|
|
CHECK_EQ(expected, ReadLittleEndianValue<int8_t>(&g[i]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
[WASM SIMD] Implement packing and unpacking integer conversions.
- Adds WASM opcodes I32x4SConvertI16x8Low, I32x4SConvertI16x8High,
I32x4UConvertI16x8Low, I32x4UConvertI16x8High, which unpack half of
an I16x8 register into a whole I32x4 register, with signed or unsigned
extension. Having separate Low/High opcodes works around the difficulty
of having multiple output registers, which would be necessary if we unpacked
the entire I16x8 register.
- Adds WASM opcodes I16x8SConvertI8x16Low, I16x8SConvertI8x16High,
I16x8UConvertI8x16Low, I16x8UConvertI8x16High, similarly to above.
- Adds WASM opcodes I16x8SConvertI32x4, I16x8UConvertI32x4,
I8x16SConvert16x8, I8x16UConvertI16x8, which pack two source registers
into a single destination register with signed or unsigned saturation. These
could have been separated into half operations, but this is simpler to
implement with SSE, AVX, and is acceptable on ARM. It also avoids adding
operations that only modify half of their destination register.
- Implements these opcodes for ARM.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2800523002
Cr-Commit-Position: refs/heads/master@{#44541}
2017-04-10 23:07:30 +00:00
|
|
|
// Tests both signed and unsigned conversion from I16x8 (packing).
|
2018-06-20 06:03:44 +00:00
|
|
|
WASM_SIMD_TEST(I8x16ConvertI16x8) {
|
2019-03-08 00:43:11 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
// Create output vectors to hold signed and unsigned results.
|
2021-02-02 17:26:54 +00:00
|
|
|
int8_t* g_s = r.builder().AddGlobal<int8_t>(kWasmS128);
|
|
|
|
uint8_t* g_u = r.builder().AddGlobal<uint8_t>(kWasmS128);
|
2019-03-08 00:43:11 +00:00
|
|
|
// Build fn to splat test value, perform conversions, and write the results.
|
|
|
|
byte value = 0;
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(temp1, WASM_SIMD_I16x8_SPLAT(WASM_LOCAL_GET(value))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
0, WASM_SIMD_BINOP(kExprI8x16SConvertI16x8, WASM_LOCAL_GET(temp1),
|
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-12-17 16:55:33 +00:00
|
|
|
1, WASM_SIMD_BINOP(kExprI8x16UConvertI16x8, WASM_LOCAL_GET(temp1),
|
|
|
|
WASM_LOCAL_GET(temp1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
[WASM SIMD] Implement packing and unpacking integer conversions.
- Adds WASM opcodes I32x4SConvertI16x8Low, I32x4SConvertI16x8High,
I32x4UConvertI16x8Low, I32x4UConvertI16x8High, which unpack half of
an I16x8 register into a whole I32x4 register, with signed or unsigned
extension. Having separate Low/High opcodes works around the difficulty
of having multiple output registers, which would be necessary if we unpacked
the entire I16x8 register.
- Adds WASM opcodes I16x8SConvertI8x16Low, I16x8SConvertI8x16High,
I16x8UConvertI8x16Low, I16x8UConvertI8x16High, similarly to above.
- Adds WASM opcodes I16x8SConvertI32x4, I16x8UConvertI32x4,
I8x16SConvert16x8, I8x16UConvertI16x8, which pack two source registers
into a single destination register with signed or unsigned saturation. These
could have been separated into half operations, but this is simpler to
implement with SSE, AVX, and is acceptable on ARM. It also avoids adding
operations that only modify half of their destination register.
- Implements these opcodes for ARM.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2800523002
Cr-Commit-Position: refs/heads/master@{#44541}
2017-04-10 23:07:30 +00:00
|
|
|
|
2019-03-08 00:43:11 +00:00
|
|
|
FOR_INT16_INPUTS(x) {
|
|
|
|
r.Call(x);
|
2021-01-29 01:47:22 +00:00
|
|
|
int8_t expected_signed = base::saturated_cast<int8_t>(x);
|
2021-02-02 17:26:54 +00:00
|
|
|
uint8_t expected_unsigned = base::saturated_cast<uint8_t>(x);
|
2019-03-08 00:43:11 +00:00
|
|
|
for (int i = 0; i < 16; i++) {
|
2021-02-02 17:26:54 +00:00
|
|
|
CHECK_EQ(expected_signed, ReadLittleEndianValue<int8_t>(&g_s[i]));
|
|
|
|
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<uint8_t>(&g_u[i]));
|
2018-06-20 06:03:44 +00:00
|
|
|
}
|
[WASM SIMD] Implement packing and unpacking integer conversions.
- Adds WASM opcodes I32x4SConvertI16x8Low, I32x4SConvertI16x8High,
I32x4UConvertI16x8Low, I32x4UConvertI16x8High, which unpack half of
an I16x8 register into a whole I32x4 register, with signed or unsigned
extension. Having separate Low/High opcodes works around the difficulty
of having multiple output registers, which would be necessary if we unpacked
the entire I16x8 register.
- Adds WASM opcodes I16x8SConvertI8x16Low, I16x8SConvertI8x16High,
I16x8UConvertI8x16Low, I16x8UConvertI8x16High, similarly to above.
- Adds WASM opcodes I16x8SConvertI32x4, I16x8UConvertI32x4,
I8x16SConvert16x8, I8x16UConvertI16x8, which pack two source registers
into a single destination register with signed or unsigned saturation. These
could have been separated into half operations, but this is simpler to
implement with SSE, AVX, and is acceptable on ARM. It also avoids adding
operations that only modify half of their destination register.
- Implements these opcodes for ARM.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2800523002
Cr-Commit-Position: refs/heads/master@{#44541}
2017-04-10 23:07:30 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Add) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16Add,
|
|
|
|
base::AddWithWraparound);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2020-10-09 20:59:22 +00:00
|
|
|
WASM_SIMD_TEST(I8x16AddSatS) {
|
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16AddSatS,
|
2020-10-09 00:09:39 +00:00
|
|
|
SaturateAdd<int8_t>);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Sub) {
|
2019-01-10 11:47:08 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16Sub,
|
|
|
|
base::SubWithWraparound);
|
2018-05-18 21:47:59 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2020-10-09 20:59:22 +00:00
|
|
|
WASM_SIMD_TEST(I8x16SubSatS) {
|
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16SubSatS,
|
2020-10-09 00:09:39 +00:00
|
|
|
SaturateSub<int8_t>);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I8x16MinS) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16MinS, Minimum);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-07 17:33:37 +00:00
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I8x16MaxS) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16MaxS, Maximum);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-07 17:33:37 +00:00
|
|
|
|
2020-10-09 20:59:22 +00:00
|
|
|
WASM_SIMD_TEST(I8x16AddSatU) {
|
2021-03-29 22:45:22 +00:00
|
|
|
RunI8x16BinOpTest<uint8_t>(execution_tier, lower_simd, kExprI8x16AddSatU,
|
|
|
|
SaturateAdd<uint8_t>);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2020-10-09 20:59:22 +00:00
|
|
|
WASM_SIMD_TEST(I8x16SubSatU) {
|
2021-03-29 22:45:22 +00:00
|
|
|
RunI8x16BinOpTest<uint8_t>(execution_tier, lower_simd, kExprI8x16SubSatU,
|
|
|
|
SaturateSub<uint8_t>);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I8x16MinU) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16MinU,
|
2018-05-18 21:47:59 +00:00
|
|
|
UnsignedMinimum);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(I8x16MaxU) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16MaxU,
|
2018-05-18 21:47:59 +00:00
|
|
|
UnsignedMaximum);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Eq) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16Eq, Equal);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Ne) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16Ne, NotEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
[wasm] Implement first set of SIMD I8x16 ops
- I8x16Splat, I8x16ExtractLane, I8x16ReplaceLane
- Binops: I8x16Add, I8x16AddSaturateS, I8x16Sub, I8x16SubSaturateS, I8x16MinS,
I8x16MaxS, I8x16AddSaturateU, I8x16SubSaturateU, I8x16MinU, I8x16MaxU
- Compare ops: I8x16Eq, I8x16Ne
BUG=v8:6020
R=bbudge@chromium.org, bmeurer@chromium.org
Review-Url: https://codereview.chromium.org/2829483002
Cr-Commit-Position: refs/heads/master@{#44706}
2017-04-18 23:23:12 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16GtS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16GtS, Greater);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16GeS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16GeS, GreaterEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16LtS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16LtS, Less);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16LeS) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16LeS, LessEqual);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-02-21 16:45:30 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16GtU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16GtU, UnsignedGreater);
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16GeU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16GeU,
|
|
|
|
UnsignedGreaterEqual);
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16LtU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16LtU, UnsignedLess);
|
2017-10-05 20:22:49 +00:00
|
|
|
}
|
2017-01-26 02:18:00 +00:00
|
|
|
|
2018-05-25 21:50:54 +00:00
|
|
|
WASM_SIMD_TEST(I8x16LeU) {
|
2019-03-08 00:43:11 +00:00
|
|
|
RunI8x16BinOpTest(execution_tier, lower_simd, kExprI8x16LeU,
|
|
|
|
UnsignedLessEqual);
|
2017-01-26 02:18:00 +00:00
|
|
|
}
|
2017-02-07 17:33:37 +00:00
|
|
|
|
2020-02-06 21:00:57 +00:00
|
|
|
WASM_SIMD_TEST(I8x16RoundingAverageU) {
|
2019-12-09 10:32:55 +00:00
|
|
|
RunI8x16BinOpTest<uint8_t>(execution_tier, lower_simd,
|
|
|
|
kExprI8x16RoundingAverageU,
|
2021-03-18 21:41:50 +00:00
|
|
|
RoundingAverageUnsigned);
|
2019-12-09 10:32:55 +00:00
|
|
|
}
|
|
|
|
|
2020-04-03 23:14:14 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Shl) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI8x16ShiftOpTest(execution_tier, lower_simd, kExprI8x16Shl,
|
2018-07-03 17:14:07 +00:00
|
|
|
LogicalShiftLeft);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2020-04-03 23:14:14 +00:00
|
|
|
WASM_SIMD_TEST(I8x16ShrS) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI8x16ShiftOpTest(execution_tier, lower_simd, kExprI8x16ShrS,
|
2018-07-03 17:14:07 +00:00
|
|
|
ArithmeticShiftRight);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
|
|
|
|
2020-04-03 23:14:14 +00:00
|
|
|
WASM_SIMD_TEST(I8x16ShrU) {
|
2018-08-21 15:01:31 +00:00
|
|
|
RunI8x16ShiftOpTest(execution_tier, lower_simd, kExprI8x16ShrU,
|
2018-07-03 17:14:07 +00:00
|
|
|
LogicalShiftRight);
|
2017-02-07 17:33:37 +00:00
|
|
|
}
|
2017-02-13 20:24:43 +00:00
|
|
|
|
2017-06-08 20:54:32 +00:00
|
|
|
// Test Select by making a mask where the 0th and 3rd lanes are true and the
|
2017-06-20 22:04:57 +00:00
|
|
|
// rest false, and comparing for non-equality with zero to convert to a boolean
|
2017-06-08 20:54:32 +00:00
|
|
|
// vector.
|
2020-05-05 18:04:33 +00:00
|
|
|
#define WASM_SIMD_SELECT_TEST(format) \
|
|
|
|
WASM_SIMD_TEST(S##format##Select) { \
|
|
|
|
WasmRunner<int32_t, int32_t, int32_t> r(execution_tier, lower_simd); \
|
|
|
|
byte val1 = 0; \
|
|
|
|
byte val2 = 1; \
|
|
|
|
byte src1 = r.AllocateLocal(kWasmS128); \
|
|
|
|
byte src2 = r.AllocateLocal(kWasmS128); \
|
|
|
|
byte zero = r.AllocateLocal(kWasmS128); \
|
|
|
|
byte mask = r.AllocateLocal(kWasmS128); \
|
|
|
|
BUILD(r, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(src1, \
|
|
|
|
WASM_SIMD_I##format##_SPLAT(WASM_LOCAL_GET(val1))), \
|
|
|
|
WASM_LOCAL_SET(src2, \
|
|
|
|
WASM_SIMD_I##format##_SPLAT(WASM_LOCAL_GET(val2))), \
|
|
|
|
WASM_LOCAL_SET(zero, WASM_SIMD_I##format##_SPLAT(WASM_ZERO)), \
|
|
|
|
WASM_LOCAL_SET(mask, WASM_SIMD_I##format##_REPLACE_LANE( \
|
|
|
|
1, WASM_LOCAL_GET(zero), WASM_I32V(-1))), \
|
|
|
|
WASM_LOCAL_SET(mask, WASM_SIMD_I##format##_REPLACE_LANE( \
|
|
|
|
2, WASM_LOCAL_GET(mask), WASM_I32V(-1))), \
|
|
|
|
WASM_LOCAL_SET( \
|
2020-05-05 18:04:33 +00:00
|
|
|
mask, \
|
|
|
|
WASM_SIMD_SELECT( \
|
2020-12-17 16:55:33 +00:00
|
|
|
format, WASM_LOCAL_GET(src1), WASM_LOCAL_GET(src2), \
|
|
|
|
WASM_SIMD_BINOP(kExprI##format##Ne, WASM_LOCAL_GET(mask), \
|
|
|
|
WASM_LOCAL_GET(zero)))), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_SIMD_CHECK_LANE_S(I##format, mask, I32, val2, 0), \
|
|
|
|
WASM_SIMD_CHECK_LANE_S(I##format, mask, I32, val1, 1), \
|
|
|
|
WASM_SIMD_CHECK_LANE_S(I##format, mask, I32, val1, 2), \
|
|
|
|
WASM_SIMD_CHECK_LANE_S(I##format, mask, I32, val2, 3), WASM_ONE); \
|
|
|
|
\
|
|
|
|
CHECK_EQ(1, r.Call(0x12, 0x34)); \
|
2017-02-13 20:24:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
WASM_SIMD_SELECT_TEST(32x4)
|
|
|
|
WASM_SIMD_SELECT_TEST(16x8)
|
|
|
|
WASM_SIMD_SELECT_TEST(8x16)
|
2017-06-08 20:54:32 +00:00
|
|
|
|
|
|
|
// Test Select by making a mask where the 0th and 3rd lanes are non-zero and the
|
|
|
|
// rest 0. The mask is not the result of a comparison op.
|
2020-05-05 18:04:33 +00:00
|
|
|
#define WASM_SIMD_NON_CANONICAL_SELECT_TEST(format) \
|
2020-10-30 01:20:22 +00:00
|
|
|
WASM_SIMD_TEST(S##format##NonCanonicalSelect) { \
|
2020-05-05 18:04:33 +00:00
|
|
|
WasmRunner<int32_t, int32_t, int32_t, int32_t> r(execution_tier, \
|
|
|
|
lower_simd); \
|
|
|
|
byte val1 = 0; \
|
|
|
|
byte val2 = 1; \
|
|
|
|
byte combined = 2; \
|
|
|
|
byte src1 = r.AllocateLocal(kWasmS128); \
|
|
|
|
byte src2 = r.AllocateLocal(kWasmS128); \
|
|
|
|
byte zero = r.AllocateLocal(kWasmS128); \
|
|
|
|
byte mask = r.AllocateLocal(kWasmS128); \
|
|
|
|
BUILD(r, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(src1, \
|
|
|
|
WASM_SIMD_I##format##_SPLAT(WASM_LOCAL_GET(val1))), \
|
|
|
|
WASM_LOCAL_SET(src2, \
|
|
|
|
WASM_SIMD_I##format##_SPLAT(WASM_LOCAL_GET(val2))), \
|
|
|
|
WASM_LOCAL_SET(zero, WASM_SIMD_I##format##_SPLAT(WASM_ZERO)), \
|
|
|
|
WASM_LOCAL_SET(mask, WASM_SIMD_I##format##_REPLACE_LANE( \
|
|
|
|
1, WASM_LOCAL_GET(zero), WASM_I32V(0xF))), \
|
|
|
|
WASM_LOCAL_SET(mask, WASM_SIMD_I##format##_REPLACE_LANE( \
|
|
|
|
2, WASM_LOCAL_GET(mask), WASM_I32V(0xF))), \
|
|
|
|
WASM_LOCAL_SET(mask, WASM_SIMD_SELECT(format, WASM_LOCAL_GET(src1), \
|
|
|
|
WASM_LOCAL_GET(src2), \
|
|
|
|
WASM_LOCAL_GET(mask))), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_SIMD_CHECK_LANE_S(I##format, mask, I32, val2, 0), \
|
|
|
|
WASM_SIMD_CHECK_LANE_S(I##format, mask, I32, combined, 1), \
|
|
|
|
WASM_SIMD_CHECK_LANE_S(I##format, mask, I32, combined, 2), \
|
|
|
|
WASM_SIMD_CHECK_LANE_S(I##format, mask, I32, val2, 3), WASM_ONE); \
|
|
|
|
\
|
|
|
|
CHECK_EQ(1, r.Call(0x12, 0x34, 0x32)); \
|
2017-06-08 20:54:32 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
WASM_SIMD_NON_CANONICAL_SELECT_TEST(32x4)
|
|
|
|
WASM_SIMD_NON_CANONICAL_SELECT_TEST(16x8)
|
|
|
|
WASM_SIMD_NON_CANONICAL_SELECT_TEST(8x16)
|
2017-03-02 19:50:33 +00:00
|
|
|
|
2017-04-24 18:53:16 +00:00
|
|
|
// Test binary ops with two lane test patterns, all lanes distinct.
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
template <typename T>
|
2017-04-24 18:53:16 +00:00
|
|
|
void RunBinaryLaneOpTest(
|
2020-08-04 11:09:23 +00:00
|
|
|
TestExecutionTier execution_tier, LowerSimd lower_simd, WasmOpcode simd_op,
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
const std::array<T, kSimd128Size / sizeof(T)>& expected) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
// Set up two test patterns as globals, e.g. [0, 1, 2, 3] and [4, 5, 6, 7].
|
2017-08-19 16:34:11 +00:00
|
|
|
T* src0 = r.builder().AddGlobal<T>(kWasmS128);
|
|
|
|
T* src1 = r.builder().AddGlobal<T>(kWasmS128);
|
2017-05-04 16:50:51 +00:00
|
|
|
static const int kElems = kSimd128Size / sizeof(T);
|
|
|
|
for (int i = 0; i < kElems; i++) {
|
2018-08-10 11:20:40 +00:00
|
|
|
WriteLittleEndianValue<T>(&src0[i], i);
|
|
|
|
WriteLittleEndianValue<T>(&src1[i], kElems + i);
|
2017-05-04 16:50:51 +00:00
|
|
|
}
|
2020-09-25 18:08:04 +00:00
|
|
|
if (simd_op == kExprI8x16Shuffle) {
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_I8x16_SHUFFLE_OP(simd_op, expected,
|
|
|
|
WASM_GLOBAL_GET(0),
|
|
|
|
WASM_GLOBAL_GET(1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2017-06-13 23:40:51 +00:00
|
|
|
} else {
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_BINOP(simd_op, WASM_GLOBAL_GET(0),
|
|
|
|
WASM_GLOBAL_GET(1))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
CHECK_EQ(1, r.Call());
|
|
|
|
for (size_t i = 0; i < expected.size(); i++) {
|
2018-08-10 11:20:40 +00:00
|
|
|
CHECK_EQ(ReadLittleEndianValue<T>(&src0[i]), expected[i]);
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-09 17:01:36 +00:00
|
|
|
// Test shuffle ops.
|
2020-08-04 11:09:23 +00:00
|
|
|
void RunShuffleOpTest(TestExecutionTier execution_tier, LowerSimd lower_simd,
|
2018-06-09 17:01:36 +00:00
|
|
|
WasmOpcode simd_op,
|
2018-07-13 18:24:42 +00:00
|
|
|
const std::array<int8_t, kSimd128Size>& shuffle) {
|
2018-06-09 17:01:36 +00:00
|
|
|
// Test the original shuffle.
|
2018-08-21 15:01:31 +00:00
|
|
|
RunBinaryLaneOpTest<int8_t>(execution_tier, lower_simd, simd_op, shuffle);
|
2018-06-09 17:01:36 +00:00
|
|
|
|
|
|
|
// Test a non-canonical (inputs reversed) version of the shuffle.
|
2018-07-13 18:24:42 +00:00
|
|
|
std::array<int8_t, kSimd128Size> other_shuffle(shuffle);
|
2018-06-09 17:01:36 +00:00
|
|
|
for (size_t i = 0; i < shuffle.size(); ++i) other_shuffle[i] ^= kSimd128Size;
|
2018-08-21 15:01:31 +00:00
|
|
|
RunBinaryLaneOpTest<int8_t>(execution_tier, lower_simd, simd_op,
|
2018-07-13 18:24:42 +00:00
|
|
|
other_shuffle);
|
2018-06-09 17:01:36 +00:00
|
|
|
|
|
|
|
// Test the swizzle (one-operand) version of the shuffle.
|
2018-07-13 18:24:42 +00:00
|
|
|
std::array<int8_t, kSimd128Size> swizzle(shuffle);
|
2018-06-09 17:01:36 +00:00
|
|
|
for (size_t i = 0; i < shuffle.size(); ++i) swizzle[i] &= (kSimd128Size - 1);
|
2018-08-21 15:01:31 +00:00
|
|
|
RunBinaryLaneOpTest<int8_t>(execution_tier, lower_simd, simd_op, swizzle);
|
2018-06-09 17:01:36 +00:00
|
|
|
|
|
|
|
// Test the non-canonical swizzle (one-operand) version of the shuffle.
|
2018-07-13 18:24:42 +00:00
|
|
|
std::array<int8_t, kSimd128Size> other_swizzle(shuffle);
|
2018-06-09 17:01:36 +00:00
|
|
|
for (size_t i = 0; i < shuffle.size(); ++i) other_swizzle[i] |= kSimd128Size;
|
2018-08-21 15:01:31 +00:00
|
|
|
RunBinaryLaneOpTest<int8_t>(execution_tier, lower_simd, simd_op,
|
2018-07-13 18:24:42 +00:00
|
|
|
other_swizzle);
|
2018-06-09 17:01:36 +00:00
|
|
|
}
|
|
|
|
|
2018-07-13 18:24:42 +00:00
|
|
|
#define SHUFFLE_LIST(V) \
|
|
|
|
V(S128Identity) \
|
|
|
|
V(S32x4Dup) \
|
|
|
|
V(S32x4ZipLeft) \
|
|
|
|
V(S32x4ZipRight) \
|
|
|
|
V(S32x4UnzipLeft) \
|
|
|
|
V(S32x4UnzipRight) \
|
|
|
|
V(S32x4TransposeLeft) \
|
|
|
|
V(S32x4TransposeRight) \
|
|
|
|
V(S32x2Reverse) \
|
|
|
|
V(S32x4Irregular) \
|
[x64][wasm-simd] Pattern match 32x4 rotate
Code like:
x = wasm_v32x4_shuffle(x, x, 1, 2, 3, 0);
is currently matched by S8x16Concat, which lowers to two instructions:
movapd xmm_dst, xmm_src
palignr xmm_dst, xmm_src, 0x4
There is a special case after a S8x16Concat is matched:.
- is_swizzle, the inputs are the same
- it is a 32x4 shuffle (offset % 4 == 0)
Which can have a better codegen:
- (dst == src) shufps dst, src, 0b00111001
- (dst != src) pshufd dst, src, 0b00111001
Add a new simd shuffle matcher which will match 32x4 rotate, and
construct the appropriate indices referring to the 32x4 elements.
pshufd for the given example. However, this matching happens after
S8x16Concat, so we get the palignr first. We could move the pattern
matching cases around, but it will lead to some cases where
where it would have matched a S8x16Concat, but now matches a
S32x4shuffle instead, leading to worse codegen.
Note: we also pattern match on 32x4Swizzle, which correctly generates
Change-Id: Ie3aca53bbc06826be2cf49632de4c24ec73d0a9a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2589062
Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#71754}
2020-12-14 23:31:33 +00:00
|
|
|
V(S32x4Rotate) \
|
2018-07-13 18:24:42 +00:00
|
|
|
V(S16x8Dup) \
|
|
|
|
V(S16x8ZipLeft) \
|
|
|
|
V(S16x8ZipRight) \
|
|
|
|
V(S16x8UnzipLeft) \
|
|
|
|
V(S16x8UnzipRight) \
|
|
|
|
V(S16x8TransposeLeft) \
|
|
|
|
V(S16x8TransposeRight) \
|
|
|
|
V(S16x4Reverse) \
|
|
|
|
V(S16x2Reverse) \
|
|
|
|
V(S16x8Irregular) \
|
|
|
|
V(S8x16Dup) \
|
|
|
|
V(S8x16ZipLeft) \
|
|
|
|
V(S8x16ZipRight) \
|
|
|
|
V(S8x16UnzipLeft) \
|
|
|
|
V(S8x16UnzipRight) \
|
|
|
|
V(S8x16TransposeLeft) \
|
|
|
|
V(S8x16TransposeRight) \
|
|
|
|
V(S8x8Reverse) \
|
|
|
|
V(S8x4Reverse) \
|
|
|
|
V(S8x2Reverse) \
|
|
|
|
V(S8x16Irregular)
|
|
|
|
|
|
|
|
enum ShuffleKey {
|
|
|
|
#define SHUFFLE_ENUM_VALUE(Name) k##Name,
|
|
|
|
SHUFFLE_LIST(SHUFFLE_ENUM_VALUE)
|
|
|
|
#undef SHUFFLE_ENUM_VALUE
|
|
|
|
kNumShuffleKeys
|
|
|
|
};
|
|
|
|
|
|
|
|
using ShuffleMap = std::map<ShuffleKey, const Shuffle>;
|
|
|
|
|
|
|
|
ShuffleMap test_shuffles = {
|
|
|
|
{kS128Identity,
|
|
|
|
{{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}}},
|
|
|
|
{kS32x4Dup,
|
|
|
|
{{16, 17, 18, 19, 16, 17, 18, 19, 16, 17, 18, 19, 16, 17, 18, 19}}},
|
|
|
|
{kS32x4ZipLeft, {{0, 1, 2, 3, 16, 17, 18, 19, 4, 5, 6, 7, 20, 21, 22, 23}}},
|
|
|
|
{kS32x4ZipRight,
|
|
|
|
{{8, 9, 10, 11, 24, 25, 26, 27, 12, 13, 14, 15, 28, 29, 30, 31}}},
|
|
|
|
{kS32x4UnzipLeft,
|
|
|
|
{{0, 1, 2, 3, 8, 9, 10, 11, 16, 17, 18, 19, 24, 25, 26, 27}}},
|
|
|
|
{kS32x4UnzipRight,
|
|
|
|
{{4, 5, 6, 7, 12, 13, 14, 15, 20, 21, 22, 23, 28, 29, 30, 31}}},
|
|
|
|
{kS32x4TransposeLeft,
|
|
|
|
{{0, 1, 2, 3, 16, 17, 18, 19, 8, 9, 10, 11, 24, 25, 26, 27}}},
|
|
|
|
{kS32x4TransposeRight,
|
|
|
|
{{4, 5, 6, 7, 20, 21, 22, 23, 12, 13, 14, 15, 28, 29, 30, 31}}},
|
|
|
|
{kS32x2Reverse, // swizzle only
|
|
|
|
{{4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 8, 9, 10, 11}}},
|
|
|
|
{kS32x4Irregular,
|
|
|
|
{{0, 1, 2, 3, 16, 17, 18, 19, 16, 17, 18, 19, 20, 21, 22, 23}}},
|
[x64][wasm-simd] Pattern match 32x4 rotate
Code like:
x = wasm_v32x4_shuffle(x, x, 1, 2, 3, 0);
is currently matched by S8x16Concat, which lowers to two instructions:
movapd xmm_dst, xmm_src
palignr xmm_dst, xmm_src, 0x4
There is a special case after a S8x16Concat is matched:.
- is_swizzle, the inputs are the same
- it is a 32x4 shuffle (offset % 4 == 0)
Which can have a better codegen:
- (dst == src) shufps dst, src, 0b00111001
- (dst != src) pshufd dst, src, 0b00111001
Add a new simd shuffle matcher which will match 32x4 rotate, and
construct the appropriate indices referring to the 32x4 elements.
pshufd for the given example. However, this matching happens after
S8x16Concat, so we get the palignr first. We could move the pattern
matching cases around, but it will lead to some cases where
where it would have matched a S8x16Concat, but now matches a
S32x4shuffle instead, leading to worse codegen.
Note: we also pattern match on 32x4Swizzle, which correctly generates
Change-Id: Ie3aca53bbc06826be2cf49632de4c24ec73d0a9a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2589062
Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#71754}
2020-12-14 23:31:33 +00:00
|
|
|
{kS32x4Rotate, {{4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3}}},
|
2018-07-13 18:24:42 +00:00
|
|
|
{kS16x8Dup,
|
|
|
|
{{18, 19, 18, 19, 18, 19, 18, 19, 18, 19, 18, 19, 18, 19, 18, 19}}},
|
|
|
|
{kS16x8ZipLeft, {{0, 1, 16, 17, 2, 3, 18, 19, 4, 5, 20, 21, 6, 7, 22, 23}}},
|
|
|
|
{kS16x8ZipRight,
|
|
|
|
{{8, 9, 24, 25, 10, 11, 26, 27, 12, 13, 28, 29, 14, 15, 30, 31}}},
|
|
|
|
{kS16x8UnzipLeft,
|
|
|
|
{{0, 1, 4, 5, 8, 9, 12, 13, 16, 17, 20, 21, 24, 25, 28, 29}}},
|
|
|
|
{kS16x8UnzipRight,
|
|
|
|
{{2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31}}},
|
|
|
|
{kS16x8TransposeLeft,
|
|
|
|
{{0, 1, 16, 17, 4, 5, 20, 21, 8, 9, 24, 25, 12, 13, 28, 29}}},
|
|
|
|
{kS16x8TransposeRight,
|
|
|
|
{{2, 3, 18, 19, 6, 7, 22, 23, 10, 11, 26, 27, 14, 15, 30, 31}}},
|
|
|
|
{kS16x4Reverse, // swizzle only
|
|
|
|
{{6, 7, 4, 5, 2, 3, 0, 1, 14, 15, 12, 13, 10, 11, 8, 9}}},
|
|
|
|
{kS16x2Reverse, // swizzle only
|
|
|
|
{{2, 3, 0, 1, 6, 7, 4, 5, 10, 11, 8, 9, 14, 15, 12, 13}}},
|
|
|
|
{kS16x8Irregular,
|
|
|
|
{{0, 1, 16, 17, 16, 17, 0, 1, 4, 5, 20, 21, 6, 7, 22, 23}}},
|
|
|
|
{kS8x16Dup,
|
|
|
|
{{19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19}}},
|
|
|
|
{kS8x16ZipLeft, {{0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23}}},
|
|
|
|
{kS8x16ZipRight,
|
|
|
|
{{8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31}}},
|
|
|
|
{kS8x16UnzipLeft,
|
|
|
|
{{0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30}}},
|
|
|
|
{kS8x16UnzipRight,
|
|
|
|
{{1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31}}},
|
|
|
|
{kS8x16TransposeLeft,
|
|
|
|
{{0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30}}},
|
|
|
|
{kS8x16TransposeRight,
|
|
|
|
{{1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31}}},
|
|
|
|
{kS8x8Reverse, // swizzle only
|
|
|
|
{{7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8}}},
|
|
|
|
{kS8x4Reverse, // swizzle only
|
|
|
|
{{3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12}}},
|
|
|
|
{kS8x2Reverse, // swizzle only
|
|
|
|
{{1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14}}},
|
|
|
|
{kS8x16Irregular,
|
|
|
|
{{0, 16, 0, 16, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23}}},
|
|
|
|
};
|
|
|
|
|
|
|
|
#define SHUFFLE_TEST(Name) \
|
|
|
|
WASM_SIMD_TEST(Name) { \
|
|
|
|
ShuffleMap::const_iterator it = test_shuffles.find(k##Name); \
|
|
|
|
DCHECK_NE(it, test_shuffles.end()); \
|
2020-09-25 18:08:04 +00:00
|
|
|
RunShuffleOpTest(execution_tier, lower_simd, kExprI8x16Shuffle, \
|
2018-07-13 18:24:42 +00:00
|
|
|
it->second); \
|
|
|
|
}
|
|
|
|
SHUFFLE_LIST(SHUFFLE_TEST)
|
|
|
|
#undef SHUFFLE_TEST
|
|
|
|
#undef SHUFFLE_LIST
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
|
2018-07-13 18:24:42 +00:00
|
|
|
// Test shuffles that blend the two vectors (elements remain in their lanes.)
|
|
|
|
WASM_SIMD_TEST(S8x16Blend) {
|
|
|
|
std::array<int8_t, kSimd128Size> expected;
|
|
|
|
for (int bias = 1; bias < kSimd128Size; bias++) {
|
|
|
|
for (int i = 0; i < bias; i++) expected[i] = i;
|
|
|
|
for (int i = bias; i < kSimd128Size; i++) expected[i] = i + kSimd128Size;
|
2020-09-25 18:08:04 +00:00
|
|
|
RunShuffleOpTest(execution_tier, lower_simd, kExprI8x16Shuffle, expected);
|
2018-07-13 18:24:42 +00:00
|
|
|
}
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
}
|
|
|
|
|
2018-07-13 18:24:42 +00:00
|
|
|
// Test shuffles that concatenate the two vectors.
|
|
|
|
WASM_SIMD_TEST(S8x16Concat) {
|
|
|
|
std::array<int8_t, kSimd128Size> expected;
|
|
|
|
// n is offset or bias of concatenation.
|
|
|
|
for (int n = 1; n < kSimd128Size; ++n) {
|
|
|
|
int i = 0;
|
|
|
|
// last kLanes - n bytes of first vector.
|
|
|
|
for (int j = n; j < kSimd128Size; ++j) {
|
|
|
|
expected[i++] = j;
|
|
|
|
}
|
|
|
|
// first n bytes of second vector
|
|
|
|
for (int j = 0; j < n; ++j) {
|
|
|
|
expected[i++] = j + kSimd128Size;
|
|
|
|
}
|
2020-09-25 18:08:04 +00:00
|
|
|
RunShuffleOpTest(execution_tier, lower_simd, kExprI8x16Shuffle, expected);
|
2018-07-13 18:24:42 +00:00
|
|
|
}
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
}
|
|
|
|
|
[wasm-simd][x64] Pattern match on shufps-style shuffles
When a 8x16 shuffle matches a 32x4 shuffle (every group of 4 indices are
consecutive), and the first 2 indices are in the range [0-3], and the
other 2 indices are in the range [4-7], then we can match it to a
shufps. E.g. [0,2,4,6], [1,3,5,7]. These shuffles are commonly used to
extract odd/even floats.
Change-Id: I031fe44f71a13bbc72115c22b02a5eaaf29d3794
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2596579
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Bill Budge <bbudge@chromium.org>
Cr-Commit-Position: refs/heads/master@{#71860}
2020-12-22 02:33:58 +00:00
|
|
|
WASM_SIMD_TEST(ShuffleShufps) {
|
|
|
|
// We reverse engineer the shufps immediates into 8x16 shuffles.
|
|
|
|
std::array<int8_t, kSimd128Size> expected;
|
|
|
|
for (int mask = 0; mask < 256; mask++) {
|
|
|
|
// Each iteration of this loop sets byte[i] of the 32x4 lanes.
|
|
|
|
// Low 2 lanes (2-bits each) select from first input.
|
|
|
|
uint8_t index0 = (mask & 3) * 4;
|
|
|
|
uint8_t index1 = ((mask >> 2) & 3) * 4;
|
|
|
|
// Next 2 bits select from src2, so add 16 to the index.
|
|
|
|
uint8_t index2 = ((mask >> 4) & 3) * 4 + 16;
|
|
|
|
uint8_t index3 = ((mask >> 6) & 3) * 4 + 16;
|
|
|
|
|
|
|
|
for (int i = 0; i < 4; i++) {
|
|
|
|
expected[0 + i] = index0 + i;
|
|
|
|
expected[4 + i] = index1 + i;
|
|
|
|
expected[8 + i] = index2 + i;
|
|
|
|
expected[12 + i] = index3 + i;
|
|
|
|
}
|
|
|
|
RunShuffleOpTest(execution_tier, lower_simd, kExprI8x16Shuffle, expected);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-10-09 17:25:33 +00:00
|
|
|
struct SwizzleTestArgs {
|
|
|
|
const Shuffle input;
|
|
|
|
const Shuffle indices;
|
|
|
|
const Shuffle expected;
|
|
|
|
};
|
|
|
|
|
|
|
|
static constexpr SwizzleTestArgs swizzle_test_args[] = {
|
|
|
|
{{15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0},
|
|
|
|
{15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0},
|
|
|
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}},
|
|
|
|
{{15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0},
|
|
|
|
{15, 0, 14, 1, 13, 2, 12, 3, 11, 4, 10, 5, 9, 6, 8, 7},
|
|
|
|
{0, 15, 1, 14, 2, 13, 3, 12, 4, 11, 5, 10, 6, 9, 7, 8}},
|
|
|
|
{{15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0},
|
|
|
|
{0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30},
|
|
|
|
{15, 13, 11, 9, 7, 5, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0}},
|
|
|
|
// all indices are out of range
|
|
|
|
{{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15},
|
|
|
|
{16, 17, 18, 19, 20, 124, 125, 126, 127, -1, -2, -3, -4, -5, -6, -7},
|
|
|
|
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}};
|
|
|
|
|
|
|
|
static constexpr Vector<const SwizzleTestArgs> swizzle_test_vector =
|
|
|
|
ArrayVector(swizzle_test_args);
|
|
|
|
|
2020-09-25 18:08:04 +00:00
|
|
|
WASM_SIMD_TEST(I8x16Swizzle) {
|
2019-10-09 17:25:33 +00:00
|
|
|
// RunBinaryLaneOpTest set up the two globals to be consecutive integers,
|
|
|
|
// [0-15] and [16-31]. Using [0-15] as the indices will not sufficiently test
|
|
|
|
// swizzle since the expected result is a no-op, using [16-31] will result in
|
|
|
|
// all 0s.
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
static const int kElems = kSimd128Size / sizeof(uint8_t);
|
|
|
|
uint8_t* dst = r.builder().AddGlobal<uint8_t>(kWasmS128);
|
|
|
|
uint8_t* src0 = r.builder().AddGlobal<uint8_t>(kWasmS128);
|
|
|
|
uint8_t* src1 = r.builder().AddGlobal<uint8_t>(kWasmS128);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(
|
2019-10-09 17:25:33 +00:00
|
|
|
r,
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_BINOP(kExprI8x16Swizzle, WASM_GLOBAL_GET(1),
|
|
|
|
WASM_GLOBAL_GET(2))),
|
2019-10-09 17:25:33 +00:00
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
for (SwizzleTestArgs si : swizzle_test_vector) {
|
|
|
|
for (int i = 0; i < kElems; i++) {
|
|
|
|
WriteLittleEndianValue<uint8_t>(&src0[i], si.input[i]);
|
|
|
|
WriteLittleEndianValue<uint8_t>(&src1[i], si.indices[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
CHECK_EQ(1, r.Call());
|
|
|
|
|
|
|
|
for (int i = 0; i < kElems; i++) {
|
|
|
|
CHECK_EQ(ReadLittleEndianValue<uint8_t>(&dst[i]), si.expected[i]);
|
|
|
|
}
|
|
|
|
}
|
2021-04-12 22:00:42 +00:00
|
|
|
|
|
|
|
{
|
|
|
|
// We have an optimization for constant indices, test this case.
|
|
|
|
for (SwizzleTestArgs si : swizzle_test_vector) {
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
uint8_t* dst = r.builder().AddGlobal<uint8_t>(kWasmS128);
|
|
|
|
uint8_t* src0 = r.builder().AddGlobal<uint8_t>(kWasmS128);
|
|
|
|
BUILD(r,
|
|
|
|
WASM_GLOBAL_SET(
|
|
|
|
0, WASM_SIMD_BINOP(kExprI8x16Swizzle, WASM_GLOBAL_GET(1),
|
|
|
|
WASM_SIMD_CONSTANT(si.indices))),
|
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
for (int i = 0; i < kSimd128Size; i++) {
|
|
|
|
WriteLittleEndianValue<uint8_t>(&src0[i], si.input[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
CHECK_EQ(1, r.Call());
|
|
|
|
|
|
|
|
for (int i = 0; i < kSimd128Size; i++) {
|
|
|
|
CHECK_EQ(ReadLittleEndianValue<uint8_t>(&dst[i]), si.expected[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2019-10-09 17:25:33 +00:00
|
|
|
}
|
|
|
|
|
2018-07-13 18:24:42 +00:00
|
|
|
// Combine 3 shuffles a, b, and c by applying both a and b and then applying c
|
|
|
|
// to those two results.
|
|
|
|
Shuffle Combine(const Shuffle& a, const Shuffle& b, const Shuffle& c) {
|
|
|
|
Shuffle result;
|
|
|
|
for (int i = 0; i < kSimd128Size; ++i) {
|
|
|
|
result[i] = c[i] < kSimd128Size ? a[c[i]] : b[c[i] - kSimd128Size];
|
|
|
|
}
|
|
|
|
return result;
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
}
|
|
|
|
|
2018-07-13 18:24:42 +00:00
|
|
|
const Shuffle& GetRandomTestShuffle(v8::base::RandomNumberGenerator* rng) {
|
|
|
|
return test_shuffles[static_cast<ShuffleKey>(rng->NextInt(kNumShuffleKeys))];
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
}
|
|
|
|
|
2018-07-13 18:24:42 +00:00
|
|
|
// Test shuffles that are random combinations of 3 test shuffles. Completely
|
|
|
|
// random shuffles almost always generate the slow general shuffle code, so
|
|
|
|
// don't exercise as many code paths.
|
2020-09-25 18:08:04 +00:00
|
|
|
WASM_SIMD_TEST(I8x16ShuffleFuzz) {
|
2018-07-13 18:24:42 +00:00
|
|
|
v8::base::RandomNumberGenerator* rng = CcTest::random_number_generator();
|
|
|
|
static const int kTests = 100;
|
|
|
|
for (int i = 0; i < kTests; ++i) {
|
|
|
|
auto shuffle = Combine(GetRandomTestShuffle(rng), GetRandomTestShuffle(rng),
|
|
|
|
GetRandomTestShuffle(rng));
|
2020-09-25 18:08:04 +00:00
|
|
|
RunShuffleOpTest(execution_tier, lower_simd, kExprI8x16Shuffle, shuffle);
|
2018-07-13 18:24:42 +00:00
|
|
|
}
|
2017-05-04 16:50:51 +00:00
|
|
|
}
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
|
2018-07-13 18:24:42 +00:00
|
|
|
void AppendShuffle(const Shuffle& shuffle, std::vector<byte>* buffer) {
|
2020-09-25 18:08:04 +00:00
|
|
|
byte opcode[] = {WASM_SIMD_OP(kExprI8x16Shuffle)};
|
2018-07-13 18:24:42 +00:00
|
|
|
for (size_t i = 0; i < arraysize(opcode); ++i) buffer->push_back(opcode[i]);
|
|
|
|
for (size_t i = 0; i < kSimd128Size; ++i) buffer->push_back((shuffle[i]));
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
}
|
|
|
|
|
2019-09-10 01:19:59 +00:00
|
|
|
void BuildShuffle(const std::vector<Shuffle>& shuffles,
|
2019-07-08 08:42:48 +00:00
|
|
|
std::vector<byte>* buffer) {
|
2018-07-13 18:24:42 +00:00
|
|
|
// Perform the leaf shuffles on globals 0 and 1.
|
|
|
|
size_t row_index = (shuffles.size() - 1) / 2;
|
|
|
|
for (size_t i = row_index; i < shuffles.size(); ++i) {
|
2020-12-17 16:56:08 +00:00
|
|
|
byte operands[] = {WASM_GLOBAL_GET(0), WASM_GLOBAL_GET(1)};
|
2018-07-13 18:24:42 +00:00
|
|
|
for (size_t j = 0; j < arraysize(operands); ++j)
|
|
|
|
buffer->push_back(operands[j]);
|
|
|
|
AppendShuffle(shuffles[i], buffer);
|
|
|
|
}
|
|
|
|
// Now perform inner shuffles in the correct order on operands on the stack.
|
|
|
|
do {
|
|
|
|
for (size_t i = row_index / 2; i < row_index; ++i) {
|
|
|
|
AppendShuffle(shuffles[i], buffer);
|
|
|
|
}
|
|
|
|
row_index /= 2;
|
|
|
|
} while (row_index != 0);
|
2019-10-08 13:16:30 +00:00
|
|
|
byte epilog[] = {kExprGlobalSet, static_cast<byte>(0), WASM_ONE};
|
2018-07-13 18:24:42 +00:00
|
|
|
for (size_t j = 0; j < arraysize(epilog); ++j) buffer->push_back(epilog[j]);
|
2017-05-09 21:04:27 +00:00
|
|
|
}
|
|
|
|
|
2020-08-04 11:09:23 +00:00
|
|
|
void RunWasmCode(TestExecutionTier execution_tier, LowerSimd lower_simd,
|
2018-07-13 18:24:42 +00:00
|
|
|
const std::vector<byte>& code,
|
|
|
|
std::array<int8_t, kSimd128Size>* result) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2018-07-13 18:24:42 +00:00
|
|
|
// Set up two test patterns as globals, e.g. [0, 1, 2, 3] and [4, 5, 6, 7].
|
|
|
|
int8_t* src0 = r.builder().AddGlobal<int8_t>(kWasmS128);
|
|
|
|
int8_t* src1 = r.builder().AddGlobal<int8_t>(kWasmS128);
|
|
|
|
for (int i = 0; i < kSimd128Size; ++i) {
|
2018-08-10 11:20:40 +00:00
|
|
|
WriteLittleEndianValue<int8_t>(&src0[i], i);
|
|
|
|
WriteLittleEndianValue<int8_t>(&src1[i], kSimd128Size + i);
|
2018-07-13 18:24:42 +00:00
|
|
|
}
|
|
|
|
r.Build(code.data(), code.data() + code.size());
|
|
|
|
CHECK_EQ(1, r.Call());
|
|
|
|
for (size_t i = 0; i < kSimd128Size; i++) {
|
2018-08-10 11:20:40 +00:00
|
|
|
(*result)[i] = ReadLittleEndianValue<int8_t>(&src0[i]);
|
2018-05-31 16:53:09 +00:00
|
|
|
}
|
|
|
|
}
|
2017-06-13 23:40:51 +00:00
|
|
|
|
2018-07-13 18:24:42 +00:00
|
|
|
// Test multiple shuffles executed in sequence.
|
2020-07-29 19:00:34 +00:00
|
|
|
WASM_SIMD_TEST(S8x16MultiShuffleFuzz) {
|
|
|
|
// Don't compare interpreter results with itself.
|
2020-08-04 11:09:23 +00:00
|
|
|
if (execution_tier == TestExecutionTier::kInterpreter) {
|
2020-07-29 19:00:34 +00:00
|
|
|
return;
|
|
|
|
}
|
2018-07-13 18:24:42 +00:00
|
|
|
v8::base::RandomNumberGenerator* rng = CcTest::random_number_generator();
|
|
|
|
static const int kShuffles = 100;
|
|
|
|
for (int i = 0; i < kShuffles; ++i) {
|
|
|
|
// Create an odd number in [3..23] of random test shuffles so we can build
|
|
|
|
// a complete binary tree (stored as a heap) of shuffle operations. The leaf
|
|
|
|
// shuffles operate on the test pattern inputs, while the interior shuffles
|
|
|
|
// operate on the results of the two child shuffles.
|
|
|
|
int num_shuffles = rng->NextInt(10) * 2 + 3;
|
|
|
|
std::vector<Shuffle> shuffles;
|
|
|
|
for (int j = 0; j < num_shuffles; ++j) {
|
|
|
|
shuffles.push_back(GetRandomTestShuffle(rng));
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
}
|
2018-07-13 18:24:42 +00:00
|
|
|
// Generate the code for the shuffle expression.
|
|
|
|
std::vector<byte> buffer;
|
|
|
|
BuildShuffle(shuffles, &buffer);
|
|
|
|
|
|
|
|
// Run the code using the interpreter to get the expected result.
|
|
|
|
std::array<int8_t, kSimd128Size> expected;
|
2020-08-04 11:09:23 +00:00
|
|
|
RunWasmCode(TestExecutionTier::kInterpreter, kNoLowerSimd, buffer,
|
|
|
|
&expected);
|
2018-07-13 18:24:42 +00:00
|
|
|
// Run the SIMD or scalar lowered compiled code and compare results.
|
|
|
|
std::array<int8_t, kSimd128Size> result;
|
2018-08-21 15:01:31 +00:00
|
|
|
RunWasmCode(execution_tier, lower_simd, buffer, &result);
|
2018-07-13 18:24:42 +00:00
|
|
|
for (size_t i = 0; i < kSimd128Size; ++i) {
|
|
|
|
CHECK_EQ(result[i], expected[i]);
|
[WASM SIMD] Implement primitive shuffles.
- Adds unary Reverse shuffles (swizzles): S32x2Reverse, S16x4Reverse,
S16x2Reverse, S8x8Reverse, S8x4Reverse, S8x2Reverse. Reversals are
done within the sub-vectors that prefix the opcode name, e.g. S8x2
reverses the 8 consecutive pairs in an S8x16 vector.
- Adds binary Zip (interleave) left and right half-shuffles to return a
single vector: S32x4ZipLeft, S32x4ZipRightS16x8ZipLeft, S16x8ZipRight,
S8x16ZipLeft, S8x16ZipRight.
- Adds binary Unzip (de-interleave) left and right half shuffles to return
a single vector: S32x4UnzipLeft, S32x4UnzipRight, S16x8UnzipLeft,
S16x8UnzipRight, S8x16UnzipLeft, S8x16UnzipRight.
- Adds binary Transpose left and right half shuffles to return
a single vector: S32x4TransposeLeft, S32x4TransposeRight,
S16x8TransposeLeft, S16xTransposeRight, S8x16TransposeLeft,
S8x16TransposeRight.
- Adds binary Concat (concatenate) byte shuffle: S8x16Concat #bytes to
paste two vectors together.
LOG=N
BUG=v8:6020
Review-Url: https://codereview.chromium.org/2801183002
Cr-Commit-Position: refs/heads/master@{#44734}
2017-04-19 22:18:06 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2017-05-04 16:50:51 +00:00
|
|
|
|
2017-03-02 19:50:33 +00:00
|
|
|
// Boolean unary operations are 'AllTrue' and 'AnyTrue', which return an integer
|
|
|
|
// result. Use relational ops on numeric vectors to create the boolean vector
|
|
|
|
// test inputs. Test inputs with all true, all false, one true, and one false.
|
2019-08-29 22:07:27 +00:00
|
|
|
#define WASM_SIMD_BOOL_REDUCTION_TEST(format, lanes, int_type) \
|
2018-06-29 19:29:16 +00:00
|
|
|
WASM_SIMD_TEST(ReductionTest##lanes) { \
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd); \
|
2019-08-29 22:07:27 +00:00
|
|
|
if (lanes == 2 && lower_simd == kLowerSimd) return; \
|
2017-03-02 19:50:33 +00:00
|
|
|
byte zero = r.AllocateLocal(kWasmS128); \
|
|
|
|
byte one_one = r.AllocateLocal(kWasmS128); \
|
|
|
|
byte reduced = r.AllocateLocal(kWasmI32); \
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(zero, WASM_SIMD_I##format##_SPLAT(int_type(0))), \
|
|
|
|
WASM_LOCAL_SET( \
|
2021-01-29 22:48:10 +00:00
|
|
|
reduced, WASM_SIMD_UNOP(kExprV128AnyTrue, \
|
2017-03-02 19:50:33 +00:00
|
|
|
WASM_SIMD_BINOP(kExprI##format##Eq, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(zero), \
|
|
|
|
WASM_LOCAL_GET(zero)))), \
|
|
|
|
WASM_IF(WASM_I32_EQ(WASM_LOCAL_GET(reduced), WASM_ZERO), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO)), \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET( \
|
2021-01-29 22:48:10 +00:00
|
|
|
reduced, WASM_SIMD_UNOP(kExprV128AnyTrue, \
|
2017-03-02 19:50:33 +00:00
|
|
|
WASM_SIMD_BINOP(kExprI##format##Ne, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(zero), \
|
|
|
|
WASM_LOCAL_GET(zero)))), \
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_LOCAL_GET(reduced), WASM_ZERO), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO)), \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET( \
|
2021-03-05 23:56:29 +00:00
|
|
|
reduced, WASM_SIMD_UNOP(kExprI##format##AllTrue, \
|
2017-03-02 19:50:33 +00:00
|
|
|
WASM_SIMD_BINOP(kExprI##format##Eq, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(zero), \
|
|
|
|
WASM_LOCAL_GET(zero)))), \
|
|
|
|
WASM_IF(WASM_I32_EQ(WASM_LOCAL_GET(reduced), WASM_ZERO), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO)), \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET( \
|
2021-03-05 23:56:29 +00:00
|
|
|
reduced, WASM_SIMD_UNOP(kExprI##format##AllTrue, \
|
2017-03-02 19:50:33 +00:00
|
|
|
WASM_SIMD_BINOP(kExprI##format##Ne, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(zero), \
|
|
|
|
WASM_LOCAL_GET(zero)))), \
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_LOCAL_GET(reduced), WASM_ZERO), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO)), \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(one_one, \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_SIMD_I##format##_REPLACE_LANE( \
|
2020-12-17 16:55:33 +00:00
|
|
|
lanes - 1, WASM_LOCAL_GET(zero), int_type(1))), \
|
|
|
|
WASM_LOCAL_SET( \
|
2021-01-29 22:48:10 +00:00
|
|
|
reduced, WASM_SIMD_UNOP(kExprV128AnyTrue, \
|
2017-03-02 19:50:33 +00:00
|
|
|
WASM_SIMD_BINOP(kExprI##format##Eq, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(one_one), \
|
|
|
|
WASM_LOCAL_GET(zero)))), \
|
|
|
|
WASM_IF(WASM_I32_EQ(WASM_LOCAL_GET(reduced), WASM_ZERO), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO)), \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET( \
|
2021-01-29 22:48:10 +00:00
|
|
|
reduced, WASM_SIMD_UNOP(kExprV128AnyTrue, \
|
2017-03-02 19:50:33 +00:00
|
|
|
WASM_SIMD_BINOP(kExprI##format##Ne, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(one_one), \
|
|
|
|
WASM_LOCAL_GET(zero)))), \
|
|
|
|
WASM_IF(WASM_I32_EQ(WASM_LOCAL_GET(reduced), WASM_ZERO), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO)), \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET( \
|
2021-03-05 23:56:29 +00:00
|
|
|
reduced, WASM_SIMD_UNOP(kExprI##format##AllTrue, \
|
2017-03-02 19:50:33 +00:00
|
|
|
WASM_SIMD_BINOP(kExprI##format##Eq, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(one_one), \
|
|
|
|
WASM_LOCAL_GET(zero)))), \
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_LOCAL_GET(reduced), WASM_ZERO), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO)), \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET( \
|
2021-03-05 23:56:29 +00:00
|
|
|
reduced, WASM_SIMD_UNOP(kExprI##format##AllTrue, \
|
2017-03-02 19:50:33 +00:00
|
|
|
WASM_SIMD_BINOP(kExprI##format##Ne, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_GET(one_one), \
|
|
|
|
WASM_LOCAL_GET(zero)))), \
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_LOCAL_GET(reduced), WASM_ZERO), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_RETURN1(WASM_ZERO)), \
|
|
|
|
WASM_ONE); \
|
2017-03-02 19:50:33 +00:00
|
|
|
CHECK_EQ(1, r.Call()); \
|
|
|
|
}
|
|
|
|
|
2021-02-01 21:40:17 +00:00
|
|
|
WASM_SIMD_BOOL_REDUCTION_TEST(64x2, 2, WASM_I64V)
|
2019-08-29 22:07:27 +00:00
|
|
|
WASM_SIMD_BOOL_REDUCTION_TEST(32x4, 4, WASM_I32V)
|
|
|
|
WASM_SIMD_BOOL_REDUCTION_TEST(16x8, 8, WASM_I32V)
|
|
|
|
WASM_SIMD_BOOL_REDUCTION_TEST(8x16, 16, WASM_I32V)
|
2017-03-02 19:50:33 +00:00
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdI32x4ExtractWithF32x4) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r, WASM_IF_ELSE_I(
|
|
|
|
WASM_I32_EQ(WASM_SIMD_I32x4_EXTRACT_LANE(
|
|
|
|
0, WASM_SIMD_F32x4_SPLAT(WASM_F32(30.5))),
|
|
|
|
WASM_I32_REINTERPRET_F32(WASM_F32(30.5))),
|
|
|
|
WASM_I32V(1), WASM_I32V(0)));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call());
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdF32x4ExtractWithI32x4) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
|
|
|
WASM_IF_ELSE_I(WASM_F32_EQ(WASM_SIMD_F32x4_EXTRACT_LANE(
|
|
|
|
0, WASM_SIMD_I32x4_SPLAT(WASM_I32V(15))),
|
|
|
|
WASM_F32_REINTERPRET_I32(WASM_I32V(15))),
|
|
|
|
WASM_I32V(1), WASM_I32V(0)));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call());
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2019-07-02 20:43:34 +00:00
|
|
|
WASM_SIMD_TEST(SimdF32x4ExtractLane) {
|
|
|
|
WasmRunner<float> r(execution_tier, lower_simd);
|
|
|
|
r.AllocateLocal(kWasmF32);
|
|
|
|
r.AllocateLocal(kWasmS128);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_SIMD_F32x4_EXTRACT_LANE(
|
2020-05-05 18:04:33 +00:00
|
|
|
0, WASM_SIMD_F32x4_SPLAT(WASM_F32(30.5)))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(0))),
|
|
|
|
WASM_SIMD_F32x4_EXTRACT_LANE(1, WASM_LOCAL_GET(1)));
|
2019-07-02 20:43:34 +00:00
|
|
|
CHECK_EQ(30.5, r.Call());
|
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(SimdF32x4AddWithI32x4) {
|
2017-03-16 14:06:49 +00:00
|
|
|
// Choose two floating point values whose sum is normal and exactly
|
|
|
|
// representable as a float.
|
2017-12-02 00:30:37 +00:00
|
|
|
const int kOne = 0x3F800000;
|
2017-03-16 14:06:49 +00:00
|
|
|
const int kTwo = 0x40000000;
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
|
|
|
WASM_IF_ELSE_I(
|
|
|
|
WASM_F32_EQ(
|
|
|
|
WASM_SIMD_F32x4_EXTRACT_LANE(
|
|
|
|
0, WASM_SIMD_BINOP(kExprF32x4Add,
|
|
|
|
WASM_SIMD_I32x4_SPLAT(WASM_I32V(kOne)),
|
|
|
|
WASM_SIMD_I32x4_SPLAT(WASM_I32V(kTwo)))),
|
|
|
|
WASM_F32_ADD(WASM_F32_REINTERPRET_I32(WASM_I32V(kOne)),
|
|
|
|
WASM_F32_REINTERPRET_I32(WASM_I32V(kTwo)))),
|
|
|
|
WASM_I32V(1), WASM_I32V(0)));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call());
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2018-05-23 22:21:05 +00:00
|
|
|
WASM_SIMD_TEST(SimdI32x4AddWithF32x4) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
|
|
|
WASM_IF_ELSE_I(
|
|
|
|
WASM_I32_EQ(
|
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(
|
|
|
|
0, WASM_SIMD_BINOP(kExprI32x4Add,
|
|
|
|
WASM_SIMD_F32x4_SPLAT(WASM_F32(21.25)),
|
|
|
|
WASM_SIMD_F32x4_SPLAT(WASM_F32(31.5)))),
|
|
|
|
WASM_I32_ADD(WASM_I32_REINTERPRET_F32(WASM_F32(21.25)),
|
|
|
|
WASM_I32_REINTERPRET_F32(WASM_F32(31.5)))),
|
|
|
|
WASM_I32V(1), WASM_I32V(0)));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call());
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdI32x4Local) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2017-02-27 23:45:03 +00:00
|
|
|
r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(0, WASM_SIMD_I32x4_SPLAT(WASM_I32V(31))),
|
2017-02-27 23:45:03 +00:00
|
|
|
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(0, WASM_LOCAL_GET(0)));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(31, r.Call());
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdI32x4SplatFromExtract) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2017-02-27 23:45:03 +00:00
|
|
|
r.AllocateLocal(kWasmI32);
|
|
|
|
r.AllocateLocal(kWasmS128);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_SIMD_I32x4_EXTRACT_LANE(
|
2020-05-05 18:04:33 +00:00
|
|
|
0, WASM_SIMD_I32x4_SPLAT(WASM_I32V(76)))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_SIMD_I32x4_SPLAT(WASM_LOCAL_GET(0))),
|
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(1, WASM_LOCAL_GET(1)));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(76, r.Call());
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdI32x4For) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2017-02-27 23:45:03 +00:00
|
|
|
r.AllocateLocal(kWasmI32);
|
|
|
|
r.AllocateLocal(kWasmS128);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
|
|
|
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_SIMD_I32x4_SPLAT(WASM_I32V(31))),
|
|
|
|
WASM_LOCAL_SET(1, WASM_SIMD_I32x4_REPLACE_LANE(1, WASM_LOCAL_GET(1),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_I32V(53))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_SIMD_I32x4_REPLACE_LANE(2, WASM_LOCAL_GET(1),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_I32V(23))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(0)),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_LOOP(
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(
|
|
|
|
1, WASM_SIMD_BINOP(kExprI32x4Add, WASM_LOCAL_GET(1),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_SIMD_I32x4_SPLAT(WASM_I32V(1)))),
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_INC_LOCAL(0), WASM_I32V(5)), WASM_BR(1))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(1)),
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_SIMD_I32x4_EXTRACT_LANE(0, WASM_LOCAL_GET(1)),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_I32V(36)),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(0))),
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_SIMD_I32x4_EXTRACT_LANE(1, WASM_LOCAL_GET(1)),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_I32V(58)),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(0))),
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_SIMD_I32x4_EXTRACT_LANE(2, WASM_LOCAL_GET(1)),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_I32V(28)),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(0))),
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_SIMD_I32x4_EXTRACT_LANE(3, WASM_LOCAL_GET(1)),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_I32V(36)),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_GET(0));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call());
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdF32x4For) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2017-02-27 23:45:03 +00:00
|
|
|
r.AllocateLocal(kWasmI32);
|
|
|
|
r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(1, WASM_SIMD_F32x4_SPLAT(WASM_F32(21.25))),
|
|
|
|
WASM_LOCAL_SET(1, WASM_SIMD_F32x4_REPLACE_LANE(3, WASM_LOCAL_GET(1),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_F32(19.5))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(0)),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_LOOP(
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(
|
|
|
|
1, WASM_SIMD_BINOP(kExprF32x4Add, WASM_LOCAL_GET(1),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_SIMD_F32x4_SPLAT(WASM_F32(2.0)))),
|
|
|
|
WASM_IF(WASM_I32_NE(WASM_INC_LOCAL(0), WASM_I32V(3)), WASM_BR(1))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(1)),
|
|
|
|
WASM_IF(WASM_F32_NE(WASM_SIMD_F32x4_EXTRACT_LANE(0, WASM_LOCAL_GET(1)),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_F32(27.25)),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(0))),
|
|
|
|
WASM_IF(WASM_F32_NE(WASM_SIMD_F32x4_EXTRACT_LANE(3, WASM_LOCAL_GET(1)),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_F32(25.5)),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(0, WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_GET(0));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call());
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2017-05-09 19:54:19 +00:00
|
|
|
template <typename T, int numLanes = 4>
|
|
|
|
void SetVectorByLanes(T* v, const std::array<T, numLanes>& arr) {
|
|
|
|
for (int lane = 0; lane < numLanes; lane++) {
|
2018-08-10 11:20:40 +00:00
|
|
|
WriteLittleEndianValue<T>(&v[lane], arr[lane]);
|
2017-05-09 19:54:19 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
template <typename T>
|
2018-08-10 11:20:40 +00:00
|
|
|
const T GetScalar(T* v, int lane) {
|
2017-05-09 19:54:19 +00:00
|
|
|
constexpr int kElems = kSimd128Size / sizeof(T);
|
|
|
|
const int index = lane;
|
|
|
|
USE(kElems);
|
|
|
|
DCHECK(index >= 0 && index < kElems);
|
2018-08-10 11:20:40 +00:00
|
|
|
return ReadLittleEndianValue<T>(&v[index]);
|
2017-05-09 19:54:19 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdI32x4GetGlobal) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
2017-10-16 08:49:45 +00:00
|
|
|
// Pad the globals with a few unused slots to get a non-zero offset.
|
|
|
|
r.builder().AddGlobal<int32_t>(kWasmI32); // purposefully unused
|
|
|
|
r.builder().AddGlobal<int32_t>(kWasmI32); // purposefully unused
|
|
|
|
r.builder().AddGlobal<int32_t>(kWasmI32); // purposefully unused
|
|
|
|
r.builder().AddGlobal<int32_t>(kWasmI32); // purposefully unused
|
2017-08-19 16:34:11 +00:00
|
|
|
int32_t* global = r.builder().AddGlobal<int32_t>(kWasmS128);
|
2017-05-09 19:54:19 +00:00
|
|
|
SetVectorByLanes(global, {{0, 1, 2, 3}});
|
2017-02-27 23:45:03 +00:00
|
|
|
r.AllocateLocal(kWasmI32);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(
|
2020-12-17 16:55:33 +00:00
|
|
|
r, WASM_LOCAL_SET(1, WASM_I32V(1)),
|
2017-02-27 23:45:03 +00:00
|
|
|
WASM_IF(WASM_I32_NE(WASM_I32V(0),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(0, WASM_GLOBAL_GET(4))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_I32V(0))),
|
2017-02-27 23:45:03 +00:00
|
|
|
WASM_IF(WASM_I32_NE(WASM_I32V(1),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(1, WASM_GLOBAL_GET(4))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_I32V(0))),
|
2017-02-27 23:45:03 +00:00
|
|
|
WASM_IF(WASM_I32_NE(WASM_I32V(2),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(2, WASM_GLOBAL_GET(4))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_I32V(0))),
|
2017-02-27 23:45:03 +00:00
|
|
|
WASM_IF(WASM_I32_NE(WASM_I32V(3),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(3, WASM_GLOBAL_GET(4))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_GET(1));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call(0));
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdI32x4SetGlobal) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
2017-10-16 08:49:45 +00:00
|
|
|
// Pad the globals with a few unused slots to get a non-zero offset.
|
|
|
|
r.builder().AddGlobal<int32_t>(kWasmI32); // purposefully unused
|
|
|
|
r.builder().AddGlobal<int32_t>(kWasmI32); // purposefully unused
|
|
|
|
r.builder().AddGlobal<int32_t>(kWasmI32); // purposefully unused
|
|
|
|
r.builder().AddGlobal<int32_t>(kWasmI32); // purposefully unused
|
2017-08-19 16:34:11 +00:00
|
|
|
int32_t* global = r.builder().AddGlobal<int32_t>(kWasmS128);
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(4, WASM_SIMD_I32x4_SPLAT(WASM_I32V(23))),
|
|
|
|
WASM_GLOBAL_SET(4, WASM_SIMD_I32x4_REPLACE_LANE(1, WASM_GLOBAL_GET(4),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_I32V(34))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(4, WASM_SIMD_I32x4_REPLACE_LANE(2, WASM_GLOBAL_GET(4),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_I32V(45))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(4, WASM_SIMD_I32x4_REPLACE_LANE(3, WASM_GLOBAL_GET(4),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_I32V(56))),
|
|
|
|
WASM_I32V(1));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call(0));
|
2017-05-09 19:54:19 +00:00
|
|
|
CHECK_EQ(GetScalar(global, 0), 23);
|
|
|
|
CHECK_EQ(GetScalar(global, 1), 34);
|
|
|
|
CHECK_EQ(GetScalar(global, 2), 45);
|
|
|
|
CHECK_EQ(GetScalar(global, 3), 56);
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdF32x4GetGlobal) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
2017-08-19 16:34:11 +00:00
|
|
|
float* global = r.builder().AddGlobal<float>(kWasmS128);
|
2017-05-09 19:54:19 +00:00
|
|
|
SetVectorByLanes<float>(global, {{0.0, 1.5, 2.25, 3.5}});
|
2017-02-27 23:45:03 +00:00
|
|
|
r.AllocateLocal(kWasmI32);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(
|
2020-12-17 16:55:33 +00:00
|
|
|
r, WASM_LOCAL_SET(1, WASM_I32V(1)),
|
2017-02-27 23:45:03 +00:00
|
|
|
WASM_IF(WASM_F32_NE(WASM_F32(0.0),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_SIMD_F32x4_EXTRACT_LANE(0, WASM_GLOBAL_GET(0))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_I32V(0))),
|
2017-02-27 23:45:03 +00:00
|
|
|
WASM_IF(WASM_F32_NE(WASM_F32(1.5),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_SIMD_F32x4_EXTRACT_LANE(1, WASM_GLOBAL_GET(0))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_I32V(0))),
|
2017-02-27 23:45:03 +00:00
|
|
|
WASM_IF(WASM_F32_NE(WASM_F32(2.25),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_SIMD_F32x4_EXTRACT_LANE(2, WASM_GLOBAL_GET(0))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_I32V(0))),
|
2017-02-27 23:45:03 +00:00
|
|
|
WASM_IF(WASM_F32_NE(WASM_F32(3.5),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_SIMD_F32x4_EXTRACT_LANE(3, WASM_GLOBAL_GET(0))),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(1, WASM_I32V(0))),
|
|
|
|
WASM_LOCAL_GET(1));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call(0));
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
|
|
|
|
2018-05-31 21:38:23 +00:00
|
|
|
WASM_SIMD_TEST(SimdF32x4SetGlobal) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
2017-08-19 16:34:11 +00:00
|
|
|
float* global = r.builder().AddGlobal<float>(kWasmS128);
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_F32x4_SPLAT(WASM_F32(13.5))),
|
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_F32x4_REPLACE_LANE(1, WASM_GLOBAL_GET(0),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_F32(45.5))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_F32x4_REPLACE_LANE(2, WASM_GLOBAL_GET(0),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_F32(32.25))),
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_F32x4_REPLACE_LANE(3, WASM_GLOBAL_GET(0),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_F32(65.0))),
|
|
|
|
WASM_I32V(1));
|
2017-03-16 14:06:49 +00:00
|
|
|
CHECK_EQ(1, r.Call(0));
|
2017-05-09 19:54:19 +00:00
|
|
|
CHECK_EQ(GetScalar(global, 0), 13.5f);
|
|
|
|
CHECK_EQ(GetScalar(global, 1), 45.5f);
|
|
|
|
CHECK_EQ(GetScalar(global, 2), 32.25f);
|
|
|
|
CHECK_EQ(GetScalar(global, 3), 65.0f);
|
2017-02-27 23:45:03 +00:00
|
|
|
}
|
2017-03-15 23:34:53 +00:00
|
|
|
|
2019-08-26 16:50:16 +00:00
|
|
|
WASM_SIMD_TEST(SimdLoadStoreLoad) {
|
2018-08-21 15:01:31 +00:00
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
2018-04-27 20:00:12 +00:00
|
|
|
int32_t* memory =
|
|
|
|
r.builder().AddMemoryElems<int32_t>(kWasmPageSize / sizeof(int32_t));
|
2017-10-13 20:55:17 +00:00
|
|
|
// Load memory, store it, then reload it and extract the first lane. Use a
|
|
|
|
// non-zero offset into the memory of 1 lane (4 bytes) to test indexing.
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r, WASM_SIMD_STORE_MEM(WASM_I32V(8), WASM_SIMD_LOAD_MEM(WASM_I32V(4))),
|
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(0, WASM_SIMD_LOAD_MEM(WASM_I32V(8))));
|
2017-03-15 23:34:53 +00:00
|
|
|
|
|
|
|
FOR_INT32_INPUTS(i) {
|
2019-02-01 10:37:04 +00:00
|
|
|
int32_t expected = i;
|
2017-10-13 20:55:17 +00:00
|
|
|
r.builder().WriteMemory(&memory[1], expected);
|
2017-03-15 23:34:53 +00:00
|
|
|
CHECK_EQ(expected, r.Call());
|
|
|
|
}
|
2020-11-18 03:49:34 +00:00
|
|
|
|
|
|
|
{
|
|
|
|
// OOB tests for loads.
|
|
|
|
WasmRunner<int32_t, uint32_t> r(execution_tier, lower_simd);
|
|
|
|
r.builder().AddMemoryElems<int32_t>(kWasmPageSize / sizeof(int32_t));
|
|
|
|
BUILD(r, WASM_SIMD_I32x4_EXTRACT_LANE(
|
2020-12-17 16:55:33 +00:00
|
|
|
0, WASM_SIMD_LOAD_MEM(WASM_LOCAL_GET(0))));
|
2020-11-18 03:49:34 +00:00
|
|
|
|
|
|
|
for (uint32_t offset = kWasmPageSize - (kSimd128Size - 1);
|
|
|
|
offset < kWasmPageSize; ++offset) {
|
|
|
|
CHECK_TRAP(r.Call(offset));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
{
|
|
|
|
// OOB tests for stores.
|
|
|
|
WasmRunner<int32_t, uint32_t> r(execution_tier, lower_simd);
|
|
|
|
r.builder().AddMemoryElems<int32_t>(kWasmPageSize / sizeof(int32_t));
|
|
|
|
BUILD(r,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_SIMD_STORE_MEM(WASM_LOCAL_GET(0), WASM_SIMD_LOAD_MEM(WASM_ZERO)),
|
2020-11-18 03:49:34 +00:00
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
for (uint32_t offset = kWasmPageSize - (kSimd128Size - 1);
|
|
|
|
offset < kWasmPageSize; ++offset) {
|
|
|
|
CHECK_TRAP(r.Call(offset));
|
|
|
|
}
|
|
|
|
}
|
2017-03-15 23:34:53 +00:00
|
|
|
}
|
2017-09-01 12:57:34 +00:00
|
|
|
|
2019-09-19 22:01:07 +00:00
|
|
|
WASM_SIMD_TEST(SimdLoadStoreLoadMemargOffset) {
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
int32_t* memory =
|
|
|
|
r.builder().AddMemoryElems<int32_t>(kWasmPageSize / sizeof(int32_t));
|
|
|
|
constexpr byte offset_1 = 4;
|
|
|
|
constexpr byte offset_2 = 8;
|
|
|
|
// Load from memory at offset_1, store to offset_2, load from offset_2, and
|
|
|
|
// extract first lane. We use non-zero memarg offsets to test offset decoding.
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(
|
2019-09-19 22:01:07 +00:00
|
|
|
r,
|
|
|
|
WASM_SIMD_STORE_MEM_OFFSET(
|
|
|
|
offset_2, WASM_ZERO, WASM_SIMD_LOAD_MEM_OFFSET(offset_1, WASM_ZERO)),
|
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(
|
|
|
|
0, WASM_SIMD_LOAD_MEM_OFFSET(offset_2, WASM_ZERO)));
|
|
|
|
|
|
|
|
FOR_INT32_INPUTS(i) {
|
|
|
|
int32_t expected = i;
|
|
|
|
// Index 1 of memory (int32_t) will be bytes 4 to 8.
|
|
|
|
r.builder().WriteMemory(&memory[1], expected);
|
|
|
|
CHECK_EQ(expected, r.Call());
|
|
|
|
}
|
2020-11-18 03:49:34 +00:00
|
|
|
|
|
|
|
{
|
|
|
|
// OOB tests for loads with offsets.
|
|
|
|
for (uint32_t offset = kWasmPageSize - (kSimd128Size - 1);
|
|
|
|
offset < kWasmPageSize; ++offset) {
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
r.builder().AddMemoryElems<int32_t>(kWasmPageSize / sizeof(int32_t));
|
|
|
|
BUILD(r, WASM_SIMD_I32x4_EXTRACT_LANE(
|
|
|
|
0, WASM_SIMD_LOAD_MEM_OFFSET(U32V_3(offset), WASM_ZERO)));
|
|
|
|
CHECK_TRAP(r.Call());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
{
|
|
|
|
// OOB tests for stores with offsets
|
|
|
|
for (uint32_t offset = kWasmPageSize - (kSimd128Size - 1);
|
|
|
|
offset < kWasmPageSize; ++offset) {
|
|
|
|
WasmRunner<int32_t, uint32_t> r(execution_tier, lower_simd);
|
|
|
|
r.builder().AddMemoryElems<int32_t>(kWasmPageSize / sizeof(int32_t));
|
|
|
|
BUILD(r,
|
|
|
|
WASM_SIMD_STORE_MEM_OFFSET(U32V_3(offset), WASM_ZERO,
|
|
|
|
WASM_SIMD_LOAD_MEM(WASM_ZERO)),
|
|
|
|
WASM_ONE);
|
|
|
|
CHECK_TRAP(r.Call(offset));
|
|
|
|
}
|
|
|
|
}
|
2019-09-19 22:01:07 +00:00
|
|
|
}
|
|
|
|
|
2020-04-20 18:26:34 +00:00
|
|
|
// Test a multi-byte opcode with offset values that encode into valid opcodes.
|
|
|
|
// This is to exercise decoding logic and make sure we get the lengths right.
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load8SplatOffset) {
|
2020-04-20 18:26:34 +00:00
|
|
|
// This offset is [82, 22] when encoded, which contains valid opcodes.
|
|
|
|
constexpr int offset = 4354;
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
int8_t* memory = r.builder().AddMemoryElems<int8_t>(kWasmPageSize);
|
|
|
|
int8_t* global = r.builder().AddGlobal<int8_t>(kWasmS128);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(
|
2020-09-22 20:54:28 +00:00
|
|
|
0, WASM_SIMD_LOAD_OP_OFFSET(kExprS128Load8Splat, WASM_I32V(0),
|
2020-07-17 17:48:28 +00:00
|
|
|
U32V_2(offset))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
2020-04-20 18:26:34 +00:00
|
|
|
|
|
|
|
// We don't really care about all valid values, so just test for 1.
|
|
|
|
int8_t x = 7;
|
|
|
|
r.builder().WriteMemory(&memory[offset], x);
|
|
|
|
r.Call();
|
|
|
|
for (int i = 0; i < 16; i++) {
|
|
|
|
CHECK_EQ(x, ReadLittleEndianValue<int8_t>(&global[i]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
template <typename T>
|
2020-08-04 11:09:23 +00:00
|
|
|
void RunLoadSplatTest(TestExecutionTier execution_tier, LowerSimd lower_simd,
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
WasmOpcode op) {
|
|
|
|
constexpr int lanes = 16 / sizeof(T);
|
|
|
|
constexpr int mem_index = 16; // Load from mem index 16 (bytes).
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
T* memory = r.builder().AddMemoryElems<T>(kWasmPageSize / sizeof(T));
|
|
|
|
T* global = r.builder().AddGlobal<T>(kWasmS128);
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_LOAD_OP(op, WASM_I32V(mem_index))),
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_ONE);
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
|
|
|
|
for (T x : compiler::ValueHelper::GetVector<T>()) {
|
|
|
|
// 16-th byte in memory is lanes-th element (size T) of memory.
|
|
|
|
r.builder().WriteMemory(&memory[lanes], x);
|
|
|
|
r.Call();
|
|
|
|
for (int i = 0; i < lanes; i++) {
|
|
|
|
CHECK_EQ(x, ReadLittleEndianValue<T>(&global[i]));
|
|
|
|
}
|
|
|
|
}
|
2020-08-18 22:06:22 +00:00
|
|
|
|
|
|
|
// Test for OOB.
|
|
|
|
{
|
|
|
|
WasmRunner<int32_t, uint32_t> r(execution_tier, lower_simd);
|
|
|
|
r.builder().AddMemoryElems<T>(kWasmPageSize / sizeof(T));
|
|
|
|
r.builder().AddGlobal<T>(kWasmS128);
|
|
|
|
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_LOAD_OP(op, WASM_LOCAL_GET(0))),
|
2020-08-18 22:06:22 +00:00
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
// Load splats load sizeof(T) bytes.
|
|
|
|
for (uint32_t offset = kWasmPageSize - (sizeof(T) - 1);
|
|
|
|
offset < kWasmPageSize; ++offset) {
|
|
|
|
CHECK_TRAP(r.Call(offset));
|
|
|
|
}
|
|
|
|
}
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
}
|
|
|
|
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load8Splat) {
|
|
|
|
RunLoadSplatTest<int8_t>(execution_tier, lower_simd, kExprS128Load8Splat);
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
}
|
|
|
|
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load16Splat) {
|
|
|
|
RunLoadSplatTest<int16_t>(execution_tier, lower_simd, kExprS128Load16Splat);
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
}
|
|
|
|
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load32Splat) {
|
|
|
|
RunLoadSplatTest<int32_t>(execution_tier, lower_simd, kExprS128Load32Splat);
|
2019-11-07 18:39:30 +00:00
|
|
|
}
|
|
|
|
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(S128Load64Splat) {
|
2020-09-22 20:54:28 +00:00
|
|
|
RunLoadSplatTest<int64_t>(execution_tier, lower_simd, kExprS128Load64Splat);
|
2019-11-07 18:39:30 +00:00
|
|
|
}
|
|
|
|
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
template <typename S, typename T>
|
2020-08-04 11:09:23 +00:00
|
|
|
void RunLoadExtendTest(TestExecutionTier execution_tier, LowerSimd lower_simd,
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
WasmOpcode op) {
|
2020-05-18 22:40:02 +00:00
|
|
|
static_assert(sizeof(S) < sizeof(T),
|
|
|
|
"load extend should go from smaller to larger type");
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
constexpr int lanes_s = 16 / sizeof(S);
|
|
|
|
constexpr int lanes_t = 16 / sizeof(T);
|
|
|
|
constexpr int mem_index = 16; // Load from mem index 16 (bytes).
|
2020-05-14 21:54:43 +00:00
|
|
|
// Load extends always load 64 bits, so alignment values can be from 0 to 3.
|
|
|
|
for (byte alignment = 0; alignment <= 3; alignment++) {
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
S* memory = r.builder().AddMemoryElems<S>(kWasmPageSize / sizeof(S));
|
|
|
|
T* global = r.builder().AddGlobal<T>(kWasmS128);
|
|
|
|
BUILD(r,
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_LOAD_OP_ALIGNMENT(
|
2020-05-14 21:54:43 +00:00
|
|
|
op, WASM_I32V(mem_index), alignment)),
|
|
|
|
WASM_ONE);
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
|
2020-05-14 21:54:43 +00:00
|
|
|
for (S x : compiler::ValueHelper::GetVector<S>()) {
|
|
|
|
for (int i = 0; i < lanes_s; i++) {
|
|
|
|
// 16-th byte in memory is lanes-th element (size T) of memory.
|
|
|
|
r.builder().WriteMemory(&memory[lanes_s + i], x);
|
|
|
|
}
|
|
|
|
r.Call();
|
|
|
|
for (int i = 0; i < lanes_t; i++) {
|
|
|
|
CHECK_EQ(static_cast<T>(x), ReadLittleEndianValue<T>(&global[i]));
|
|
|
|
}
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
}
|
|
|
|
}
|
2020-05-18 22:40:02 +00:00
|
|
|
|
|
|
|
// Test for offset.
|
|
|
|
{
|
|
|
|
WasmRunner<int32_t> r(execution_tier, lower_simd);
|
|
|
|
S* memory = r.builder().AddMemoryElems<S>(kWasmPageSize / sizeof(S));
|
|
|
|
T* global = r.builder().AddGlobal<T>(kWasmS128);
|
|
|
|
constexpr byte offset = sizeof(S);
|
2020-07-17 17:48:28 +00:00
|
|
|
BUILD(r,
|
2020-12-17 16:56:08 +00:00
|
|
|
WASM_GLOBAL_SET(0, WASM_SIMD_LOAD_OP_OFFSET(op, WASM_ZERO, offset)),
|
2020-07-17 17:48:28 +00:00
|
|
|
WASM_ONE);
|
2020-05-18 22:40:02 +00:00
|
|
|
|
|
|
|
// Let max_s be the max_s value for type S, we set up the memory as such:
|
|
|
|
// memory = [max_s, max_s - 1, ... max_s - (lane_s - 1)].
|
|
|
|
constexpr S max_s = std::numeric_limits<S>::max();
|
|
|
|
for (int i = 0; i < lanes_s; i++) {
|
|
|
|
// Integer promotion due to -, static_cast to narrow.
|
|
|
|
r.builder().WriteMemory(&memory[i], static_cast<S>(max_s - i));
|
|
|
|
}
|
|
|
|
|
|
|
|
r.Call();
|
|
|
|
|
|
|
|
// Loads will be offset by sizeof(S), so will always start from (max_s - 1).
|
|
|
|
for (int i = 0; i < lanes_t; i++) {
|
|
|
|
// Integer promotion due to -, static_cast to narrow.
|
|
|
|
T expected = static_cast<T>(max_s - i - 1);
|
|
|
|
CHECK_EQ(expected, ReadLittleEndianValue<T>(&global[i]));
|
|
|
|
}
|
|
|
|
}
|
2020-08-18 22:06:22 +00:00
|
|
|
|
|
|
|
// Test for OOB.
|
|
|
|
{
|
|
|
|
WasmRunner<int32_t, uint32_t> r(execution_tier, lower_simd);
|
|
|
|
r.builder().AddMemoryElems<S>(kWasmPageSize / sizeof(S));
|
|
|
|
r.builder().AddGlobal<T>(kWasmS128);
|
|
|
|
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_LOAD_OP(op, WASM_LOCAL_GET(0))),
|
2020-08-18 22:06:22 +00:00
|
|
|
WASM_ONE);
|
|
|
|
|
|
|
|
// Load extends load 8 bytes, so should trap from -7.
|
|
|
|
for (uint32_t offset = kWasmPageSize - 7; offset < kWasmPageSize;
|
|
|
|
++offset) {
|
|
|
|
CHECK_TRAP(r.Call(offset));
|
|
|
|
}
|
|
|
|
}
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
}
|
|
|
|
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load8x8U) {
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
RunLoadExtendTest<uint8_t, uint16_t>(execution_tier, lower_simd,
|
2020-09-22 20:54:28 +00:00
|
|
|
kExprS128Load8x8U);
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
}
|
|
|
|
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load8x8S) {
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
RunLoadExtendTest<int8_t, int16_t>(execution_tier, lower_simd,
|
2020-09-22 20:54:28 +00:00
|
|
|
kExprS128Load8x8S);
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
}
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load16x4U) {
|
2019-11-15 18:41:44 +00:00
|
|
|
RunLoadExtendTest<uint16_t, uint32_t>(execution_tier, lower_simd,
|
2020-09-22 20:54:28 +00:00
|
|
|
kExprS128Load16x4U);
|
2019-11-15 18:41:44 +00:00
|
|
|
}
|
|
|
|
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load16x4S) {
|
2019-11-15 18:41:44 +00:00
|
|
|
RunLoadExtendTest<int16_t, int32_t>(execution_tier, lower_simd,
|
2020-09-22 20:54:28 +00:00
|
|
|
kExprS128Load16x4S);
|
2019-11-15 18:41:44 +00:00
|
|
|
}
|
|
|
|
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load32x2U) {
|
2019-11-15 18:41:44 +00:00
|
|
|
RunLoadExtendTest<uint32_t, uint64_t>(execution_tier, lower_simd,
|
2020-09-22 20:54:28 +00:00
|
|
|
kExprS128Load32x2U);
|
2019-11-15 18:41:44 +00:00
|
|
|
}
|
|
|
|
|
2020-09-22 20:54:28 +00:00
|
|
|
WASM_SIMD_TEST(S128Load32x2S) {
|
2019-11-15 18:41:44 +00:00
|
|
|
RunLoadExtendTest<int32_t, int64_t>(execution_tier, lower_simd,
|
2020-09-22 20:54:28 +00:00
|
|
|
kExprS128Load32x2S);
|
2019-11-15 18:41:44 +00:00
|
|
|
}
|
[wasm-simd] Implement load_splat and load_extend
Introduce new operator LoadTransform that holds a LoadTransformInfo param,
which describes the kind of load (normal, unaligned, protected), and a
transformation (splat or extend, signed or unsigned).
We have a new method that a full decoder needs to implement, LoadTransform,
which resuses the existing LoadType we have, but also takes a LoadTransform,
to distinguish between splats and extends at the decoder level.
This implements 4 out of the 10 suggested load splat/extend operations
(to keep the cl smaller), and is also missing interpreter support (will
be added in the future).
Change-Id: I1e65c693bfbe30e2a511c81b5a32e06aacbddc19
Bug: v8:9886
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1863863
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64819}
2019-11-05 17:22:19 +00:00
|
|
|
|
2020-07-17 17:47:13 +00:00
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template <typename S>
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2020-08-04 11:09:23 +00:00
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void RunLoadZeroTest(TestExecutionTier execution_tier, LowerSimd lower_simd,
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2020-07-17 17:47:13 +00:00
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WasmOpcode op) {
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constexpr int lanes_s = kSimd128Size / sizeof(S);
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constexpr int mem_index = 16; // Load from mem index 16 (bytes).
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2020-10-26 00:22:39 +00:00
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constexpr S sentinel = S{-1};
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S* memory;
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S* global;
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auto initialize_builder = [=](WasmRunner<int32_t>* r) -> std::tuple<S*, S*> {
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S* memory = r->builder().AddMemoryElems<S>(kWasmPageSize / sizeof(S));
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S* global = r->builder().AddGlobal<S>(kWasmS128);
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r->builder().RandomizeMemory();
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r->builder().WriteMemory(&memory[lanes_s], sentinel);
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return std::make_tuple(memory, global);
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};
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// Check all supported alignments.
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constexpr int max_alignment = base::bits::CountTrailingZeros(sizeof(S));
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for (byte alignment = 0; alignment <= max_alignment; alignment++) {
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WasmRunner<int32_t> r(execution_tier, lower_simd);
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std::tie(memory, global) = initialize_builder(&r);
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2020-10-21 17:28:04 +00:00
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2020-12-17 16:56:08 +00:00
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BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_LOAD_OP(op, WASM_I32V(mem_index))),
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2020-10-26 00:22:39 +00:00
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WASM_ONE);
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r.Call();
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// Only first lane is set to sentinel.
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CHECK_EQ(sentinel, ReadLittleEndianValue<S>(&global[0]));
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// The other lanes are zero.
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for (int i = 1; i < lanes_s; i++) {
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CHECK_EQ(S{0}, ReadLittleEndianValue<S>(&global[i]));
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}
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}
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2020-10-22 01:08:17 +00:00
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2020-10-26 00:22:39 +00:00
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{
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// Use memarg to specific offset.
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WasmRunner<int32_t> r(execution_tier, lower_simd);
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std::tie(memory, global) = initialize_builder(&r);
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BUILD(
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r,
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2020-12-17 16:56:08 +00:00
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WASM_GLOBAL_SET(0, WASM_SIMD_LOAD_OP_OFFSET(op, WASM_ZERO, mem_index)),
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2020-10-26 00:22:39 +00:00
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WASM_ONE);
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r.Call();
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// Only first lane is set to sentinel.
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CHECK_EQ(sentinel, ReadLittleEndianValue<S>(&global[0]));
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// The other lanes are zero.
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for (int i = 1; i < lanes_s; i++) {
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CHECK_EQ(S{0}, ReadLittleEndianValue<S>(&global[i]));
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}
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2020-07-17 17:47:13 +00:00
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}
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2020-10-20 17:31:38 +00:00
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// Test for OOB.
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{
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WasmRunner<int32_t, uint32_t> r(execution_tier, lower_simd);
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r.builder().AddMemoryElems<S>(kWasmPageSize / sizeof(S));
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r.builder().AddGlobal<S>(kWasmS128);
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2020-12-17 16:56:08 +00:00
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BUILD(r, WASM_GLOBAL_SET(0, WASM_SIMD_LOAD_OP(op, WASM_LOCAL_GET(0))),
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2020-10-20 17:31:38 +00:00
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WASM_ONE);
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// Load extends load sizeof(S) bytes.
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for (uint32_t offset = kWasmPageSize - (sizeof(S) - 1);
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offset < kWasmPageSize; ++offset) {
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CHECK_TRAP(r.Call(offset));
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}
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}
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2020-07-17 17:47:13 +00:00
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}
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2020-11-10 02:00:52 +00:00
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WASM_SIMD_TEST(S128Load32Zero) {
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2020-10-16 21:33:38 +00:00
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RunLoadZeroTest<int32_t>(execution_tier, lower_simd, kExprS128Load32Zero);
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2020-07-17 17:47:13 +00:00
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}
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2020-11-10 02:00:52 +00:00
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WASM_SIMD_TEST(S128Load64Zero) {
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2020-10-16 21:33:38 +00:00
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RunLoadZeroTest<int64_t>(execution_tier, lower_simd, kExprS128Load64Zero);
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2020-07-17 17:47:13 +00:00
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}
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2020-10-12 17:09:03 +00:00
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template <typename T>
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void RunLoadLaneTest(TestExecutionTier execution_tier, LowerSimd lower_simd,
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WasmOpcode load_op, WasmOpcode splat_op) {
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WasmOpcode const_op =
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splat_op == kExprI64x2Splat ? kExprI64Const : kExprI32Const;
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constexpr int lanes_s = kSimd128Size / sizeof(T);
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constexpr int mem_index = 16; // Load from mem index 16 (bytes).
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constexpr int splat_value = 33;
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2020-10-28 03:49:59 +00:00
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T sentinel = T{-1};
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2020-10-12 17:09:03 +00:00
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2020-10-28 03:49:59 +00:00
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T* memory;
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T* global;
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2020-10-12 17:09:03 +00:00
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2020-10-28 03:49:59 +00:00
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auto build_fn = [=, &memory, &global](WasmRunner<int32_t>& r, int mem_index,
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int lane, int alignment, int offset) {
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memory = r.builder().AddMemoryElems<T>(kWasmPageSize / sizeof(T));
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global = r.builder().AddGlobal<T>(kWasmS128);
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r.builder().WriteMemory(&memory[lanes_s], sentinel);
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2020-10-12 17:09:03 +00:00
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// Splat splat_value, then only load and replace a single lane with the
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// sentinel value.
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BUILD(r, WASM_I32V(mem_index), const_op, splat_value,
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2020-10-28 03:49:59 +00:00
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WASM_SIMD_OP(splat_op), WASM_SIMD_OP(load_op), alignment, offset,
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lane, kExprGlobalSet, 0, WASM_ONE);
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};
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2020-10-12 17:09:03 +00:00
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2020-10-28 03:49:59 +00:00
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auto check_results = [=](T* global, int sentinel_lane = 0) {
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2020-10-12 17:09:03 +00:00
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// Only one lane is loaded, the rest of the lanes are unchanged.
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for (int i = 0; i < lanes_s; i++) {
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2020-10-28 03:49:59 +00:00
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T expected = i == sentinel_lane ? sentinel : static_cast<T>(splat_value);
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CHECK_EQ(expected, ReadLittleEndianValue<T>(&global[i]));
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2020-10-12 17:09:03 +00:00
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}
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2020-10-28 03:49:59 +00:00
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};
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for (int lane_index = 0; lane_index < lanes_s; ++lane_index) {
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WasmRunner<int32_t> r(execution_tier, lower_simd);
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build_fn(r, mem_index, lane_index, /*alignment=*/0, /*offset=*/0);
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r.Call();
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check_results(global, lane_index);
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}
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// Check all possible alignments.
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constexpr int max_alignment = base::bits::CountTrailingZeros(sizeof(T));
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for (byte alignment = 0; alignment <= max_alignment; ++alignment) {
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WasmRunner<int32_t> r(execution_tier, lower_simd);
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build_fn(r, mem_index, /*lane=*/0, alignment, /*offset=*/0);
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r.Call();
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check_results(global);
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}
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{
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// Use memarg to specify offset.
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int lane_index = 0;
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WasmRunner<int32_t> r(execution_tier, lower_simd);
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build_fn(r, /*mem_index=*/0, /*lane=*/0, /*alignment=*/0,
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/*offset=*/mem_index);
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r.Call();
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check_results(global, lane_index);
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2020-10-12 17:09:03 +00:00
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}
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// Test for OOB.
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{
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WasmRunner<int32_t, uint32_t> r(execution_tier, lower_simd);
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r.builder().AddMemoryElems<T>(kWasmPageSize / sizeof(T));
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r.builder().AddGlobal<T>(kWasmS128);
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2020-12-17 16:55:33 +00:00
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BUILD(r, WASM_LOCAL_GET(0), const_op, splat_value, WASM_SIMD_OP(splat_op),
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2020-10-12 17:09:03 +00:00
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WASM_SIMD_OP(load_op), ZERO_ALIGNMENT, ZERO_OFFSET, 0, kExprGlobalSet,
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0, WASM_ONE);
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// Load lane load sizeof(T) bytes.
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for (uint32_t index = kWasmPageSize - (sizeof(T) - 1);
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index < kWasmPageSize; ++index) {
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CHECK_TRAP(r.Call(index));
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}
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}
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}
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2021-03-24 20:32:23 +00:00
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WASM_SIMD_TEST(S128Load8Lane) {
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2020-10-12 17:09:03 +00:00
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RunLoadLaneTest<int8_t>(execution_tier, lower_simd, kExprS128Load8Lane,
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kExprI8x16Splat);
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}
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2021-03-24 20:32:23 +00:00
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WASM_SIMD_TEST(S128Load16Lane) {
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2020-10-12 17:09:03 +00:00
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RunLoadLaneTest<int16_t>(execution_tier, lower_simd, kExprS128Load16Lane,
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kExprI16x8Splat);
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}
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2021-03-24 20:32:23 +00:00
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WASM_SIMD_TEST(S128Load32Lane) {
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2020-10-12 17:09:03 +00:00
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RunLoadLaneTest<int32_t>(execution_tier, lower_simd, kExprS128Load32Lane,
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kExprI32x4Splat);
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}
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2021-03-24 20:32:23 +00:00
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WASM_SIMD_TEST(S128Load64Lane) {
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2020-10-12 17:09:03 +00:00
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RunLoadLaneTest<int64_t>(execution_tier, lower_simd, kExprS128Load64Lane,
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kExprI64x2Splat);
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}
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2020-10-15 22:02:24 +00:00
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template <typename T>
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void RunStoreLaneTest(TestExecutionTier execution_tier, LowerSimd lower_simd,
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WasmOpcode store_op, WasmOpcode splat_op) {
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constexpr int lanes = kSimd128Size / sizeof(T);
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2020-12-01 02:53:08 +00:00
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constexpr int mem_index = 16; // Store to mem index 16 (bytes).
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2020-10-15 22:02:24 +00:00
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constexpr int splat_value = 33;
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WasmOpcode const_op =
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splat_op == kExprI64x2Splat ? kExprI64Const : kExprI32Const;
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2020-12-01 02:53:08 +00:00
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T* memory; // Will be set by build_fn.
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2020-10-15 22:02:24 +00:00
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2020-12-01 02:53:08 +00:00
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auto build_fn = [=, &memory](WasmRunner<int32_t>& r, int mem_index,
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int lane_index, int alignment, int offset) {
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memory = r.builder().AddMemoryElems<T>(kWasmPageSize / sizeof(T));
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// Splat splat_value, then only Store and replace a single lane.
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2020-10-15 22:02:24 +00:00
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BUILD(r, WASM_I32V(mem_index), const_op, splat_value,
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2020-12-01 02:53:08 +00:00
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WASM_SIMD_OP(splat_op), WASM_SIMD_OP(store_op), alignment, offset,
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lane_index, WASM_ONE);
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2020-10-15 22:02:24 +00:00
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r.builder().BlankMemory();
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2020-12-01 02:53:08 +00:00
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};
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2020-10-15 22:02:24 +00:00
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2020-12-01 02:53:08 +00:00
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auto check_results = [=](WasmRunner<int32_t>& r, T* memory) {
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2020-10-15 22:02:24 +00:00
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for (int i = 0; i < lanes; i++) {
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CHECK_EQ(0, r.builder().ReadMemory(&memory[i]));
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}
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CHECK_EQ(splat_value, r.builder().ReadMemory(&memory[lanes]));
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for (int i = lanes + 1; i < lanes * 2; i++) {
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CHECK_EQ(0, r.builder().ReadMemory(&memory[i]));
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}
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2020-12-01 02:53:08 +00:00
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};
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for (int lane_index = 0; lane_index < lanes; lane_index++) {
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WasmRunner<int32_t> r(execution_tier, lower_simd);
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build_fn(r, mem_index, lane_index, ZERO_ALIGNMENT, ZERO_OFFSET);
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r.Call();
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check_results(r, memory);
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}
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// Check all possible alignments.
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constexpr int max_alignment = base::bits::CountTrailingZeros(sizeof(T));
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for (byte alignment = 0; alignment <= max_alignment; ++alignment) {
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WasmRunner<int32_t> r(execution_tier, lower_simd);
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build_fn(r, mem_index, /*lane_index=*/0, alignment, ZERO_OFFSET);
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r.Call();
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check_results(r, memory);
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}
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{
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// Use memarg for offset.
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WasmRunner<int32_t> r(execution_tier, lower_simd);
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build_fn(r, /*mem_index=*/0, /*lane_index=*/0, ZERO_ALIGNMENT, mem_index);
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r.Call();
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check_results(r, memory);
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2020-10-15 22:02:24 +00:00
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}
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// OOB stores
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{
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WasmRunner<int32_t, uint32_t> r(execution_tier, lower_simd);
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r.builder().AddMemoryElems<T>(kWasmPageSize / sizeof(T));
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2020-12-17 16:55:33 +00:00
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BUILD(r, WASM_LOCAL_GET(0), const_op, splat_value, WASM_SIMD_OP(splat_op),
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2020-10-15 22:02:24 +00:00
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WASM_SIMD_OP(store_op), ZERO_ALIGNMENT, ZERO_OFFSET, 0, WASM_ONE);
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// StoreLane stores sizeof(T) bytes.
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for (uint32_t index = kWasmPageSize - (sizeof(T) - 1);
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index < kWasmPageSize; ++index) {
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CHECK_TRAP(r.Call(index));
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}
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}
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}
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2021-03-24 20:32:23 +00:00
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WASM_SIMD_TEST(S128Store8Lane) {
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2020-10-15 22:02:24 +00:00
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RunStoreLaneTest<int8_t>(execution_tier, lower_simd, kExprS128Store8Lane,
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kExprI8x16Splat);
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}
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2021-03-24 20:32:23 +00:00
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WASM_SIMD_TEST(S128Store16Lane) {
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2020-10-15 22:02:24 +00:00
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RunStoreLaneTest<int16_t>(execution_tier, lower_simd, kExprS128Store16Lane,
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kExprI16x8Splat);
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}
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2021-03-24 20:32:23 +00:00
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WASM_SIMD_TEST(S128Store32Lane) {
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2020-10-15 22:02:24 +00:00
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RunStoreLaneTest<int32_t>(execution_tier, lower_simd, kExprS128Store32Lane,
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kExprI32x4Splat);
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}
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2021-03-24 20:32:23 +00:00
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WASM_SIMD_TEST(S128Store64Lane) {
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2020-10-15 22:02:24 +00:00
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RunStoreLaneTest<int64_t>(execution_tier, lower_simd, kExprS128Store64Lane,
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kExprI64x2Splat);
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}
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2019-07-16 02:58:31 +00:00
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#define WASM_SIMD_ANYTRUE_TEST(format, lanes, max, param_type) \
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2019-08-24 00:12:48 +00:00
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WASM_SIMD_TEST(S##format##AnyTrue) { \
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2019-07-16 02:58:31 +00:00
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WasmRunner<int32_t, param_type> r(execution_tier, lower_simd); \
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2019-08-24 00:12:48 +00:00
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if (lanes == 2 && lower_simd == kLowerSimd) return; \
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2019-01-10 23:22:07 +00:00
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byte simd = r.AllocateLocal(kWasmS128); \
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2020-05-05 18:04:33 +00:00
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BUILD( \
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2019-01-10 23:22:07 +00:00
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r, \
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2020-12-17 16:55:33 +00:00
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WASM_LOCAL_SET(simd, WASM_SIMD_I##format##_SPLAT(WASM_LOCAL_GET(0))), \
|
2021-01-29 22:48:10 +00:00
|
|
|
WASM_SIMD_UNOP(kExprV128AnyTrue, WASM_LOCAL_GET(simd))); \
|
2020-10-15 01:32:12 +00:00
|
|
|
CHECK_EQ(1, r.Call(max)); \
|
|
|
|
CHECK_EQ(1, r.Call(5)); \
|
|
|
|
CHECK_EQ(0, r.Call(0)); \
|
2019-01-10 23:22:07 +00:00
|
|
|
}
|
2019-07-16 02:58:31 +00:00
|
|
|
WASM_SIMD_ANYTRUE_TEST(32x4, 4, 0xffffffff, int32_t)
|
|
|
|
WASM_SIMD_ANYTRUE_TEST(16x8, 8, 0xffff, int32_t)
|
|
|
|
WASM_SIMD_ANYTRUE_TEST(8x16, 16, 0xff, int32_t)
|
2019-01-10 23:22:07 +00:00
|
|
|
|
2020-05-15 23:30:03 +00:00
|
|
|
// Special any true test cases that splats a -0.0 double into a i64x2.
|
|
|
|
// This is specifically to ensure that our implementation correct handles that
|
|
|
|
// 0.0 and -0.0 will be different in an anytrue (IEEE753 says they are equals).
|
2021-01-29 22:48:10 +00:00
|
|
|
WASM_SIMD_TEST(V128AnytrueWithNegativeZero) {
|
2020-05-15 23:30:03 +00:00
|
|
|
WasmRunner<int32_t, int64_t> r(execution_tier, lower_simd);
|
|
|
|
byte simd = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(simd, WASM_SIMD_I64x2_SPLAT(WASM_LOCAL_GET(0))),
|
2021-01-29 22:48:10 +00:00
|
|
|
WASM_SIMD_UNOP(kExprV128AnyTrue, WASM_LOCAL_GET(simd)));
|
2020-10-15 01:32:12 +00:00
|
|
|
CHECK_EQ(1, r.Call(0x8000000000000000));
|
|
|
|
CHECK_EQ(0, r.Call(0x0000000000000000));
|
2020-05-15 23:30:03 +00:00
|
|
|
}
|
|
|
|
|
2019-07-16 02:58:31 +00:00
|
|
|
#define WASM_SIMD_ALLTRUE_TEST(format, lanes, max, param_type) \
|
2021-03-05 23:56:29 +00:00
|
|
|
WASM_SIMD_TEST(I##format##AllTrue) { \
|
2019-07-16 02:58:31 +00:00
|
|
|
WasmRunner<int32_t, param_type> r(execution_tier, lower_simd); \
|
2019-08-24 00:12:48 +00:00
|
|
|
if (lanes == 2 && lower_simd == kLowerSimd) return; \
|
2019-01-10 23:22:07 +00:00
|
|
|
byte simd = r.AllocateLocal(kWasmS128); \
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD( \
|
2019-01-10 23:22:07 +00:00
|
|
|
r, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(simd, WASM_SIMD_I##format##_SPLAT(WASM_LOCAL_GET(0))), \
|
2021-03-05 23:56:29 +00:00
|
|
|
WASM_SIMD_UNOP(kExprI##format##AllTrue, WASM_LOCAL_GET(simd))); \
|
2020-10-15 01:32:12 +00:00
|
|
|
CHECK_EQ(1, r.Call(max)); \
|
|
|
|
CHECK_EQ(1, r.Call(0x1)); \
|
|
|
|
CHECK_EQ(0, r.Call(0)); \
|
2019-01-10 23:22:07 +00:00
|
|
|
}
|
2021-02-01 21:40:17 +00:00
|
|
|
WASM_SIMD_ALLTRUE_TEST(64x2, 2, 0xffffffffffffffff, int64_t)
|
2019-07-16 02:58:31 +00:00
|
|
|
WASM_SIMD_ALLTRUE_TEST(32x4, 4, 0xffffffff, int32_t)
|
|
|
|
WASM_SIMD_ALLTRUE_TEST(16x8, 8, 0xffff, int32_t)
|
|
|
|
WASM_SIMD_ALLTRUE_TEST(8x16, 16, 0xff, int32_t)
|
2019-01-10 23:22:07 +00:00
|
|
|
|
2019-03-25 20:44:32 +00:00
|
|
|
WASM_SIMD_TEST(BitSelect) {
|
2019-01-12 01:02:41 +00:00
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
byte simd = r.AllocateLocal(kWasmS128);
|
2020-05-05 18:04:33 +00:00
|
|
|
BUILD(r,
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(
|
2020-05-05 18:04:33 +00:00
|
|
|
simd,
|
|
|
|
WASM_SIMD_SELECT(32x4, WASM_SIMD_I32x4_SPLAT(WASM_I32V(0x01020304)),
|
2019-01-12 01:02:41 +00:00
|
|
|
WASM_SIMD_I32x4_SPLAT(WASM_I32V(0)),
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_SIMD_I32x4_SPLAT(WASM_LOCAL_GET(0)))),
|
|
|
|
WASM_SIMD_I32x4_EXTRACT_LANE(0, WASM_LOCAL_GET(simd)));
|
2020-10-15 01:32:12 +00:00
|
|
|
CHECK_EQ(0x01020304, r.Call(0xFFFFFFFF));
|
2019-01-12 01:02:41 +00:00
|
|
|
}
|
|
|
|
|
2020-08-04 11:09:23 +00:00
|
|
|
void RunSimdConstTest(TestExecutionTier execution_tier, LowerSimd lower_simd,
|
2020-07-02 00:19:09 +00:00
|
|
|
const std::array<uint8_t, kSimd128Size>& expected) {
|
|
|
|
WasmRunner<uint32_t> r(execution_tier, lower_simd);
|
|
|
|
byte temp1 = r.AllocateLocal(kWasmS128);
|
|
|
|
uint8_t* src0 = r.builder().AddGlobal<uint8_t>(kWasmS128);
|
2020-12-17 16:56:08 +00:00
|
|
|
BUILD(r, WASM_GLOBAL_SET(temp1, WASM_SIMD_CONSTANT(expected)), WASM_ONE);
|
2020-07-02 00:19:09 +00:00
|
|
|
CHECK_EQ(1, r.Call());
|
|
|
|
for (size_t i = 0; i < expected.size(); i++) {
|
|
|
|
CHECK_EQ(ReadLittleEndianValue<uint8_t>(&src0[i]), expected[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(S128Const) {
|
2020-07-02 00:19:09 +00:00
|
|
|
std::array<uint8_t, kSimd128Size> expected;
|
|
|
|
// Test for generic constant
|
|
|
|
for (int i = 0; i < kSimd128Size; i++) {
|
|
|
|
expected[i] = i;
|
|
|
|
}
|
|
|
|
RunSimdConstTest(execution_tier, lower_simd, expected);
|
2020-07-10 16:22:54 +00:00
|
|
|
|
|
|
|
// Keep the first 4 lanes as 0, set the remaining ones.
|
2020-07-10 16:30:16 +00:00
|
|
|
for (int i = 0; i < 4; i++) {
|
2020-07-10 16:22:54 +00:00
|
|
|
expected[i] = 0;
|
|
|
|
}
|
|
|
|
for (int i = 4; i < kSimd128Size; i++) {
|
|
|
|
expected[i] = i;
|
|
|
|
}
|
|
|
|
RunSimdConstTest(execution_tier, lower_simd, expected);
|
2020-07-14 17:11:49 +00:00
|
|
|
|
|
|
|
// Check sign extension logic used to pack int32s into int64.
|
|
|
|
expected = {0};
|
|
|
|
// Set the top bit of lane 3 (top bit of first int32), the rest can be 0.
|
|
|
|
expected[3] = 0x80;
|
|
|
|
RunSimdConstTest(execution_tier, lower_simd, expected);
|
2020-07-02 00:19:09 +00:00
|
|
|
}
|
|
|
|
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(S128ConstAllZero) {
|
2020-07-14 17:11:49 +00:00
|
|
|
std::array<uint8_t, kSimd128Size> expected = {0};
|
2020-07-02 00:19:09 +00:00
|
|
|
RunSimdConstTest(execution_tier, lower_simd, expected);
|
|
|
|
}
|
|
|
|
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(S128ConstAllOnes) {
|
2020-07-02 00:19:09 +00:00
|
|
|
std::array<uint8_t, kSimd128Size> expected;
|
|
|
|
// Test for generic constant
|
|
|
|
for (int i = 0; i < kSimd128Size; i++) {
|
|
|
|
expected[i] = 0xff;
|
|
|
|
}
|
|
|
|
RunSimdConstTest(execution_tier, lower_simd, expected);
|
|
|
|
}
|
|
|
|
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(I8x16LeUMixed) {
|
2019-03-29 00:20:24 +00:00
|
|
|
RunI8x16MixedRelationalOpTest(execution_tier, lower_simd, kExprI8x16LeU,
|
|
|
|
UnsignedLessEqual);
|
|
|
|
}
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(I8x16LtUMixed) {
|
2019-03-29 00:20:24 +00:00
|
|
|
RunI8x16MixedRelationalOpTest(execution_tier, lower_simd, kExprI8x16LtU,
|
|
|
|
UnsignedLess);
|
|
|
|
}
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(I8x16GeUMixed) {
|
2019-03-29 00:20:24 +00:00
|
|
|
RunI8x16MixedRelationalOpTest(execution_tier, lower_simd, kExprI8x16GeU,
|
|
|
|
UnsignedGreaterEqual);
|
|
|
|
}
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(I8x16GtUMixed) {
|
2019-03-29 00:20:24 +00:00
|
|
|
RunI8x16MixedRelationalOpTest(execution_tier, lower_simd, kExprI8x16GtU,
|
|
|
|
UnsignedGreater);
|
|
|
|
}
|
|
|
|
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(I16x8LeUMixed) {
|
2019-03-29 00:20:24 +00:00
|
|
|
RunI16x8MixedRelationalOpTest(execution_tier, lower_simd, kExprI16x8LeU,
|
|
|
|
UnsignedLessEqual);
|
|
|
|
}
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(I16x8LtUMixed) {
|
2019-03-29 00:20:24 +00:00
|
|
|
RunI16x8MixedRelationalOpTest(execution_tier, lower_simd, kExprI16x8LtU,
|
|
|
|
UnsignedLess);
|
|
|
|
}
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(I16x8GeUMixed) {
|
2019-03-29 00:20:24 +00:00
|
|
|
RunI16x8MixedRelationalOpTest(execution_tier, lower_simd, kExprI16x8GeU,
|
|
|
|
UnsignedGreaterEqual);
|
|
|
|
}
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(I16x8GtUMixed) {
|
2019-03-29 00:20:24 +00:00
|
|
|
RunI16x8MixedRelationalOpTest(execution_tier, lower_simd, kExprI16x8GtU,
|
|
|
|
UnsignedGreater);
|
|
|
|
}
|
|
|
|
|
2020-10-09 20:29:17 +00:00
|
|
|
WASM_SIMD_TEST(I16x8ExtractLaneU_I8x16Splat) {
|
2020-05-28 22:48:28 +00:00
|
|
|
// Test that we are correctly signed/unsigned extending when extracting.
|
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
|
|
|
|
byte simd_val = r.AllocateLocal(kWasmS128);
|
2020-12-17 16:55:33 +00:00
|
|
|
BUILD(r, WASM_LOCAL_SET(simd_val, WASM_SIMD_I8x16_SPLAT(WASM_LOCAL_GET(0))),
|
|
|
|
WASM_SIMD_I16x8_EXTRACT_LANE_U(0, WASM_LOCAL_GET(simd_val)));
|
2020-05-28 22:48:28 +00:00
|
|
|
CHECK_EQ(0xfafa, r.Call(0xfa));
|
|
|
|
}
|
|
|
|
|
2020-05-05 18:04:33 +00:00
|
|
|
#define WASM_EXTRACT_I16x8_TEST(Sign, Type) \
|
|
|
|
WASM_SIMD_TEST(I16X8ExtractLane##Sign) { \
|
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd); \
|
|
|
|
byte int_val = r.AllocateLocal(kWasmI32); \
|
|
|
|
byte simd_val = r.AllocateLocal(kWasmS128); \
|
|
|
|
BUILD(r, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(simd_val, \
|
|
|
|
WASM_SIMD_I16x8_SPLAT(WASM_LOCAL_GET(int_val))), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_SIMD_CHECK_LANE_U(I16x8, simd_val, I32, int_val, 0), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I16x8, simd_val, I32, int_val, 2), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I16x8, simd_val, I32, int_val, 4), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I16x8, simd_val, I32, int_val, 6), WASM_ONE); \
|
|
|
|
FOR_##Type##_INPUTS(x) { CHECK_EQ(1, r.Call(x)); } \
|
2019-10-08 23:43:15 +00:00
|
|
|
}
|
|
|
|
WASM_EXTRACT_I16x8_TEST(S, UINT16) WASM_EXTRACT_I16x8_TEST(I, INT16)
|
|
|
|
#undef WASM_EXTRACT_I16x8_TEST
|
|
|
|
|
2020-05-05 18:04:33 +00:00
|
|
|
#define WASM_EXTRACT_I8x16_TEST(Sign, Type) \
|
|
|
|
WASM_SIMD_TEST(I8x16ExtractLane##Sign) { \
|
|
|
|
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd); \
|
|
|
|
byte int_val = r.AllocateLocal(kWasmI32); \
|
|
|
|
byte simd_val = r.AllocateLocal(kWasmS128); \
|
|
|
|
BUILD(r, \
|
2020-12-17 16:55:33 +00:00
|
|
|
WASM_LOCAL_SET(simd_val, \
|
|
|
|
WASM_SIMD_I8x16_SPLAT(WASM_LOCAL_GET(int_val))), \
|
2020-05-05 18:04:33 +00:00
|
|
|
WASM_SIMD_CHECK_LANE_U(I8x16, simd_val, I32, int_val, 1), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I8x16, simd_val, I32, int_val, 3), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I8x16, simd_val, I32, int_val, 5), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I8x16, simd_val, I32, int_val, 7), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I8x16, simd_val, I32, int_val, 9), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I8x16, simd_val, I32, int_val, 10), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I8x16, simd_val, I32, int_val, 11), \
|
|
|
|
WASM_SIMD_CHECK_LANE_U(I8x16, simd_val, I32, int_val, 13), \
|
|
|
|
WASM_ONE); \
|
|
|
|
FOR_##Type##_INPUTS(x) { CHECK_EQ(1, r.Call(x)); } \
|
2019-10-08 23:43:15 +00:00
|
|
|
}
|
|
|
|
WASM_EXTRACT_I8x16_TEST(S, UINT8) WASM_EXTRACT_I8x16_TEST(I, INT8)
|
|
|
|
#undef WASM_EXTRACT_I8x16_TEST
|
|
|
|
|
2017-09-08 13:59:05 +00:00
|
|
|
#undef WASM_SIMD_TEST
|
2019-10-08 23:43:15 +00:00
|
|
|
#undef WASM_SIMD_CHECK_LANE_S
|
|
|
|
#undef WASM_SIMD_CHECK_LANE_U
|
2017-09-08 13:59:05 +00:00
|
|
|
#undef TO_BYTE
|
|
|
|
#undef WASM_SIMD_OP
|
|
|
|
#undef WASM_SIMD_SPLAT
|
|
|
|
#undef WASM_SIMD_UNOP
|
|
|
|
#undef WASM_SIMD_BINOP
|
|
|
|
#undef WASM_SIMD_SHIFT_OP
|
|
|
|
#undef WASM_SIMD_CONCAT_OP
|
|
|
|
#undef WASM_SIMD_SELECT
|
2019-07-01 23:58:02 +00:00
|
|
|
#undef WASM_SIMD_F64x2_SPLAT
|
2019-07-10 04:22:46 +00:00
|
|
|
#undef WASM_SIMD_F64x2_EXTRACT_LANE
|
|
|
|
#undef WASM_SIMD_F64x2_REPLACE_LANE
|
2017-09-08 13:59:05 +00:00
|
|
|
#undef WASM_SIMD_F32x4_SPLAT
|
|
|
|
#undef WASM_SIMD_F32x4_EXTRACT_LANE
|
|
|
|
#undef WASM_SIMD_F32x4_REPLACE_LANE
|
2019-07-01 23:58:02 +00:00
|
|
|
#undef WASM_SIMD_I64x2_SPLAT
|
|
|
|
#undef WASM_SIMD_I64x2_EXTRACT_LANE
|
|
|
|
#undef WASM_SIMD_I64x2_REPLACE_LANE
|
2017-09-08 13:59:05 +00:00
|
|
|
#undef WASM_SIMD_I32x4_SPLAT
|
|
|
|
#undef WASM_SIMD_I32x4_EXTRACT_LANE
|
|
|
|
#undef WASM_SIMD_I32x4_REPLACE_LANE
|
|
|
|
#undef WASM_SIMD_I16x8_SPLAT
|
|
|
|
#undef WASM_SIMD_I16x8_EXTRACT_LANE
|
2019-10-08 23:43:15 +00:00
|
|
|
#undef WASM_SIMD_I16x8_EXTRACT_LANE_U
|
2017-09-08 13:59:05 +00:00
|
|
|
#undef WASM_SIMD_I16x8_REPLACE_LANE
|
|
|
|
#undef WASM_SIMD_I8x16_SPLAT
|
|
|
|
#undef WASM_SIMD_I8x16_EXTRACT_LANE
|
2019-10-08 23:43:15 +00:00
|
|
|
#undef WASM_SIMD_I8x16_EXTRACT_LANE_U
|
2017-09-08 13:59:05 +00:00
|
|
|
#undef WASM_SIMD_I8x16_REPLACE_LANE
|
2020-09-25 18:08:04 +00:00
|
|
|
#undef WASM_SIMD_I8x16_SHUFFLE_OP
|
2017-09-08 13:59:05 +00:00
|
|
|
#undef WASM_SIMD_LOAD_MEM
|
2019-09-19 22:01:07 +00:00
|
|
|
#undef WASM_SIMD_LOAD_MEM_OFFSET
|
2017-09-08 13:59:05 +00:00
|
|
|
#undef WASM_SIMD_STORE_MEM
|
2019-09-19 22:01:07 +00:00
|
|
|
#undef WASM_SIMD_STORE_MEM_OFFSET
|
2017-09-08 13:59:05 +00:00
|
|
|
#undef WASM_SIMD_SELECT_TEST
|
|
|
|
#undef WASM_SIMD_NON_CANONICAL_SELECT_TEST
|
|
|
|
#undef WASM_SIMD_BOOL_REDUCTION_TEST
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2021-03-24 20:32:23 +00:00
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#undef WASM_SIMD_TEST
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2019-01-10 23:22:07 +00:00
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#undef WASM_SIMD_ANYTRUE_TEST
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#undef WASM_SIMD_ALLTRUE_TEST
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[wasm-simd] Implement QFMA and QFMS on x64
Quasi Fused Multiply-Add and Quasi Fused Multiply-Subtract performs, on floats, a + b * c and a - b * c respectively.
When there is only a single rounding, it is a fused operation. Quasi in this case means that the result can either be fused or not fused (two roundings), depending on hardware support.
It is tricky to write the test because we need to calculate the expected value, and there is no easy way to express fused or unfused operation in C++, i.e.
we cannot confirm that float expected = a + b * c will perform a fused or unfused operation (unless we use intrinsics).
Thus in the test we have a list of simple checks, plus interesting values that we know will produce different results depending on whether it was fused or not.
The difference between 32x4 and 64x2 qfma/qfms is the type, and also the values of b and c that will cause an overflow, and thus the intermediate rounding will affect the final result.
The same array can be copy pasted for both types, but with a bit of templating we can avoid that duplication.
Change-Id: I0973a3d28468d25f310b593c72f21bff54d809a7
Bug: v8:9415
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1779325
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Cr-Commit-Position: refs/heads/master@{#63878}
2019-09-18 19:44:10 +00:00
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#undef WASM_SIMD_F64x2_QFMA
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#undef WASM_SIMD_F64x2_QFMS
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#undef WASM_SIMD_F32x4_QFMA
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#undef WASM_SIMD_F32x4_QFMS
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2020-07-17 17:48:28 +00:00
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#undef WASM_SIMD_LOAD_OP
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#undef WASM_SIMD_LOAD_OP_OFFSET
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#undef WASM_SIMD_LOAD_OP_ALIGNMENT
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2017-09-08 13:59:05 +00:00
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2017-09-21 03:29:52 +00:00
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} // namespace test_run_wasm_simd
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2017-09-01 12:57:34 +00:00
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} // namespace wasm
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} // namespace internal
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} // namespace v8
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